1 //===- PTXInstrInfo.h - PTX Instruction Information -------------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the PTX implementation of the TargetInstrInfo class.
12 //===----------------------------------------------------------------------===//
14 #ifndef PTX_INSTR_INFO_H
15 #define PTX_INSTR_INFO_H
17 #include "PTXRegisterInfo.h"
18 #include "llvm/Target/TargetInstrInfo.h"
21 class PTXTargetMachine;
27 class PTXInstrInfo : public TargetInstrInfoImpl {
29 const PTXRegisterInfo RI;
33 explicit PTXInstrInfo(PTXTargetMachine &_TM);
35 virtual const PTXRegisterInfo &getRegisterInfo() const { return RI; }
37 virtual void copyPhysReg(MachineBasicBlock &MBB,
38 MachineBasicBlock::iterator I, DebugLoc DL,
39 unsigned DstReg, unsigned SrcReg,
42 virtual bool copyRegToReg(MachineBasicBlock &MBB,
43 MachineBasicBlock::iterator I,
44 unsigned DstReg, unsigned SrcReg,
45 const TargetRegisterClass *DstRC,
46 const TargetRegisterClass *SrcRC,
49 virtual bool isMoveInstr(const MachineInstr& MI,
50 unsigned &SrcReg, unsigned &DstReg,
51 unsigned &SrcSubIdx, unsigned &DstSubIdx) const;
55 virtual bool isPredicated(const MachineInstr *MI) const;
57 virtual bool isUnpredicatedTerminator(const MachineInstr *MI) const;
60 bool PredicateInstruction(MachineInstr *MI,
61 const SmallVectorImpl<MachineOperand> &Pred) const;
64 bool SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1,
65 const SmallVectorImpl<MachineOperand> &Pred2) const;
67 virtual bool DefinesPredicate(MachineInstr *MI,
68 std::vector<MachineOperand> &Pred) const;
70 // PTX is fully-predicable
71 virtual bool isPredicable(MachineInstr *MI) const { return true; }
75 virtual bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
76 MachineBasicBlock *&FBB,
77 SmallVectorImpl<MachineOperand> &Cond,
78 bool AllowModify = false) const;
80 virtual unsigned RemoveBranch(MachineBasicBlock &MBB) const;
82 virtual unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
83 MachineBasicBlock *FBB,
84 const SmallVectorImpl<MachineOperand> &Cond,
87 // Memory operand folding for spills
88 // TODO: Implement this eventually and get rid of storeRegToStackSlot and
89 // loadRegFromStackSlot. Doing so will get rid of the "stack" registers
90 // we currently use to spill, though I doubt the overall effect on ptxas
91 // output will be large. I have yet to see a case where ptxas is unable
92 // to see through the "stack" register usage and hence generates
93 // efficient code anyway.
94 // virtual MachineInstr* foldMemoryOperandImpl(MachineFunction &MF,
96 // const SmallVectorImpl<unsigned> &Ops,
97 // int FrameIndex) const;
99 virtual void storeRegToStackSlot(MachineBasicBlock& MBB,
100 MachineBasicBlock::iterator MII,
101 unsigned SrcReg, bool isKill, int FrameIndex,
102 const TargetRegisterClass* RC,
103 const TargetRegisterInfo* TRI) const;
104 virtual void loadRegFromStackSlot(MachineBasicBlock &MBB,
105 MachineBasicBlock::iterator MII,
106 unsigned DestReg, int FrameIdx,
107 const TargetRegisterClass *RC,
108 const TargetRegisterInfo *TRI) const;
110 // static helper routines
112 static MachineSDNode *GetPTXMachineNode(SelectionDAG *DAG, unsigned Opcode,
116 static MachineSDNode *GetPTXMachineNode(SelectionDAG *DAG, unsigned Opcode,
118 SDValue Op1, SDValue Op2);
120 static void AddDefaultPredicate(MachineInstr *MI);
122 static bool IsAnyKindOfBranch(const MachineInstr& inst);
124 static bool IsAnySuccessorAlsoLayoutSuccessor(const MachineBasicBlock& MBB);
126 static MachineBasicBlock *GetBranchTarget(const MachineInstr& inst);
127 }; // class PTXInstrInfo
130 #endif // PTX_INSTR_INFO_H