1 //===- PTXInstrInfo.td - PTX Instruction defs -----------------*- tblgen-*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file describes the PTX instructions in TableGen format.
12 //===----------------------------------------------------------------------===//
14 //===----------------------------------------------------------------------===//
15 // Instruction format superclass
16 //===----------------------------------------------------------------------===//
18 include "PTXInstrFormats.td"
20 //===----------------------------------------------------------------------===//
21 // Instruction Pattern Stuff
22 //===----------------------------------------------------------------------===//
24 def load_global : PatFrag<(ops node:$ptr), (load node:$ptr), [{
25 if (const Value *Src = cast<LoadSDNode>(N)->getSrcValue())
26 if (const PointerType *PT = dyn_cast<PointerType>(Src->getType()))
27 return PT->getAddressSpace() <= 255;
32 def ADDRri : ComplexPattern<i32, 2, "SelectADDRri", [], []>;
33 def ADDRii : ComplexPattern<i32, 2, "SelectADDRii", [], []>;
36 def MEMri : Operand<i32> {
37 let PrintMethod = "printMemOperand";
38 let MIOperandInfo = (ops RRegs32, i32imm);
40 def MEMii : Operand<i32> {
41 let PrintMethod = "printMemOperand";
42 let MIOperandInfo = (ops i32imm, i32imm);
45 //===----------------------------------------------------------------------===//
46 // PTX Specific Node Definitions
47 //===----------------------------------------------------------------------===//
50 : SDNode<"PTXISD::EXIT", SDTNone, [SDNPHasChain]>;
52 : SDNode<"PTXISD::RET", SDTNone, [SDNPHasChain]>;
54 //===----------------------------------------------------------------------===//
55 // Instruction Class Templates
56 //===----------------------------------------------------------------------===//
58 multiclass INT3<string opcstr, SDNode opnode> {
59 def rr : InstPTX<(outs RRegs32:$d),
60 (ins RRegs32:$a, RRegs32:$b),
61 !strconcat(opcstr, ".%type\t$d, $a, $b"),
62 [(set RRegs32:$d, (opnode RRegs32:$a, RRegs32:$b))]>;
63 def ri : InstPTX<(outs RRegs32:$d),
64 (ins RRegs32:$a, i32imm:$b),
65 !strconcat(opcstr, ".%type\t$d, $a, $b"),
66 [(set RRegs32:$d, (opnode RRegs32:$a, imm:$b))]>;
69 multiclass PTX_LD<string opstr, RegisterClass RC, PatFrag pat_load> {
70 def ri : InstPTX<(outs RC:$d),
72 !strconcat(opstr, ".%type\t$d, [$a]"),
73 [(set RC:$d, (pat_load ADDRri:$a))]>;
74 def ii : InstPTX<(outs RC:$d),
76 !strconcat(opstr, ".%type\t$d, [$a]"),
77 [(set RC:$d, (pat_load ADDRii:$a))]>;
80 //===----------------------------------------------------------------------===//
82 //===----------------------------------------------------------------------===//
84 ///===- Integer Arithmetic Instructions -----------------------------------===//
86 defm ADD : INT3<"add", add>;
87 defm SUB : INT3<"sub", sub>;
89 ///===- Data Movement and Conversion Instructions -------------------------===//
91 let neverHasSideEffects = 1 in {
92 // rely on isMoveInstr to separate MOVpp, MOVrr, etc.
94 : InstPTX<(outs Preds:$d), (ins Preds:$a), "mov.pred\t$d, $a", []>;
96 : InstPTX<(outs RRegs32:$d), (ins RRegs32:$a), "mov.%type\t$d, $a", []>;
99 let isReMaterializable = 1, isAsCheapAsAMove = 1 in {
101 : InstPTX<(outs Preds:$d), (ins i1imm:$a), "mov.pred\t$d, $a",
102 [(set Preds:$d, imm:$a)]>;
104 : InstPTX<(outs RRegs32:$d), (ins i32imm:$a), "mov.s32\t$d, $a",
105 [(set RRegs32:$d, imm:$a)]>;
108 defm LDg : PTX_LD<"ld.global", RRegs32, load_global>;
110 ///===- Control Flow Instructions -----------------------------------------===//
112 let isReturn = 1, isTerminator = 1, isBarrier = 1 in {
113 def EXIT : InstPTX<(outs), (ins), "exit", [(PTXexit)]>;
114 def RET : InstPTX<(outs), (ins), "ret", [(PTXret)]>;