1 //===- PTXInstrInfo.td - PTX Instruction defs -----------------*- tblgen-*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file describes the PTX instructions in TableGen format.
12 //===----------------------------------------------------------------------===//
14 //===----------------------------------------------------------------------===//
15 // Instruction format superclass
16 //===----------------------------------------------------------------------===//
18 include "PTXInstrFormats.td"
20 //===----------------------------------------------------------------------===//
21 // Instruction Pattern Stuff
22 //===----------------------------------------------------------------------===//
24 def load_global : PatFrag<(ops node:$ptr), (load node:$ptr), [{
26 const PointerType *PT;
27 if ((Src = cast<LoadSDNode>(N)->getSrcValue()) &&
28 (PT = dyn_cast<PointerType>(Src->getType())))
29 return PT->getAddressSpace() == PTX::GLOBAL;
33 def load_constant : PatFrag<(ops node:$ptr), (load node:$ptr), [{
35 const PointerType *PT;
36 if ((Src = cast<LoadSDNode>(N)->getSrcValue()) &&
37 (PT = dyn_cast<PointerType>(Src->getType())))
38 return PT->getAddressSpace() == PTX::CONSTANT;
42 def load_local : PatFrag<(ops node:$ptr), (load node:$ptr), [{
44 const PointerType *PT;
45 if ((Src = cast<LoadSDNode>(N)->getSrcValue()) &&
46 (PT = dyn_cast<PointerType>(Src->getType())))
47 return PT->getAddressSpace() == PTX::LOCAL;
51 def load_parameter : PatFrag<(ops node:$ptr), (load node:$ptr), [{
53 const PointerType *PT;
54 if ((Src = cast<LoadSDNode>(N)->getSrcValue()) &&
55 (PT = dyn_cast<PointerType>(Src->getType())))
56 return PT->getAddressSpace() == PTX::PARAMETER;
60 def load_shared : PatFrag<(ops node:$ptr), (load node:$ptr), [{
62 const PointerType *PT;
63 if ((Src = cast<LoadSDNode>(N)->getSrcValue()) &&
64 (PT = dyn_cast<PointerType>(Src->getType())))
65 return PT->getAddressSpace() == PTX::SHARED;
70 : PatFrag<(ops node:$d, node:$ptr), (store node:$d, node:$ptr), [{
72 const PointerType *PT;
73 if ((Src = cast<StoreSDNode>(N)->getSrcValue()) &&
74 (PT = dyn_cast<PointerType>(Src->getType())))
75 return PT->getAddressSpace() == PTX::GLOBAL;
80 : PatFrag<(ops node:$d, node:$ptr), (store node:$d, node:$ptr), [{
82 const PointerType *PT;
83 if ((Src = cast<StoreSDNode>(N)->getSrcValue()) &&
84 (PT = dyn_cast<PointerType>(Src->getType())))
85 return PT->getAddressSpace() == PTX::LOCAL;
90 : PatFrag<(ops node:$d, node:$ptr), (store node:$d, node:$ptr), [{
92 const PointerType *PT;
93 if ((Src = cast<StoreSDNode>(N)->getSrcValue()) &&
94 (PT = dyn_cast<PointerType>(Src->getType())))
95 return PT->getAddressSpace() == PTX::PARAMETER;
100 : PatFrag<(ops node:$d, node:$ptr), (store node:$d, node:$ptr), [{
102 const PointerType *PT;
103 if ((Src = cast<StoreSDNode>(N)->getSrcValue()) &&
104 (PT = dyn_cast<PointerType>(Src->getType())))
105 return PT->getAddressSpace() == PTX::SHARED;
110 def ADDRrr : ComplexPattern<i32, 2, "SelectADDRrr", [], []>;
111 def ADDRri : ComplexPattern<i32, 2, "SelectADDRri", [], []>;
112 def ADDRii : ComplexPattern<i32, 2, "SelectADDRii", [], []>;
115 def MEMri : Operand<i32> {
116 let PrintMethod = "printMemOperand";
117 let MIOperandInfo = (ops RRegs32, i32imm);
119 def MEMii : Operand<i32> {
120 let PrintMethod = "printMemOperand";
121 let MIOperandInfo = (ops i32imm, i32imm);
123 def MEMpi : Operand<i32> {
124 let PrintMethod = "printParamOperand";
125 let MIOperandInfo = (ops i32imm);
128 //===----------------------------------------------------------------------===//
129 // PTX Specific Node Definitions
130 //===----------------------------------------------------------------------===//
132 // PTX allow generic 3-reg shifts like shl r0, r1, r2
133 def PTXshl : SDNode<"ISD::SHL", SDTIntBinOp>;
134 def PTXsrl : SDNode<"ISD::SRL", SDTIntBinOp>;
135 def PTXsra : SDNode<"ISD::SRA", SDTIntBinOp>;
138 : SDNode<"PTXISD::EXIT", SDTNone, [SDNPHasChain]>;
140 : SDNode<"PTXISD::RET", SDTNone, [SDNPHasChain]>;
142 //===----------------------------------------------------------------------===//
143 // Instruction Class Templates
144 //===----------------------------------------------------------------------===//
146 multiclass INT3<string opcstr, SDNode opnode> {
147 def rr : InstPTX<(outs RRegs32:$d),
148 (ins RRegs32:$a, RRegs32:$b),
149 !strconcat(opcstr, ".%type\t$d, $a, $b"),
150 [(set RRegs32:$d, (opnode RRegs32:$a, RRegs32:$b))]>;
151 def ri : InstPTX<(outs RRegs32:$d),
152 (ins RRegs32:$a, i32imm:$b),
153 !strconcat(opcstr, ".%type\t$d, $a, $b"),
154 [(set RRegs32:$d, (opnode RRegs32:$a, imm:$b))]>;
157 // no %type directive, non-communtable
158 multiclass INT3ntnc<string opcstr, SDNode opnode> {
159 def rr : InstPTX<(outs RRegs32:$d),
160 (ins RRegs32:$a, RRegs32:$b),
161 !strconcat(opcstr, "\t$d, $a, $b"),
162 [(set RRegs32:$d, (opnode RRegs32:$a, RRegs32:$b))]>;
163 def ri : InstPTX<(outs RRegs32:$d),
164 (ins RRegs32:$a, i32imm:$b),
165 !strconcat(opcstr, "\t$d, $a, $b"),
166 [(set RRegs32:$d, (opnode RRegs32:$a, imm:$b))]>;
167 def ir : InstPTX<(outs RRegs32:$d),
168 (ins i32imm:$a, RRegs32:$b),
169 !strconcat(opcstr, "\t$d, $a, $b"),
170 [(set RRegs32:$d, (opnode imm:$a, RRegs32:$b))]>;
173 multiclass PTX_LD<string opstr, RegisterClass RC, PatFrag pat_load> {
174 def rr : InstPTX<(outs RC:$d),
176 !strconcat(opstr, ".%type\t$d, [$a]"),
177 [(set RC:$d, (pat_load ADDRrr:$a))]>;
178 def ri : InstPTX<(outs RC:$d),
180 !strconcat(opstr, ".%type\t$d, [$a]"),
181 [(set RC:$d, (pat_load ADDRri:$a))]>;
182 def ii : InstPTX<(outs RC:$d),
184 !strconcat(opstr, ".%type\t$d, [$a]"),
185 [(set RC:$d, (pat_load ADDRii:$a))]>;
188 multiclass PTX_ST<string opstr, RegisterClass RC, PatFrag pat_store> {
189 def rr : InstPTX<(outs),
190 (ins RC:$d, MEMri:$a),
191 !strconcat(opstr, ".%type\t[$a], $d"),
192 [(pat_store RC:$d, ADDRrr:$a)]>;
193 def ri : InstPTX<(outs),
194 (ins RC:$d, MEMri:$a),
195 !strconcat(opstr, ".%type\t[$a], $d"),
196 [(pat_store RC:$d, ADDRri:$a)]>;
197 def ii : InstPTX<(outs),
198 (ins RC:$d, MEMii:$a),
199 !strconcat(opstr, ".%type\t[$a], $d"),
200 [(pat_store RC:$d, ADDRii:$a)]>;
203 //===----------------------------------------------------------------------===//
205 //===----------------------------------------------------------------------===//
207 ///===- Integer Arithmetic Instructions -----------------------------------===//
209 defm ADD : INT3<"add", add>;
210 defm SUB : INT3<"sub", sub>;
212 ///===- Logic and Shift Instructions --------------------------------------===//
214 defm SHL : INT3ntnc<"shl.b32", PTXshl>;
215 defm SRL : INT3ntnc<"shr.u32", PTXsrl>;
216 defm SRA : INT3ntnc<"shr.s32", PTXsra>;
218 ///===- Data Movement and Conversion Instructions -------------------------===//
220 let neverHasSideEffects = 1 in {
221 // rely on isMoveInstr to separate MOVpp, MOVrr, etc.
223 : InstPTX<(outs Preds:$d), (ins Preds:$a), "mov.pred\t$d, $a", []>;
225 : InstPTX<(outs RRegs32:$d), (ins RRegs32:$a), "mov.%type\t$d, $a", []>;
228 let isReMaterializable = 1, isAsCheapAsAMove = 1 in {
230 : InstPTX<(outs Preds:$d), (ins i1imm:$a), "mov.pred\t$d, $a",
231 [(set Preds:$d, imm:$a)]>;
233 : InstPTX<(outs RRegs32:$d), (ins i32imm:$a), "mov.s32\t$d, $a",
234 [(set RRegs32:$d, imm:$a)]>;
237 defm LDg : PTX_LD<"ld.global", RRegs32, load_global>;
238 defm LDc : PTX_LD<"ld.const", RRegs32, load_constant>;
239 defm LDl : PTX_LD<"ld.local", RRegs32, load_local>;
240 defm LDp : PTX_LD<"ld.param", RRegs32, load_parameter>;
241 defm LDs : PTX_LD<"ld.shared", RRegs32, load_shared>;
243 def LDpi : InstPTX<(outs RRegs32:$d), (ins MEMpi:$a),
244 "ld.param.%type\t$d, [$a]", []>;
246 defm STg : PTX_ST<"st.global", RRegs32, store_global>;
247 defm STl : PTX_ST<"st.local", RRegs32, store_local>;
248 // Store to parameter state space requires PTX 2.0 or higher?
249 // defm STp : PTX_ST<"st.param", RRegs32, store_parameter>;
250 defm STs : PTX_ST<"st.shared", RRegs32, store_shared>;
252 ///===- Control Flow Instructions -----------------------------------------===//
254 let isReturn = 1, isTerminator = 1, isBarrier = 1 in {
255 def EXIT : InstPTX<(outs), (ins), "exit", [(PTXexit)]>;
256 def RET : InstPTX<(outs), (ins), "ret", [(PTXret)]>;