1 //===-- PTXIntrinsicInstrInfo.td - Defines PTX intrinsics --*- tablegen -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines all of the PTX-specific intrinsic instructions.
12 //===----------------------------------------------------------------------===//
14 // PTX Special Purpose Register Accessor Intrinsics
16 class PTX_READ_SPECIAL_REGISTER_R64<string regname, Intrinsic intop>
17 : InstPTX<(outs RegI64:$d), (ins),
18 !strconcat("mov.u64\t$d, %", regname),
19 [(set RegI64:$d, (intop))]>;
21 class PTX_READ_SPECIAL_REGISTER_R32<string regname, Intrinsic intop>
22 : InstPTX<(outs RegI32:$d), (ins),
23 !strconcat("mov.u32\t$d, %", regname),
24 [(set RegI32:$d, (intop))]>;
26 // TODO Add read vector-version of special registers
28 //def PTX_READ_TID_R64 : PTX_READ_SPECIAL_REGISTER_R64<"tid",
29 // int_ptx_read_tid_r64>;
30 def PTX_READ_TID_X : PTX_READ_SPECIAL_REGISTER_R32<"tid.x",
32 def PTX_READ_TID_Y : PTX_READ_SPECIAL_REGISTER_R32<"tid.y",
34 def PTX_READ_TID_Z : PTX_READ_SPECIAL_REGISTER_R32<"tid.z",
36 def PTX_READ_TID_W : PTX_READ_SPECIAL_REGISTER_R32<"tid.w",
39 //def PTX_READ_NTID_R64 : PTX_READ_SPECIAL_REGISTER_R64<"ntid",
40 // int_ptx_read_ntid_r64>;
41 def PTX_READ_NTID_X : PTX_READ_SPECIAL_REGISTER_R32<"ntid.x",
43 def PTX_READ_NTID_Y : PTX_READ_SPECIAL_REGISTER_R32<"ntid.y",
45 def PTX_READ_NTID_Z : PTX_READ_SPECIAL_REGISTER_R32<"ntid.z",
47 def PTX_READ_NTID_W : PTX_READ_SPECIAL_REGISTER_R32<"ntid.w",
50 def PTX_READ_LANEID : PTX_READ_SPECIAL_REGISTER_R32<"laneid",
52 def PTX_READ_WARPID : PTX_READ_SPECIAL_REGISTER_R32<"warpid",
54 def PTX_READ_NWARPID : PTX_READ_SPECIAL_REGISTER_R32<"nwarpid",
55 int_ptx_read_nwarpid>;
57 //def PTX_READ_CTAID_R64 :
58 //PTX_READ_SPECIAL_REGISTER_R64<"ctaid", int_ptx_read_ctaid_r64>;
59 def PTX_READ_CTAID_X : PTX_READ_SPECIAL_REGISTER_R32<"ctaid.x",
60 int_ptx_read_ctaid_x>;
61 def PTX_READ_CTAID_Y : PTX_READ_SPECIAL_REGISTER_R32<"ctaid.y",
62 int_ptx_read_ctaid_y>;
63 def PTX_READ_CTAID_Z : PTX_READ_SPECIAL_REGISTER_R32<"ctaid.z",
64 int_ptx_read_ctaid_z>;
65 def PTX_READ_CTAID_W : PTX_READ_SPECIAL_REGISTER_R32<"ctaid.w",
66 int_ptx_read_ctaid_w>;
68 //def PTX_READ_NCTAID_R64 :
69 //PTX_READ_SPECIAL_REGISTER_R64<"nctaid", int_ptx_read_nctaid_r64>;
70 def PTX_READ_NCTAID_X : PTX_READ_SPECIAL_REGISTER_R32<"nctaid.x",
71 int_ptx_read_nctaid_x>;
72 def PTX_READ_NCTAID_Y : PTX_READ_SPECIAL_REGISTER_R32<"nctaid.y",
73 int_ptx_read_nctaid_y>;
74 def PTX_READ_NCTAID_Z : PTX_READ_SPECIAL_REGISTER_R32<"nctaid.z",
75 int_ptx_read_nctaid_z>;
76 def PTX_READ_NCTAID_W : PTX_READ_SPECIAL_REGISTER_R32<"nctaid.w",
77 int_ptx_read_nctaid_w>;
79 def PTX_READ_SMID : PTX_READ_SPECIAL_REGISTER_R32<"smid",
81 def PTX_READ_NSMID : PTX_READ_SPECIAL_REGISTER_R32<"nsmid",
83 def PTX_READ_GRIDID : PTX_READ_SPECIAL_REGISTER_R32<"gridid",
86 def PTX_READ_LANEMASK_EQ
87 : PTX_READ_SPECIAL_REGISTER_R32<"lanemask_eq", int_ptx_read_lanemask_eq>;
88 def PTX_READ_LANEMASK_LE
89 : PTX_READ_SPECIAL_REGISTER_R32<"lanemask_le", int_ptx_read_lanemask_le>;
90 def PTX_READ_LANEMASK_LT
91 : PTX_READ_SPECIAL_REGISTER_R32<"lanemask_lt", int_ptx_read_lanemask_lt>;
92 def PTX_READ_LANEMASK_GE
93 : PTX_READ_SPECIAL_REGISTER_R32<"lanemask_ge", int_ptx_read_lanemask_ge>;
94 def PTX_READ_LANEMASK_GT
95 : PTX_READ_SPECIAL_REGISTER_R32<"lanemask_gt", int_ptx_read_lanemask_gt>;
98 : PTX_READ_SPECIAL_REGISTER_R32<"clock", int_ptx_read_clock>;
100 : PTX_READ_SPECIAL_REGISTER_R64<"clock64", int_ptx_read_clock64>;
102 def PTX_READ_PM0 : PTX_READ_SPECIAL_REGISTER_R32<"pm0", int_ptx_read_pm0>;
103 def PTX_READ_PM1 : PTX_READ_SPECIAL_REGISTER_R32<"pm1", int_ptx_read_pm1>;
104 def PTX_READ_PM2 : PTX_READ_SPECIAL_REGISTER_R32<"pm2", int_ptx_read_pm2>;
105 def PTX_READ_PM3 : PTX_READ_SPECIAL_REGISTER_R32<"pm3", int_ptx_read_pm3>;
107 // PTX Parallel Synchronization and Communication Intrinsics
109 def PTX_BAR_SYNC : InstPTX<(outs), (ins i32imm:$i), "bar.sync\t$i",
110 [(int_ptx_bar_sync imm:$i)]>;