1 //===-- PPCInstPrinter.cpp - Convert PPC MCInst to assembly syntax --------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This class prints an PPC MCInst to a .s file.
12 //===----------------------------------------------------------------------===//
14 #define DEBUG_TYPE "asm-printer"
15 #include "PPCInstPrinter.h"
16 #include "MCTargetDesc/PPCBaseInfo.h"
17 #include "MCTargetDesc/PPCPredicates.h"
18 #include "llvm/MC/MCExpr.h"
19 #include "llvm/MC/MCInst.h"
20 #include "llvm/Support/raw_ostream.h"
23 #define GET_INSTRUCTION_NAME
24 #include "PPCGenAsmWriter.inc"
26 StringRef PPCInstPrinter::getOpcodeName(unsigned Opcode) const {
27 return getInstructionName(Opcode);
30 void PPCInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
31 OS << getRegisterName(RegNo);
34 void PPCInstPrinter::printInst(const MCInst *MI, raw_ostream &O) {
35 // Check for slwi/srwi mnemonics.
36 if (MI->getOpcode() == PPC::RLWINM) {
37 unsigned char SH = MI->getOperand(2).getImm();
38 unsigned char MB = MI->getOperand(3).getImm();
39 unsigned char ME = MI->getOperand(4).getImm();
40 bool useSubstituteMnemonic = false;
41 if (SH <= 31 && MB == 0 && ME == (31-SH)) {
42 O << "\tslwi "; useSubstituteMnemonic = true;
44 if (SH <= 31 && MB == (32-SH) && ME == 31) {
45 O << "\tsrwi "; useSubstituteMnemonic = true;
48 if (useSubstituteMnemonic) {
49 printOperand(MI, 0, O);
51 printOperand(MI, 1, O);
52 O << ", " << (unsigned int)SH;
57 if ((MI->getOpcode() == PPC::OR || MI->getOpcode() == PPC::OR8) &&
58 MI->getOperand(1).getReg() == MI->getOperand(2).getReg()) {
60 printOperand(MI, 0, O);
62 printOperand(MI, 1, O);
66 if (MI->getOpcode() == PPC::RLDICR) {
67 unsigned char SH = MI->getOperand(2).getImm();
68 unsigned char ME = MI->getOperand(3).getImm();
69 // rldicr RA, RS, SH, 63-SH == sldi RA, RS, SH
72 printOperand(MI, 0, O);
74 printOperand(MI, 1, O);
75 O << ", " << (unsigned int)SH;
80 printInstruction(MI, O);
84 void PPCInstPrinter::printPredicateOperand(const MCInst *MI, unsigned OpNo,
86 const char *Modifier) {
87 assert(Modifier && "Must specify 'cc' or 'reg' as predicate op modifier!");
88 unsigned Code = MI->getOperand(OpNo).getImm();
89 if (StringRef(Modifier) == "cc") {
90 switch ((PPC::Predicate)Code) {
91 default: assert(0 && "Invalid predicate");
92 case PPC::PRED_ALWAYS: return; // Don't print anything for always.
93 case PPC::PRED_LT: O << "lt"; return;
94 case PPC::PRED_LE: O << "le"; return;
95 case PPC::PRED_EQ: O << "eq"; return;
96 case PPC::PRED_GE: O << "ge"; return;
97 case PPC::PRED_GT: O << "gt"; return;
98 case PPC::PRED_NE: O << "ne"; return;
99 case PPC::PRED_UN: O << "un"; return;
100 case PPC::PRED_NU: O << "nu"; return;
104 assert(StringRef(Modifier) == "reg" &&
105 "Need to specify 'cc' or 'reg' as predicate op modifier!");
106 // Don't print the register for 'always'.
107 if (Code == PPC::PRED_ALWAYS) return;
108 printOperand(MI, OpNo+1, O);
111 void PPCInstPrinter::printS5ImmOperand(const MCInst *MI, unsigned OpNo,
113 char Value = MI->getOperand(OpNo).getImm();
114 Value = (Value << (32-5)) >> (32-5);
118 void PPCInstPrinter::printU5ImmOperand(const MCInst *MI, unsigned OpNo,
120 unsigned char Value = MI->getOperand(OpNo).getImm();
121 assert(Value <= 31 && "Invalid u5imm argument!");
122 O << (unsigned int)Value;
125 void PPCInstPrinter::printU6ImmOperand(const MCInst *MI, unsigned OpNo,
127 unsigned char Value = MI->getOperand(OpNo).getImm();
128 assert(Value <= 63 && "Invalid u6imm argument!");
129 O << (unsigned int)Value;
132 void PPCInstPrinter::printS16ImmOperand(const MCInst *MI, unsigned OpNo,
134 O << (short)MI->getOperand(OpNo).getImm();
137 void PPCInstPrinter::printU16ImmOperand(const MCInst *MI, unsigned OpNo,
139 O << (unsigned short)MI->getOperand(OpNo).getImm();
142 void PPCInstPrinter::printS16X4ImmOperand(const MCInst *MI, unsigned OpNo,
144 if (MI->getOperand(OpNo).isImm())
145 O << (short)(MI->getOperand(OpNo).getImm()*4);
147 printOperand(MI, OpNo, O);
150 void PPCInstPrinter::printBranchOperand(const MCInst *MI, unsigned OpNo,
152 if (!MI->getOperand(OpNo).isImm())
153 return printOperand(MI, OpNo, O);
155 // Branches can take an immediate operand. This is used by the branch
156 // selection pass to print $+8, an eight byte displacement from the PC.
158 printAbsAddrOperand(MI, OpNo, O);
161 void PPCInstPrinter::printAbsAddrOperand(const MCInst *MI, unsigned OpNo,
163 O << (int)MI->getOperand(OpNo).getImm()*4;
167 void PPCInstPrinter::printcrbitm(const MCInst *MI, unsigned OpNo,
169 unsigned CCReg = MI->getOperand(OpNo).getReg();
172 default: assert(0 && "Unknown CR register");
173 case PPC::CR0: RegNo = 0; break;
174 case PPC::CR1: RegNo = 1; break;
175 case PPC::CR2: RegNo = 2; break;
176 case PPC::CR3: RegNo = 3; break;
177 case PPC::CR4: RegNo = 4; break;
178 case PPC::CR5: RegNo = 5; break;
179 case PPC::CR6: RegNo = 6; break;
180 case PPC::CR7: RegNo = 7; break;
182 O << (0x80 >> RegNo);
185 void PPCInstPrinter::printMemRegImm(const MCInst *MI, unsigned OpNo,
187 printSymbolLo(MI, OpNo, O);
189 if (MI->getOperand(OpNo+1).getReg() == PPC::R0)
192 printOperand(MI, OpNo+1, O);
196 void PPCInstPrinter::printMemRegImmShifted(const MCInst *MI, unsigned OpNo,
198 if (MI->getOperand(OpNo).isImm())
199 printS16X4ImmOperand(MI, OpNo, O);
201 printSymbolLo(MI, OpNo, O);
204 if (MI->getOperand(OpNo+1).getReg() == PPC::R0)
207 printOperand(MI, OpNo+1, O);
212 void PPCInstPrinter::printMemRegReg(const MCInst *MI, unsigned OpNo,
214 // When used as the base register, r0 reads constant zero rather than
215 // the value contained in the register. For this reason, the darwin
216 // assembler requires that we print r0 as 0 (no r) when used as the base.
217 if (MI->getOperand(OpNo).getReg() == PPC::R0)
220 printOperand(MI, OpNo, O);
222 printOperand(MI, OpNo+1, O);
227 /// stripRegisterPrefix - This method strips the character prefix from a
228 /// register name so that only the number is left. Used by for linux asm.
229 static const char *stripRegisterPrefix(const char *RegName) {
230 switch (RegName[0]) {
233 case 'v': return RegName + 1;
234 case 'c': if (RegName[1] == 'r') return RegName + 2;
240 void PPCInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
242 const MCOperand &Op = MI->getOperand(OpNo);
244 const char *RegName = getRegisterName(Op.getReg());
245 // The linux and AIX assembler does not take register prefixes.
246 if (!isDarwinSyntax())
247 RegName = stripRegisterPrefix(RegName);
258 assert(Op.isExpr() && "unknown operand kind in printOperand");
262 void PPCInstPrinter::printSymbolLo(const MCInst *MI, unsigned OpNo,
264 if (MI->getOperand(OpNo).isImm())
265 return printS16ImmOperand(MI, OpNo, O);
267 // FIXME: This is a terrible hack because we can't encode lo16() as an operand
268 // flag of a subtraction. See the FIXME in GetSymbolRef in PPCMCInstLower.
269 if (MI->getOperand(OpNo).isExpr() &&
270 isa<MCBinaryExpr>(MI->getOperand(OpNo).getExpr())) {
272 printOperand(MI, OpNo, O);
275 printOperand(MI, OpNo, O);
279 void PPCInstPrinter::printSymbolHi(const MCInst *MI, unsigned OpNo,
281 if (MI->getOperand(OpNo).isImm())
282 return printS16ImmOperand(MI, OpNo, O);
284 // FIXME: This is a terrible hack because we can't encode lo16() as an operand
285 // flag of a subtraction. See the FIXME in GetSymbolRef in PPCMCInstLower.
286 if (MI->getOperand(OpNo).isExpr() &&
287 isa<MCBinaryExpr>(MI->getOperand(OpNo).getExpr())) {
289 printOperand(MI, OpNo, O);
292 printOperand(MI, OpNo, O);