1 //===-- PPCInstPrinter.cpp - Convert PPC MCInst to assembly syntax --------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This class prints an PPC MCInst to a .s file.
12 //===----------------------------------------------------------------------===//
14 #define DEBUG_TYPE "asm-printer"
15 #include "PPCInstPrinter.h"
16 #include "PPCPredicates.h"
17 #include "llvm/MC/MCExpr.h"
18 #include "llvm/MC/MCInst.h"
19 #include "llvm/Support/raw_ostream.h"
22 #define GET_INSTRUCTION_NAME
23 #include "PPCGenAsmWriter.inc"
25 StringRef PPCInstPrinter::getOpcodeName(unsigned Opcode) const {
26 return getInstructionName(Opcode);
30 void PPCInstPrinter::printInst(const MCInst *MI, raw_ostream &O) {
31 // Check for slwi/srwi mnemonics.
32 if (MI->getOpcode() == PPC::RLWINM) {
33 unsigned char SH = MI->getOperand(2).getImm();
34 unsigned char MB = MI->getOperand(3).getImm();
35 unsigned char ME = MI->getOperand(4).getImm();
36 bool useSubstituteMnemonic = false;
37 if (SH <= 31 && MB == 0 && ME == (31-SH)) {
38 O << "\tslwi "; useSubstituteMnemonic = true;
40 if (SH <= 31 && MB == (32-SH) && ME == 31) {
41 O << "\tsrwi "; useSubstituteMnemonic = true;
44 if (useSubstituteMnemonic) {
45 printOperand(MI, 0, O);
47 printOperand(MI, 1, O);
48 O << ", " << (unsigned int)SH;
53 if ((MI->getOpcode() == PPC::OR || MI->getOpcode() == PPC::OR8) &&
54 MI->getOperand(1).getReg() == MI->getOperand(2).getReg()) {
56 printOperand(MI, 0, O);
58 printOperand(MI, 1, O);
62 if (MI->getOpcode() == PPC::RLDICR) {
63 unsigned char SH = MI->getOperand(2).getImm();
64 unsigned char ME = MI->getOperand(3).getImm();
65 // rldicr RA, RS, SH, 63-SH == sldi RA, RS, SH
68 printOperand(MI, 0, O);
70 printOperand(MI, 1, O);
71 O << ", " << (unsigned int)SH;
76 printInstruction(MI, O);
80 void PPCInstPrinter::printPredicateOperand(const MCInst *MI, unsigned OpNo,
82 const char *Modifier) {
83 assert(Modifier && "Must specify 'cc' or 'reg' as predicate op modifier!");
84 unsigned Code = MI->getOperand(OpNo).getImm();
85 if (StringRef(Modifier) == "cc") {
86 switch ((PPC::Predicate)Code) {
87 default: assert(0 && "Invalid predicate");
88 case PPC::PRED_ALWAYS: return; // Don't print anything for always.
89 case PPC::PRED_LT: O << "lt"; return;
90 case PPC::PRED_LE: O << "le"; return;
91 case PPC::PRED_EQ: O << "eq"; return;
92 case PPC::PRED_GE: O << "ge"; return;
93 case PPC::PRED_GT: O << "gt"; return;
94 case PPC::PRED_NE: O << "ne"; return;
95 case PPC::PRED_UN: O << "un"; return;
96 case PPC::PRED_NU: O << "nu"; return;
100 assert(StringRef(Modifier) == "reg" &&
101 "Need to specify 'cc' or 'reg' as predicate op modifier!");
102 // Don't print the register for 'always'.
103 if (Code == PPC::PRED_ALWAYS) return;
104 printOperand(MI, OpNo+1, O);
107 void PPCInstPrinter::printS5ImmOperand(const MCInst *MI, unsigned OpNo,
109 char Value = MI->getOperand(OpNo).getImm();
110 Value = (Value << (32-5)) >> (32-5);
114 void PPCInstPrinter::printU5ImmOperand(const MCInst *MI, unsigned OpNo,
116 unsigned char Value = MI->getOperand(OpNo).getImm();
117 assert(Value <= 31 && "Invalid u5imm argument!");
118 O << (unsigned int)Value;
121 void PPCInstPrinter::printU6ImmOperand(const MCInst *MI, unsigned OpNo,
123 unsigned char Value = MI->getOperand(OpNo).getImm();
124 assert(Value <= 63 && "Invalid u6imm argument!");
125 O << (unsigned int)Value;
128 void PPCInstPrinter::printS16ImmOperand(const MCInst *MI, unsigned OpNo,
130 O << (short)MI->getOperand(OpNo).getImm();
133 void PPCInstPrinter::printU16ImmOperand(const MCInst *MI, unsigned OpNo,
135 O << (unsigned short)MI->getOperand(OpNo).getImm();
138 void PPCInstPrinter::printS16X4ImmOperand(const MCInst *MI, unsigned OpNo,
140 if (MI->getOperand(OpNo).isImm())
141 O << (short)(MI->getOperand(OpNo).getImm()*4);
143 printOperand(MI, OpNo, O);
146 void PPCInstPrinter::printBranchOperand(const MCInst *MI, unsigned OpNo,
148 if (!MI->getOperand(OpNo).isImm())
149 return printOperand(MI, OpNo, O);
151 // Branches can take an immediate operand. This is used by the branch
152 // selection pass to print $+8, an eight byte displacement from the PC.
154 printAbsAddrOperand(MI, OpNo, O);
157 void PPCInstPrinter::printAbsAddrOperand(const MCInst *MI, unsigned OpNo,
159 O << (int)MI->getOperand(OpNo).getImm()*4;
163 void PPCInstPrinter::printcrbitm(const MCInst *MI, unsigned OpNo,
165 unsigned CCReg = MI->getOperand(OpNo).getReg();
168 default: assert(0 && "Unknown CR register");
169 case PPC::CR0: RegNo = 0; break;
170 case PPC::CR1: RegNo = 1; break;
171 case PPC::CR2: RegNo = 2; break;
172 case PPC::CR3: RegNo = 3; break;
173 case PPC::CR4: RegNo = 4; break;
174 case PPC::CR5: RegNo = 5; break;
175 case PPC::CR6: RegNo = 6; break;
176 case PPC::CR7: RegNo = 7; break;
178 O << (0x80 >> RegNo);
181 void PPCInstPrinter::printMemRegImm(const MCInst *MI, unsigned OpNo,
183 printSymbolLo(MI, OpNo, O);
185 if (MI->getOperand(OpNo+1).getReg() == PPC::R0)
188 printOperand(MI, OpNo+1, O);
192 void PPCInstPrinter::printMemRegImmShifted(const MCInst *MI, unsigned OpNo,
194 if (MI->getOperand(OpNo).isImm())
195 printS16X4ImmOperand(MI, OpNo, O);
197 printSymbolLo(MI, OpNo, O);
200 if (MI->getOperand(OpNo+1).getReg() == PPC::R0)
203 printOperand(MI, OpNo+1, O);
208 void PPCInstPrinter::printMemRegReg(const MCInst *MI, unsigned OpNo,
210 // When used as the base register, r0 reads constant zero rather than
211 // the value contained in the register. For this reason, the darwin
212 // assembler requires that we print r0 as 0 (no r) when used as the base.
213 if (MI->getOperand(OpNo).getReg() == PPC::R0)
216 printOperand(MI, OpNo, O);
218 printOperand(MI, OpNo+1, O);
223 /// stripRegisterPrefix - This method strips the character prefix from a
224 /// register name so that only the number is left. Used by for linux asm.
225 const char *stripRegisterPrefix(const char *RegName) {
226 switch (RegName[0]) {
229 case 'v': return RegName + 1;
230 case 'c': if (RegName[1] == 'r') return RegName + 2;
236 void PPCInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
238 const MCOperand &Op = MI->getOperand(OpNo);
240 const char *RegName = getRegisterName(Op.getReg());
241 // The linux and AIX assembler does not take register prefixes.
242 if (!isDarwinSyntax())
243 RegName = stripRegisterPrefix(RegName);
254 assert(Op.isExpr() && "unknown operand kind in printOperand");
258 void PPCInstPrinter::printSymbolLo(const MCInst *MI, unsigned OpNo,
260 if (MI->getOperand(OpNo).isImm())
261 return printS16ImmOperand(MI, OpNo, O);
263 // FIXME: This is a terrible hack because we can't encode lo16() as an operand
264 // flag of a subtraction. See the FIXME in GetSymbolRef in PPCMCInstLower.
265 if (MI->getOperand(OpNo).isExpr() &&
266 isa<MCBinaryExpr>(MI->getOperand(OpNo).getExpr())) {
268 printOperand(MI, OpNo, O);
271 printOperand(MI, OpNo, O);
275 void PPCInstPrinter::printSymbolHi(const MCInst *MI, unsigned OpNo,
277 if (MI->getOperand(OpNo).isImm())
278 return printS16ImmOperand(MI, OpNo, O);
280 // FIXME: This is a terrible hack because we can't encode lo16() as an operand
281 // flag of a subtraction. See the FIXME in GetSymbolRef in PPCMCInstLower.
282 if (MI->getOperand(OpNo).isExpr() &&
283 isa<MCBinaryExpr>(MI->getOperand(OpNo).getExpr())) {
285 printOperand(MI, OpNo, O);
288 printOperand(MI, OpNo, O);