1 //===-- PPCAsmBackend.cpp - PPC Assembler Backend -------------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 #include "MCTargetDesc/PPCMCTargetDesc.h"
11 #include "MCTargetDesc/PPCFixupKinds.h"
12 #include "llvm/MC/MCAsmBackend.h"
13 #include "llvm/MC/MCELFObjectWriter.h"
14 #include "llvm/MC/MCFixupKindInfo.h"
15 #include "llvm/MC/MCMachObjectWriter.h"
16 #include "llvm/MC/MCObjectWriter.h"
17 #include "llvm/MC/MCSectionMachO.h"
18 #include "llvm/MC/MCValue.h"
19 #include "llvm/Object/MachOFormat.h"
20 #include "llvm/Support/ELF.h"
21 #include "llvm/Support/ErrorHandling.h"
22 #include "llvm/Support/TargetRegistry.h"
25 static unsigned adjustFixupValue(unsigned Kind, uint64_t Value) {
28 llvm_unreachable("Unknown fixup kind!");
33 case PPC::fixup_ppc_tlsreg:
34 case PPC::fixup_ppc_nofixup:
36 case PPC::fixup_ppc_brcond14:
37 return Value & 0xfffc;
38 case PPC::fixup_ppc_br24:
39 return Value & 0x3fffffc;
41 case PPC::fixup_ppc_hi16:
42 return (Value >> 16) & 0xffff;
44 case PPC::fixup_ppc_ha16:
45 return ((Value >> 16) + ((Value & 0x8000) ? 1 : 0)) & 0xffff;
46 case PPC::fixup_ppc_lo16:
47 return Value & 0xffff;
48 case PPC::fixup_ppc_lo16_ds:
49 return Value & 0xfffc;
54 class PPCMachObjectWriter : public MCMachObjectTargetWriter {
56 PPCMachObjectWriter(bool Is64Bit, uint32_t CPUType,
58 : MCMachObjectTargetWriter(Is64Bit, CPUType, CPUSubtype) {}
60 void RecordRelocation(MachObjectWriter *Writer,
61 const MCAssembler &Asm, const MCAsmLayout &Layout,
62 const MCFragment *Fragment, const MCFixup &Fixup,
63 MCValue Target, uint64_t &FixedValue) {
64 llvm_unreachable("Relocation emission for MachO/PPC unimplemented!");
68 class PPCAsmBackend : public MCAsmBackend {
69 const Target &TheTarget;
71 PPCAsmBackend(const Target &T) : MCAsmBackend(), TheTarget(T) {}
73 unsigned getNumFixupKinds() const { return PPC::NumTargetFixupKinds; }
75 const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const {
76 const static MCFixupKindInfo Infos[PPC::NumTargetFixupKinds] = {
77 // name offset bits flags
78 { "fixup_ppc_br24", 6, 24, MCFixupKindInfo::FKF_IsPCRel },
79 { "fixup_ppc_brcond14", 16, 14, MCFixupKindInfo::FKF_IsPCRel },
80 { "fixup_ppc_lo16", 16, 16, 0 },
81 { "fixup_ppc_ha16", 16, 16, 0 },
82 { "fixup_ppc_lo16_ds", 16, 14, 0 },
83 { "fixup_ppc_tlsreg", 0, 0, 0 },
84 { "fixup_ppc_nofixup", 0, 0, 0 }
87 if (Kind < FirstTargetFixupKind)
88 return MCAsmBackend::getFixupKindInfo(Kind);
90 assert(unsigned(Kind - FirstTargetFixupKind) < getNumFixupKinds() &&
92 return Infos[Kind - FirstTargetFixupKind];
95 void applyFixup(const MCFixup &Fixup, char *Data, unsigned DataSize,
96 uint64_t Value) const {
97 Value = adjustFixupValue(Fixup.getKind(), Value);
98 if (!Value) return; // Doesn't change encoding.
100 unsigned Offset = Fixup.getOffset();
102 // For each byte of the fragment that the fixup touches, mask in the bits
103 // from the fixup value. The Value has been "split up" into the appropriate
105 for (unsigned i = 0; i != 4; ++i)
106 Data[Offset + i] |= uint8_t((Value >> ((4 - i - 1)*8)) & 0xff);
109 bool mayNeedRelaxation(const MCInst &Inst) const {
114 bool fixupNeedsRelaxation(const MCFixup &Fixup,
116 const MCRelaxableFragment *DF,
117 const MCAsmLayout &Layout) const {
119 llvm_unreachable("relaxInstruction() unimplemented");
123 void relaxInstruction(const MCInst &Inst, MCInst &Res) const {
125 llvm_unreachable("relaxInstruction() unimplemented");
128 bool writeNopData(uint64_t Count, MCObjectWriter *OW) const {
129 // FIXME: Zero fill for now. That's not right, but at least will get the
130 // section size right.
131 for (uint64_t i = 0; i != Count; ++i)
136 unsigned getPointerSize() const {
137 StringRef Name = TheTarget.getName();
138 if (Name == "ppc64") return 8;
139 assert(Name == "ppc32" && "Unknown target name!");
143 } // end anonymous namespace
146 // FIXME: This should be in a separate file.
148 class DarwinPPCAsmBackend : public PPCAsmBackend {
150 DarwinPPCAsmBackend(const Target &T) : PPCAsmBackend(T) { }
152 MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
153 bool is64 = getPointerSize() == 8;
154 return createMachObjectWriter(new PPCMachObjectWriter(
156 (is64 ? object::mach::CTM_PowerPC64 :
157 object::mach::CTM_PowerPC),
158 object::mach::CSPPC_ALL),
159 OS, /*IsLittleEndian=*/false);
162 virtual bool doesSectionRequireSymbols(const MCSection &Section) const {
167 class ELFPPCAsmBackend : public PPCAsmBackend {
170 ELFPPCAsmBackend(const Target &T, uint8_t OSABI) :
171 PPCAsmBackend(T), OSABI(OSABI) { }
174 MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
175 bool is64 = getPointerSize() == 8;
176 return createPPCELFObjectWriter(OS, is64, OSABI);
179 virtual bool doesSectionRequireSymbols(const MCSection &Section) const {
184 } // end anonymous namespace
189 MCAsmBackend *llvm::createPPCAsmBackend(const Target &T, StringRef TT, StringRef CPU) {
190 if (Triple(TT).isOSDarwin())
191 return new DarwinPPCAsmBackend(T);
193 uint8_t OSABI = MCELFObjectTargetWriter::getOSABI(Triple(TT).getOS());
194 return new ELFPPCAsmBackend(T, OSABI);