lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp

   1 //===-- PPCMCTargetDesc.cpp - PowerPC Target Descriptions -----------------===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file provides PowerPC specific target descriptions.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14 #include "PPCMCTargetDesc.h"
  15 #include "InstPrinter/PPCInstPrinter.h"
  16 #include "PPCMCAsmInfo.h"
  17 #include "PPCTargetStreamer.h"
  18 #include "llvm/MC/MCCodeGenInfo.h"
  19 #include "llvm/MC/MCInstrInfo.h"
  20 #include "llvm/MC/MCRegisterInfo.h"
  21 #include "llvm/MC/MCStreamer.h"
  22 #include "llvm/MC/MCSubtargetInfo.h"
  23 #include "llvm/MC/MCSymbol.h"
  24 #include "llvm/MC/MachineLocation.h"
  25 #include "llvm/Support/ErrorHandling.h"
  26 #include "llvm/Support/FormattedStream.h"
  27 #include "llvm/Support/TargetRegistry.h"
  28
  29 #define GET_INSTRINFO_MC_DESC
  30 #include "PPCGenInstrInfo.inc"
  31
  32 #define GET_SUBTARGETINFO_MC_DESC
  33 #include "PPCGenSubtargetInfo.inc"
  34
  35 #define GET_REGINFO_MC_DESC
  36 #include "PPCGenRegisterInfo.inc"
  37
  38 using namespace llvm;
  39
  40 // Pin the vtable to this file.
  41 PPCTargetStreamer::~PPCTargetStreamer() {}
  42 PPCTargetStreamer::PPCTargetStreamer(MCStreamer &S) : MCTargetStreamer(S) {}
  43
  44 static MCInstrInfo *createPPCMCInstrInfo() {
  45   MCInstrInfo *X = new MCInstrInfo();
  46   InitPPCMCInstrInfo(X);
  47   return X;
  48 }
  49
  50 static MCRegisterInfo *createPPCMCRegisterInfo(StringRef TT) {
  51   Triple TheTriple(TT);
  52   bool isPPC64 = (TheTriple.getArch() == Triple::ppc64 ||
  53                   TheTriple.getArch() == Triple::ppc64le);
  54   unsigned Flavour = isPPC64 ? 0 : 1;
  55   unsigned RA = isPPC64 ? PPC::LR8 : PPC::LR;
  56
  57   MCRegisterInfo *X = new MCRegisterInfo();
  58   InitPPCMCRegisterInfo(X, RA, Flavour, Flavour);
  59   return X;
  60 }
  61
  62 static MCSubtargetInfo *createPPCMCSubtargetInfo(StringRef TT, StringRef CPU,
  63                                                  StringRef FS) {
  64   MCSubtargetInfo *X = new MCSubtargetInfo();
  65   InitPPCMCSubtargetInfo(X, TT, CPU, FS);
  66   return X;
  67 }
  68
  69 static MCAsmInfo *createPPCMCAsmInfo(const MCRegisterInfo &MRI, StringRef TT) {
  70   Triple TheTriple(TT);
  71   bool isPPC64 = (TheTriple.getArch() == Triple::ppc64 ||
  72                   TheTriple.getArch() == Triple::ppc64le);
  73
  74   MCAsmInfo *MAI;
  75   if (TheTriple.isOSDarwin())
  76     MAI = new PPCMCAsmInfoDarwin(isPPC64, TheTriple);
  77   else
  78     MAI = new PPCLinuxMCAsmInfo(isPPC64);
  79
  80   // Initial state of the frame pointer is R1.
  81   unsigned Reg = isPPC64 ? PPC::X1 : PPC::R1;
  82   MCCFIInstruction Inst =
  83       MCCFIInstruction::createDefCfa(0, MRI.getDwarfRegNum(Reg, true), 0);
  84   MAI->addInitialFrameState(Inst);
  85
  86   return MAI;
  87 }
  88
  89 static MCCodeGenInfo *createPPCMCCodeGenInfo(StringRef TT, Reloc::Model RM,
  90                                              CodeModel::Model CM,
  91                                              CodeGenOpt::Level OL) {
  92   MCCodeGenInfo *X = new MCCodeGenInfo();
  93
  94   if (RM == Reloc::Default) {
  95     Triple T(TT);
  96     if (T.isOSDarwin())
  97       RM = Reloc::DynamicNoPIC;
  98     else
  99       RM = Reloc::Static;
 100   }
 101   if (CM == CodeModel::Default) {
 102     Triple T(TT);
 103     if (!T.isOSDarwin() &&
 104         (T.getArch() == Triple::ppc64 || T.getArch() == Triple::ppc64le))
 105       CM = CodeModel::Medium;
 106   }
 107   X->InitMCCodeGenInfo(RM, CM, OL);
 108   return X;
 109 }
 110
 111 namespace {
 112 class PPCTargetAsmStreamer : public PPCTargetStreamer {
 113   formatted_raw_ostream &OS;
 114
 115 public:
 116   PPCTargetAsmStreamer(MCStreamer &S, formatted_raw_ostream &OS)
 117       : PPCTargetStreamer(S), OS(OS) {}
 118   virtual void emitTCEntry(const MCSymbol &S) {
 119     OS << "\t.tc ";
 120     OS << S.getName();
 121     OS << "[TC],";
 122     OS << S.getName();
 123     OS << '\n';
 124   }
 125   virtual void emitMachine(StringRef CPU) {
 126     OS << "\t.machine " << CPU << '\n';
 127   }
 128 };
 129
 130 class PPCTargetELFStreamer : public PPCTargetStreamer {
 131 public:
 132   PPCTargetELFStreamer(MCStreamer &S) : PPCTargetStreamer(S) {}
 133   virtual void emitTCEntry(const MCSymbol &S) {
 134     // Creates a R_PPC64_TOC relocation
 135     Streamer.EmitSymbolValue(&S, 8);
 136   }
 137   virtual void emitMachine(StringRef CPU) {
 138     // FIXME: Is there anything to do in here or does this directive only
 139     // limit the parser?
 140   }
 141 };
 142 }
 143
 144 // This is duplicated code. Refactor this.
 145 static MCStreamer *createMCStreamer(const Target &T, StringRef TT,
 146                                     MCContext &Ctx, MCAsmBackend &MAB,
 147                                     raw_ostream &OS,
 148                                     MCCodeEmitter *Emitter,
 149                                     const MCSubtargetInfo &STI,
 150                                     bool RelaxAll,
 151                                     bool NoExecStack) {
 152   if (Triple(TT).isOSDarwin())
 153     return createMachOStreamer(Ctx, MAB, OS, Emitter, RelaxAll);
 154
 155   MCStreamer *S =
 156       createELFStreamer(Ctx, MAB, OS, Emitter, RelaxAll, NoExecStack);
 157   new PPCTargetELFStreamer(*S);
 158   return S;
 159 }
 160
 161 static MCStreamer *
 162 createMCAsmStreamer(MCContext &Ctx, formatted_raw_ostream &OS,
 163                     bool isVerboseAsm, bool useLoc, bool useCFI,
 164                     bool useDwarfDirectory, MCInstPrinter *InstPrint,
 165                     MCCodeEmitter *CE, MCAsmBackend *TAB, bool ShowInst) {
 166
 167   MCStreamer *S =
 168       llvm::createAsmStreamer(Ctx, OS, isVerboseAsm, useLoc, useCFI,
 169                               useDwarfDirectory, InstPrint, CE, TAB, ShowInst);
 170   new PPCTargetAsmStreamer(*S, OS);
 171   return S;
 172 }
 173
 174 static MCInstPrinter *createPPCMCInstPrinter(const Target &T,
 175                                              unsigned SyntaxVariant,
 176                                              const MCAsmInfo &MAI,
 177                                              const MCInstrInfo &MII,
 178                                              const MCRegisterInfo &MRI,
 179                                              const MCSubtargetInfo &STI) {
 180   bool isDarwin = Triple(STI.getTargetTriple()).isOSDarwin();
 181   return new PPCInstPrinter(MAI, MII, MRI, isDarwin);
 182 }
 183
 184 extern "C" void LLVMInitializePowerPCTargetMC() {
 185   // Register the MC asm info.
 186   RegisterMCAsmInfoFn C(ThePPC32Target, createPPCMCAsmInfo);
 187   RegisterMCAsmInfoFn D(ThePPC64Target, createPPCMCAsmInfo);
 188   RegisterMCAsmInfoFn E(ThePPC64LETarget, createPPCMCAsmInfo);
 189
 190   // Register the MC codegen info.
 191   TargetRegistry::RegisterMCCodeGenInfo(ThePPC32Target, createPPCMCCodeGenInfo);
 192   TargetRegistry::RegisterMCCodeGenInfo(ThePPC64Target, createPPCMCCodeGenInfo);
 193   TargetRegistry::RegisterMCCodeGenInfo(ThePPC64LETarget,
 194                                         createPPCMCCodeGenInfo);
 195
 196   // Register the MC instruction info.
 197   TargetRegistry::RegisterMCInstrInfo(ThePPC32Target, createPPCMCInstrInfo);
 198   TargetRegistry::RegisterMCInstrInfo(ThePPC64Target, createPPCMCInstrInfo);
 199   TargetRegistry::RegisterMCInstrInfo(ThePPC64LETarget,
 200                                       createPPCMCInstrInfo);
 201
 202   // Register the MC register info.
 203   TargetRegistry::RegisterMCRegInfo(ThePPC32Target, createPPCMCRegisterInfo);
 204   TargetRegistry::RegisterMCRegInfo(ThePPC64Target, createPPCMCRegisterInfo);
 205   TargetRegistry::RegisterMCRegInfo(ThePPC64LETarget, createPPCMCRegisterInfo);
 206
 207   // Register the MC subtarget info.
 208   TargetRegistry::RegisterMCSubtargetInfo(ThePPC32Target,
 209                                           createPPCMCSubtargetInfo);
 210   TargetRegistry::RegisterMCSubtargetInfo(ThePPC64Target,
 211                                           createPPCMCSubtargetInfo);
 212   TargetRegistry::RegisterMCSubtargetInfo(ThePPC64LETarget,
 213                                           createPPCMCSubtargetInfo);
 214
 215   // Register the MC Code Emitter
 216   TargetRegistry::RegisterMCCodeEmitter(ThePPC32Target, createPPCMCCodeEmitter);
 217   TargetRegistry::RegisterMCCodeEmitter(ThePPC64Target, createPPCMCCodeEmitter);
 218   TargetRegistry::RegisterMCCodeEmitter(ThePPC64LETarget,
 219                                         createPPCMCCodeEmitter);
 220
 221     // Register the asm backend.
 222   TargetRegistry::RegisterMCAsmBackend(ThePPC32Target, createPPCAsmBackend);
 223   TargetRegistry::RegisterMCAsmBackend(ThePPC64Target, createPPCAsmBackend);
 224   TargetRegistry::RegisterMCAsmBackend(ThePPC64LETarget, createPPCAsmBackend);
 225
 226   // Register the object streamer.
 227   TargetRegistry::RegisterMCObjectStreamer(ThePPC32Target, createMCStreamer);
 228   TargetRegistry::RegisterMCObjectStreamer(ThePPC64Target, createMCStreamer);
 229   TargetRegistry::RegisterMCObjectStreamer(ThePPC64LETarget, createMCStreamer);
 230
 231   // Register the asm streamer.
 232   TargetRegistry::RegisterAsmStreamer(ThePPC32Target, createMCAsmStreamer);
 233   TargetRegistry::RegisterAsmStreamer(ThePPC64Target, createMCAsmStreamer);
 234   TargetRegistry::RegisterAsmStreamer(ThePPC64LETarget, createMCAsmStreamer);
 235
 236   // Register the MCInstPrinter.
 237   TargetRegistry::RegisterMCInstPrinter(ThePPC32Target, createPPCMCInstPrinter);
 238   TargetRegistry::RegisterMCInstPrinter(ThePPC64Target, createPPCMCInstPrinter);
 239   TargetRegistry::RegisterMCInstPrinter(ThePPC64LETarget,
 240                                         createPPCMCInstPrinter);
 241 }