lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp

   1 //===-- PPCMCTargetDesc.cpp - PowerPC Target Descriptions -----------------===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file provides PowerPC specific target descriptions.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14 #include "PPCMCTargetDesc.h"
  15 #include "InstPrinter/PPCInstPrinter.h"
  16 #include "PPCMCAsmInfo.h"
  17 #include "llvm/MC/MCCodeGenInfo.h"
  18 #include "llvm/MC/MCInstrInfo.h"
  19 #include "llvm/MC/MCRegisterInfo.h"
  20 #include "llvm/MC/MCStreamer.h"
  21 #include "llvm/MC/MCSubtargetInfo.h"
  22 #include "llvm/MC/MachineLocation.h"
  23 #include "llvm/Support/ErrorHandling.h"
  24 #include "llvm/Support/TargetRegistry.h"
  25
  26 #define GET_INSTRINFO_MC_DESC
  27 #include "PPCGenInstrInfo.inc"
  28
  29 #define GET_SUBTARGETINFO_MC_DESC
  30 #include "PPCGenSubtargetInfo.inc"
  31
  32 #define GET_REGINFO_MC_DESC
  33 #include "PPCGenRegisterInfo.inc"
  34
  35 using namespace llvm;
  36
  37 static MCInstrInfo *createPPCMCInstrInfo() {
  38   MCInstrInfo *X = new MCInstrInfo();
  39   InitPPCMCInstrInfo(X);
  40   return X;
  41 }
  42
  43 static MCRegisterInfo *createPPCMCRegisterInfo(StringRef TT) {
  44   Triple TheTriple(TT);
  45   bool isPPC64 = (TheTriple.getArch() == Triple::ppc64 ||
  46                   TheTriple.getArch() == Triple::ppc64le);
  47   unsigned Flavour = isPPC64 ? 0 : 1;
  48   unsigned RA = isPPC64 ? PPC::LR8 : PPC::LR;
  49
  50   MCRegisterInfo *X = new MCRegisterInfo();
  51   InitPPCMCRegisterInfo(X, RA, Flavour, Flavour);
  52   return X;
  53 }
  54
  55 static MCSubtargetInfo *createPPCMCSubtargetInfo(StringRef TT, StringRef CPU,
  56                                                  StringRef FS) {
  57   MCSubtargetInfo *X = new MCSubtargetInfo();
  58   InitPPCMCSubtargetInfo(X, TT, CPU, FS);
  59   return X;
  60 }
  61
  62 static MCAsmInfo *createPPCMCAsmInfo(const MCRegisterInfo &MRI, StringRef TT) {
  63   Triple TheTriple(TT);
  64   bool isPPC64 = (TheTriple.getArch() == Triple::ppc64 ||
  65                   TheTriple.getArch() == Triple::ppc64le);
  66
  67   MCAsmInfo *MAI;
  68   if (TheTriple.isOSDarwin())
  69     MAI = new PPCMCAsmInfoDarwin(isPPC64);
  70   else
  71     MAI = new PPCLinuxMCAsmInfo(isPPC64);
  72
  73   // Initial state of the frame pointer is R1.
  74   unsigned Reg = isPPC64 ? PPC::X1 : PPC::R1;
  75   MCCFIInstruction Inst =
  76       MCCFIInstruction::createDefCfa(0, MRI.getDwarfRegNum(Reg, true), 0);
  77   MAI->addInitialFrameState(Inst);
  78
  79   return MAI;
  80 }
  81
  82 static MCCodeGenInfo *createPPCMCCodeGenInfo(StringRef TT, Reloc::Model RM,
  83                                              CodeModel::Model CM,
  84                                              CodeGenOpt::Level OL) {
  85   MCCodeGenInfo *X = new MCCodeGenInfo();
  86
  87   if (RM == Reloc::Default) {
  88     Triple T(TT);
  89     if (T.isOSDarwin())
  90       RM = Reloc::DynamicNoPIC;
  91     else
  92       RM = Reloc::Static;
  93   }
  94   if (CM == CodeModel::Default) {
  95     Triple T(TT);
  96     if (!T.isOSDarwin() &&
  97         (T.getArch() == Triple::ppc64 || T.getArch() == Triple::ppc64le))
  98       CM = CodeModel::Medium;
  99   }
 100   X->InitMCCodeGenInfo(RM, CM, OL);
 101   return X;
 102 }
 103
 104 // This is duplicated code. Refactor this.
 105 static MCStreamer *createMCStreamer(const Target &T, StringRef TT,
 106                                     MCContext &Ctx, MCAsmBackend &MAB,
 107                                     raw_ostream &OS,
 108                                     MCCodeEmitter *Emitter,
 109                                     bool RelaxAll,
 110                                     bool NoExecStack) {
 111   if (Triple(TT).isOSDarwin())
 112     return createMachOStreamer(Ctx, MAB, OS, Emitter, RelaxAll);
 113
 114   return createELFStreamer(Ctx, MAB, OS, Emitter, RelaxAll, NoExecStack);
 115 }
 116
 117 static MCInstPrinter *createPPCMCInstPrinter(const Target &T,
 118                                              unsigned SyntaxVariant,
 119                                              const MCAsmInfo &MAI,
 120                                              const MCInstrInfo &MII,
 121                                              const MCRegisterInfo &MRI,
 122                                              const MCSubtargetInfo &STI) {
 123   bool isDarwin = Triple(STI.getTargetTriple()).isOSDarwin();
 124   return new PPCInstPrinter(MAI, MII, MRI, isDarwin);
 125 }
 126
 127 extern "C" void LLVMInitializePowerPCTargetMC() {
 128   // Register the MC asm info.
 129   RegisterMCAsmInfoFn C(ThePPC32Target, createPPCMCAsmInfo);
 130   RegisterMCAsmInfoFn D(ThePPC64Target, createPPCMCAsmInfo);
 131   RegisterMCAsmInfoFn E(ThePPC64LETarget, createPPCMCAsmInfo);
 132
 133   // Register the MC codegen info.
 134   TargetRegistry::RegisterMCCodeGenInfo(ThePPC32Target, createPPCMCCodeGenInfo);
 135   TargetRegistry::RegisterMCCodeGenInfo(ThePPC64Target, createPPCMCCodeGenInfo);
 136   TargetRegistry::RegisterMCCodeGenInfo(ThePPC64LETarget,
 137                                         createPPCMCCodeGenInfo);
 138
 139   // Register the MC instruction info.
 140   TargetRegistry::RegisterMCInstrInfo(ThePPC32Target, createPPCMCInstrInfo);
 141   TargetRegistry::RegisterMCInstrInfo(ThePPC64Target, createPPCMCInstrInfo);
 142   TargetRegistry::RegisterMCInstrInfo(ThePPC64LETarget,
 143                                       createPPCMCInstrInfo);
 144
 145   // Register the MC register info.
 146   TargetRegistry::RegisterMCRegInfo(ThePPC32Target, createPPCMCRegisterInfo);
 147   TargetRegistry::RegisterMCRegInfo(ThePPC64Target, createPPCMCRegisterInfo);
 148   TargetRegistry::RegisterMCRegInfo(ThePPC64LETarget, createPPCMCRegisterInfo);
 149
 150   // Register the MC subtarget info.
 151   TargetRegistry::RegisterMCSubtargetInfo(ThePPC32Target,
 152                                           createPPCMCSubtargetInfo);
 153   TargetRegistry::RegisterMCSubtargetInfo(ThePPC64Target,
 154                                           createPPCMCSubtargetInfo);
 155   TargetRegistry::RegisterMCSubtargetInfo(ThePPC64LETarget,
 156                                           createPPCMCSubtargetInfo);
 157
 158   // Register the MC Code Emitter
 159   TargetRegistry::RegisterMCCodeEmitter(ThePPC32Target, createPPCMCCodeEmitter);
 160   TargetRegistry::RegisterMCCodeEmitter(ThePPC64Target, createPPCMCCodeEmitter);
 161   TargetRegistry::RegisterMCCodeEmitter(ThePPC64LETarget,
 162                                         createPPCMCCodeEmitter);
 163
 164     // Register the asm backend.
 165   TargetRegistry::RegisterMCAsmBackend(ThePPC32Target, createPPCAsmBackend);
 166   TargetRegistry::RegisterMCAsmBackend(ThePPC64Target, createPPCAsmBackend);
 167   TargetRegistry::RegisterMCAsmBackend(ThePPC64LETarget, createPPCAsmBackend);
 168
 169   // Register the object streamer.
 170   TargetRegistry::RegisterMCObjectStreamer(ThePPC32Target, createMCStreamer);
 171   TargetRegistry::RegisterMCObjectStreamer(ThePPC64Target, createMCStreamer);
 172   TargetRegistry::RegisterMCObjectStreamer(ThePPC64LETarget, createMCStreamer);
 173
 174   // Register the MCInstPrinter.
 175   TargetRegistry::RegisterMCInstPrinter(ThePPC32Target, createPPCMCInstPrinter);
 176   TargetRegistry::RegisterMCInstPrinter(ThePPC64Target, createPPCMCInstPrinter);
 177   TargetRegistry::RegisterMCInstPrinter(ThePPC64LETarget,
 178                                         createPPCMCInstPrinter);
 179 }