1 //===-- PPC.td - Describe the PowerPC Target Machine -------*- tablegen -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This is the top level entry point for the PowerPC target.
12 //===----------------------------------------------------------------------===//
14 // Get the target-independent interfaces which we are implementing.
16 include "llvm/Target/Target.td"
18 //===----------------------------------------------------------------------===//
19 // PowerPC Subtarget features.
22 //===----------------------------------------------------------------------===//
24 //===----------------------------------------------------------------------===//
26 def Directive440 : SubtargetFeature<"", "DarwinDirective", "PPC::DIR_440", "">;
27 def Directive601 : SubtargetFeature<"", "DarwinDirective", "PPC::DIR_601", "">;
28 def Directive602 : SubtargetFeature<"", "DarwinDirective", "PPC::DIR_602", "">;
29 def Directive603 : SubtargetFeature<"", "DarwinDirective", "PPC::DIR_603", "">;
30 def Directive604 : SubtargetFeature<"", "DarwinDirective", "PPC::DIR_603", "">;
31 def Directive620 : SubtargetFeature<"", "DarwinDirective", "PPC::DIR_603", "">;
32 def Directive7400: SubtargetFeature<"", "DarwinDirective", "PPC::DIR_7400", "">;
33 def Directive750 : SubtargetFeature<"", "DarwinDirective", "PPC::DIR_750", "">;
34 def Directive970 : SubtargetFeature<"", "DarwinDirective", "PPC::DIR_970", "">;
35 def Directive32 : SubtargetFeature<"", "DarwinDirective", "PPC::DIR_32", "">;
36 def Directive64 : SubtargetFeature<"", "DarwinDirective", "PPC::DIR_64", "">;
37 def DirectiveA2 : SubtargetFeature<"", "DarwinDirective", "PPC::DIR_A2", "">;
38 def DirectiveE500mc : SubtargetFeature<"", "DarwinDirective",
39 "PPC::DIR_E500mc", "">;
40 def DirectiveE5500 : SubtargetFeature<"", "DarwinDirective",
41 "PPC::DIR_E5500", "">;
42 def DirectivePwr6: SubtargetFeature<"", "DarwinDirective", "PPC::DIR_PWR6", "">;
43 def DirectivePwr7: SubtargetFeature<"", "DarwinDirective", "PPC::DIR_PWR7", "">;
45 def Feature64Bit : SubtargetFeature<"64bit","Has64BitSupport", "true",
46 "Enable 64-bit instructions">;
47 def Feature64BitRegs : SubtargetFeature<"64bitregs","Use64BitRegs", "true",
48 "Enable 64-bit registers usage for ppc32 [beta]">;
49 def FeatureAltivec : SubtargetFeature<"altivec","HasAltivec", "true",
50 "Enable Altivec instructions">;
51 def FeatureMFOCRF : SubtargetFeature<"mfocrf","HasMFOCRF", "true",
52 "Enable the MFOCRF instruction">;
53 def FeatureFSqrt : SubtargetFeature<"fsqrt","HasFSQRT", "true",
54 "Enable the fsqrt instruction">;
55 def FeatureSTFIWX : SubtargetFeature<"stfiwx","HasSTFIWX", "true",
56 "Enable the stfiwx instruction">;
57 def FeatureISEL : SubtargetFeature<"isel","HasISEL", "true",
58 "Enable the isel instruction">;
59 def FeatureBookE : SubtargetFeature<"booke", "IsBookE", "true",
60 "Enable Book E instructions">;
61 def FeatureQPX : SubtargetFeature<"qpx","HasQPX", "true",
62 "Enable QPX instructions">;
64 //===----------------------------------------------------------------------===//
65 // Register File Description
66 //===----------------------------------------------------------------------===//
68 include "PPCRegisterInfo.td"
69 include "PPCSchedule.td"
70 include "PPCInstrInfo.td"
72 //===----------------------------------------------------------------------===//
73 // PowerPC processors supported.
76 def : Processor<"generic", G3Itineraries, [Directive32]>;
77 def : Processor<"440", PPC440Itineraries, [Directive440, FeatureISEL,
79 def : Processor<"450", PPC440Itineraries, [Directive440, FeatureISEL,
81 def : Processor<"601", G3Itineraries, [Directive601]>;
82 def : Processor<"602", G3Itineraries, [Directive602]>;
83 def : Processor<"603", G3Itineraries, [Directive603]>;
84 def : Processor<"603e", G3Itineraries, [Directive603]>;
85 def : Processor<"603ev", G3Itineraries, [Directive603]>;
86 def : Processor<"604", G3Itineraries, [Directive604]>;
87 def : Processor<"604e", G3Itineraries, [Directive604]>;
88 def : Processor<"620", G3Itineraries, [Directive620]>;
89 def : Processor<"750", G4Itineraries, [Directive750]>;
90 def : Processor<"g3", G3Itineraries, [Directive750]>;
91 def : Processor<"7400", G4Itineraries, [Directive7400, FeatureAltivec]>;
92 def : Processor<"g4", G4Itineraries, [Directive7400, FeatureAltivec]>;
93 def : Processor<"7450", G4PlusItineraries, [Directive7400, FeatureAltivec]>;
94 def : Processor<"g4+", G4PlusItineraries, [Directive7400, FeatureAltivec]>;
95 def : Processor<"970", G5Itineraries,
96 [Directive970, FeatureAltivec,
97 FeatureMFOCRF, FeatureFSqrt, FeatureSTFIWX,
98 Feature64Bit /*, Feature64BitRegs */]>;
99 def : Processor<"g5", G5Itineraries,
100 [Directive970, FeatureAltivec,
101 FeatureMFOCRF, FeatureFSqrt, FeatureSTFIWX,
102 Feature64Bit /*, Feature64BitRegs */]>;
103 def : ProcessorModel<"e500mc", PPCE500mcModel,
104 [DirectiveE500mc, FeatureMFOCRF,
105 FeatureSTFIWX, FeatureBookE, FeatureISEL]>;
106 def : ProcessorModel<"e5500", PPCE5500Model,
107 [DirectiveE5500, FeatureMFOCRF, Feature64Bit,
108 FeatureSTFIWX, FeatureBookE, FeatureISEL]>;
109 def : Processor<"a2", PPCA2Itineraries, [DirectiveA2, FeatureBookE,
110 FeatureMFOCRF, FeatureFSqrt,
111 FeatureSTFIWX, FeatureISEL,
113 /*, Feature64BitRegs */]>;
114 def : Processor<"a2q", PPCA2Itineraries, [DirectiveA2, FeatureBookE,
115 FeatureMFOCRF, FeatureFSqrt,
116 FeatureSTFIWX, FeatureISEL,
117 Feature64Bit /*, Feature64BitRegs */,
119 def : Processor<"pwr6", G5Itineraries,
120 [DirectivePwr6, FeatureAltivec,
121 FeatureMFOCRF, FeatureFSqrt, FeatureSTFIWX,
122 Feature64Bit /*, Feature64BitRegs */]>;
123 def : Processor<"pwr7", G5Itineraries,
124 [DirectivePwr7, FeatureAltivec,
125 FeatureMFOCRF, FeatureFSqrt, FeatureSTFIWX,
126 FeatureISEL, Feature64Bit /*, Feature64BitRegs */]>;
127 def : Processor<"ppc", G3Itineraries, [Directive32]>;
128 def : Processor<"ppc64", G5Itineraries,
129 [Directive64, FeatureAltivec,
130 FeatureMFOCRF, FeatureFSqrt, FeatureSTFIWX,
131 Feature64Bit /*, Feature64BitRegs */]>;
134 //===----------------------------------------------------------------------===//
135 // Calling Conventions
136 //===----------------------------------------------------------------------===//
138 include "PPCCallingConv.td"
140 def PPCInstrInfo : InstrInfo {
141 let isLittleEndianEncoding = 1;
144 def PPCAsmWriter : AsmWriter {
145 string AsmWriterClassName = "InstPrinter";
146 bit isMCAsmWriter = 1;
150 // Information about the instructions.
151 let InstructionSet = PPCInstrInfo;
153 let AssemblyWriters = [PPCAsmWriter];