1 //===- PPC64InstrInfo.h - PowerPC64 Instruction Information -----*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the PowerPC64 implementation of the TargetInstrInfo class.
12 //===----------------------------------------------------------------------===//
14 #ifndef POWERPC64_INSTRUCTIONINFO_H
15 #define POWERPC64_INSTRUCTIONINFO_H
17 #include "PowerPCInstrInfo.h"
18 #include "PPC64RegisterInfo.h"
22 class PPC64InstrInfo : public TargetInstrInfo {
23 const PPC64RegisterInfo RI;
27 /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As
28 /// such, whenever a client has an instance of instruction info, it should
29 /// always be able to get register info as well (through this method).
31 virtual const MRegisterInfo &getRegisterInfo() const { return RI; }
34 // Return true if the instruction is a register to register move and
35 // leave the source and dest operands in the passed parameters.
37 virtual bool isMoveInstr(const MachineInstr& MI,
39 unsigned& destReg) const;
41 static unsigned invertPPCBranchOpcode(unsigned Opcode) {
43 default: assert(0 && "Unknown PPC branch opcode!");
44 case PPC::BEQ: return PPC::BNE;
45 case PPC::BNE: return PPC::BEQ;
46 case PPC::BLT: return PPC::BGE;
47 case PPC::BGE: return PPC::BLT;
48 case PPC::BGT: return PPC::BLE;
49 case PPC::BLE: return PPC::BGT;