1 //===-- PPCBranchSelector.cpp - Emit long conditional branches-----*- C++ -*-=//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by Nate Baegeman and is distributed under the
6 // University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains a pass that scans a machine function to determine which
11 // conditional branches need more than 16 bits of displacement to reach their
12 // target basic block. It does this in two passes; a calculation of basic block
13 // positions pass, and a branch psuedo op to machine branch opcode pass. This
14 // pass should be run last, just before the assembly printer.
16 //===----------------------------------------------------------------------===//
19 #include "PPCInstrBuilder.h"
20 #include "PPCInstrInfo.h"
21 #include "llvm/CodeGen/MachineFunctionPass.h"
22 #include "llvm/Support/Compiler.h"
23 #include "llvm/Target/TargetMachine.h"
24 #include "llvm/Target/TargetAsmInfo.h"
29 struct VISIBILITY_HIDDEN PPCBSel : public MachineFunctionPass {
30 /// OffsetMap - Mapping between BB and byte offset from start of function.
31 /// TODO: replace this with a vector, using the MBB idx as the key.
32 std::map<MachineBasicBlock*, unsigned> OffsetMap;
34 virtual bool runOnMachineFunction(MachineFunction &Fn);
36 virtual const char *getPassName() const {
37 return "PowerPC Branch Selection";
42 /// createPPCBranchSelectionPass - returns an instance of the Branch Selection
45 FunctionPass *llvm::createPPCBranchSelectionPass() {
49 /// getNumBytesForInstruction - Return the number of bytes of code the specified
50 /// instruction may be. This returns the maximum number of bytes.
52 static unsigned getNumBytesForInstruction(MachineInstr *MI) {
53 switch (MI->getOpcode()) {
54 case PPC::COND_BRANCH:
55 // while this will be 4 most of the time, if we emit 8 it is just a
56 // minor pessimization that saves us from having to worry about
57 // keeping the offsets up to date later when we emit long branch glue.
59 case PPC::IMPLICIT_DEF_GPRC: // no asm emitted
60 case PPC::IMPLICIT_DEF_G8RC: // no asm emitted
61 case PPC::IMPLICIT_DEF_F4: // no asm emitted
62 case PPC::IMPLICIT_DEF_F8: // no asm emitted
64 case PPC::INLINEASM: { // Inline Asm: Variable size.
65 MachineFunction *MF = MI->getParent()->getParent();
66 const char *AsmStr = MI->getOperand(0).getSymbolName();
67 return MF->getTarget().getTargetAsmInfo()->getInlineAsmLength(AsmStr);
70 return 4; // PowerPC instructions are all 4 bytes
75 bool PPCBSel::runOnMachineFunction(MachineFunction &Fn) {
76 // Running total of instructions encountered since beginning of function
77 unsigned ByteCount = 0;
79 // For each MBB, add its offset to the offset map, and count up its
81 for (MachineFunction::iterator MFI = Fn.begin(), E = Fn.end(); MFI != E;
83 MachineBasicBlock *MBB = MFI;
84 OffsetMap[MBB] = ByteCount;
86 for (MachineBasicBlock::iterator MBBI = MBB->begin(), EE = MBB->end();
88 ByteCount += getNumBytesForInstruction(MBBI);
91 // We're about to run over the MBB's again, so reset the ByteCount
94 // For each MBB, find the conditional branch pseudo instructions, and
95 // calculate the difference between the target MBB and the current ICount
96 // to decide whether or not to emit a short or long branch.
104 for (MachineFunction::iterator MFI = Fn.begin(), E = Fn.end(); MFI != E;
106 MachineBasicBlock *MBB = MFI;
108 for (MachineBasicBlock::iterator MBBI = MBB->begin(), EE = MBB->end();
109 MBBI != EE; ++MBBI) {
110 // We may end up deleting the MachineInstr that MBBI points to, so
111 // remember its opcode now so we can refer to it after calling erase()
112 unsigned ByteSize = getNumBytesForInstruction(MBBI);
113 if (MBBI->getOpcode() == PPC::COND_BRANCH) {
114 MachineBasicBlock::iterator MBBJ = MBBI;
117 // condbranch operands:
121 // 3. fallthrough MBB
122 MachineBasicBlock *trueMBB =
123 MBBI->getOperand(2).getMachineBasicBlock();
125 int Displacement = OffsetMap[trueMBB] - ByteCount;
126 unsigned Opcode = MBBI->getOperand(1).getImmedValue();
127 unsigned CRReg = MBBI->getOperand(0).getReg();
128 unsigned Inverted = PPCInstrInfo::invertPPCBranchOpcode(Opcode);
130 if (Displacement >= -32768 && Displacement <= 32767) {
131 BuildMI(*MBB, MBBJ, Opcode, 2).addReg(CRReg).addMBB(trueMBB);
133 // Long branch, skip next branch instruction (i.e. $PC+8).
134 BuildMI(*MBB, MBBJ, Inverted, 2).addReg(CRReg).addImm(2);
135 BuildMI(*MBB, MBBJ, PPC::B, 1).addMBB(trueMBB);
138 // Erase the psuedo COND_BRANCH instruction, and then back up the
139 // iterator so that when the for loop increments it, we end up in
140 // the correct place rather than iterating off the end.
144 ByteCount += ByteSize;