1 //===- PPCCallingConv.td - Calling Conventions for PowerPC -*- tablegen -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This describes the calling conventions for the PowerPC 32- and 64-bit
13 //===----------------------------------------------------------------------===//
15 /// CCIfSubtarget - Match if the current subtarget has a feature F.
16 class CCIfSubtarget<string F, CCAction A>
17 : CCIf<!strconcat("static_cast<const PPCSubtarget&>"
18 "(State.getMachineFunction().getSubtarget()).",
21 class CCIfNotSubtarget<string F, CCAction A>
22 : CCIf<!strconcat("!static_cast<const PPCSubtarget&>"
23 "(State.getMachineFunction().getSubtarget()).",
27 //===----------------------------------------------------------------------===//
28 // Return Value Calling Convention
29 //===----------------------------------------------------------------------===//
31 // Return-value convention for PowerPC
32 def RetCC_PPC : CallingConv<[
33 // On PPC64, integer return values are always promoted to i64
34 CCIfType<[i32, i1], CCIfSubtarget<"isPPC64()", CCPromoteToType<i64>>>,
35 CCIfType<[i1], CCIfNotSubtarget<"isPPC64()", CCPromoteToType<i32>>>,
37 CCIfType<[i32], CCAssignToReg<[R3, R4, R5, R6, R7, R8, R9, R10]>>,
38 CCIfType<[i64], CCAssignToReg<[X3, X4, X5, X6]>>,
39 CCIfType<[i128], CCAssignToReg<[X3, X4, X5, X6]>>,
41 // Floating point types returned as "direct" go into F1 .. F8; note that
42 // only the ELFv2 ABI fully utilizes all these registers.
43 CCIfType<[f32], CCAssignToReg<[F1, F2, F3, F4, F5, F6, F7, F8]>>,
44 CCIfType<[f64], CCAssignToReg<[F1, F2, F3, F4, F5, F6, F7, F8]>>,
46 // Vector types returned as "direct" go into V2 .. V9; note that only the
47 // ELFv2 ABI fully utilizes all these registers.
48 CCIfType<[v16i8, v8i16, v4i32, v4f32],
49 CCAssignToReg<[V2, V3, V4, V5, V6, V7, V8, V9]>>,
50 CCIfType<[v2f64, v2i64],
51 CCAssignToReg<[VSH2, VSH3, VSH4, VSH5, VSH6, VSH7, VSH8, VSH9]>>
55 // Note that we don't currently have calling conventions for 64-bit
56 // PowerPC, but handle all the complexities of the ABI in the lowering
57 // logic. FIXME: See if the logic can be simplified with use of CCs.
58 // This may require some extensions to current table generation.
60 // Simple calling convention for 64-bit ELF PowerPC fast isel.
61 // Only handle ints and floats. All ints are promoted to i64.
62 // Vector types and quadword ints are not handled.
63 def CC_PPC64_ELF_FIS : CallingConv<[
64 CCIfType<[i1], CCPromoteToType<i64>>,
65 CCIfType<[i8], CCPromoteToType<i64>>,
66 CCIfType<[i16], CCPromoteToType<i64>>,
67 CCIfType<[i32], CCPromoteToType<i64>>,
68 CCIfType<[i64], CCAssignToReg<[X3, X4, X5, X6, X7, X8, X9, X10]>>,
69 CCIfType<[f32, f64], CCAssignToReg<[F1, F2, F3, F4, F5, F6, F7, F8]>>
72 // Simple return-value convention for 64-bit ELF PowerPC fast isel.
73 // All small ints are promoted to i64. Vector types, quadword ints,
74 // and multiple register returns are "supported" to avoid compile
75 // errors, but none are handled by the fast selector.
76 def RetCC_PPC64_ELF_FIS : CallingConv<[
77 CCIfType<[i1], CCPromoteToType<i64>>,
78 CCIfType<[i8], CCPromoteToType<i64>>,
79 CCIfType<[i16], CCPromoteToType<i64>>,
80 CCIfType<[i32], CCPromoteToType<i64>>,
81 CCIfType<[i64], CCAssignToReg<[X3, X4]>>,
82 CCIfType<[i128], CCAssignToReg<[X3, X4, X5, X6]>>,
83 CCIfType<[f32], CCAssignToReg<[F1, F2, F3, F4, F5, F6, F7, F8]>>,
84 CCIfType<[f64], CCAssignToReg<[F1, F2, F3, F4, F5, F6, F7, F8]>>,
85 CCIfType<[v16i8, v8i16, v4i32, v4f32],
86 CCAssignToReg<[V2, V3, V4, V5, V6, V7, V8, V9]>>,
87 CCIfType<[v2f64, v2i64],
88 CCAssignToReg<[VSH2, VSH3, VSH4, VSH5, VSH6, VSH7, VSH8, VSH9]>>
91 //===----------------------------------------------------------------------===//
92 // PowerPC System V Release 4 32-bit ABI
93 //===----------------------------------------------------------------------===//
95 def CC_PPC32_SVR4_Common : CallingConv<[
96 CCIfType<[i1], CCPromoteToType<i32>>,
98 // The ABI requires i64 to be passed in two adjacent registers with the first
99 // register having an odd register number.
100 CCIfType<[i32], CCIfSplit<CCCustom<"CC_PPC32_SVR4_Custom_AlignArgRegs">>>,
102 // The first 8 integer arguments are passed in integer registers.
103 CCIfType<[i32], CCAssignToReg<[R3, R4, R5, R6, R7, R8, R9, R10]>>,
105 // Make sure the i64 words from a long double are either both passed in
106 // registers or both passed on the stack.
107 CCIfType<[f64], CCIfSplit<CCCustom<"CC_PPC32_SVR4_Custom_AlignFPArgRegs">>>,
109 // FP values are passed in F1 - F8.
110 CCIfType<[f32, f64], CCAssignToReg<[F1, F2, F3, F4, F5, F6, F7, F8]>>,
112 // Split arguments have an alignment of 8 bytes on the stack.
113 CCIfType<[i32], CCIfSplit<CCAssignToStack<4, 8>>>,
115 CCIfType<[i32], CCAssignToStack<4, 4>>,
117 // Floats are stored in double precision format, thus they have the same
118 // alignment and size as doubles.
119 CCIfType<[f32,f64], CCAssignToStack<8, 8>>,
121 // Vectors get 16-byte stack slots that are 16-byte aligned.
122 CCIfType<[v16i8, v8i16, v4i32, v4f32, v2f64, v2i64], CCAssignToStack<16, 16>>
125 // This calling convention puts vector arguments always on the stack. It is used
126 // to assign vector arguments which belong to the variable portion of the
127 // parameter list of a variable argument function.
128 def CC_PPC32_SVR4_VarArg : CallingConv<[
129 CCDelegateTo<CC_PPC32_SVR4_Common>
132 // In contrast to CC_PPC32_SVR4_VarArg, this calling convention first tries to
133 // put vector arguments in vector registers before putting them on the stack.
134 def CC_PPC32_SVR4 : CallingConv<[
135 // The first 12 Vector arguments are passed in AltiVec registers.
136 CCIfType<[v16i8, v8i16, v4i32, v4f32],
137 CCAssignToReg<[V2, V3, V4, V5, V6, V7, V8, V9, V10, V11, V12, V13]>>,
138 CCIfType<[v2f64, v2i64],
139 CCAssignToReg<[VSH2, VSH3, VSH4, VSH5, VSH6, VSH7, VSH8, VSH9,
140 VSH10, VSH11, VSH12, VSH13]>>,
142 CCDelegateTo<CC_PPC32_SVR4_Common>
145 // Helper "calling convention" to handle aggregate by value arguments.
146 // Aggregate by value arguments are always placed in the local variable space
147 // of the caller. This calling convention is only used to assign those stack
148 // offsets in the callers stack frame.
150 // Still, the address of the aggregate copy in the callers stack frame is passed
151 // in a GPR (or in the parameter list area if all GPRs are allocated) from the
152 // caller to the callee. The location for the address argument is assigned by
153 // the CC_PPC32_SVR4 calling convention.
155 // The only purpose of CC_PPC32_SVR4_Custom_Dummy is to skip arguments which are
156 // not passed by value.
158 def CC_PPC32_SVR4_ByVal : CallingConv<[
159 CCIfByVal<CCPassByVal<4, 4>>,
161 CCCustom<"CC_PPC32_SVR4_Custom_Dummy">
164 def CSR_Altivec : CalleeSavedRegs<(add V20, V21, V22, V23, V24, V25, V26, V27,
165 V28, V29, V30, V31)>;
167 def CSR_Darwin32 : CalleeSavedRegs<(add R13, R14, R15, R16, R17, R18, R19, R20,
168 R21, R22, R23, R24, R25, R26, R27, R28,
169 R29, R30, R31, F14, F15, F16, F17, F18,
170 F19, F20, F21, F22, F23, F24, F25, F26,
171 F27, F28, F29, F30, F31, CR2, CR3, CR4
174 def CSR_Darwin32_Altivec : CalleeSavedRegs<(add CSR_Darwin32, CSR_Altivec)>;
176 def CSR_SVR432 : CalleeSavedRegs<(add R14, R15, R16, R17, R18, R19, R20,
177 R21, R22, R23, R24, R25, R26, R27, R28,
178 R29, R30, R31, F14, F15, F16, F17, F18,
179 F19, F20, F21, F22, F23, F24, F25, F26,
180 F27, F28, F29, F30, F31, CR2, CR3, CR4
183 def CSR_SVR432_Altivec : CalleeSavedRegs<(add CSR_SVR432, CSR_Altivec)>;
185 def CSR_Darwin64 : CalleeSavedRegs<(add X13, X14, X15, X16, X17, X18, X19, X20,
186 X21, X22, X23, X24, X25, X26, X27, X28,
187 X29, X30, X31, F14, F15, F16, F17, F18,
188 F19, F20, F21, F22, F23, F24, F25, F26,
189 F27, F28, F29, F30, F31, CR2, CR3, CR4
192 def CSR_Darwin64_Altivec : CalleeSavedRegs<(add CSR_Darwin64, CSR_Altivec)>;
194 def CSR_SVR464 : CalleeSavedRegs<(add X14, X15, X16, X17, X18, X19, X20,
195 X21, X22, X23, X24, X25, X26, X27, X28,
196 X29, X30, X31, F14, F15, F16, F17, F18,
197 F19, F20, F21, F22, F23, F24, F25, F26,
198 F27, F28, F29, F30, F31, CR2, CR3, CR4
202 def CSR_SVR464_Altivec : CalleeSavedRegs<(add CSR_SVR464, CSR_Altivec)>;
204 def CSR_NoRegs : CalleeSavedRegs<(add)>;