1 //===-- PPCCodeEmitter.cpp - JIT Code Emitter for PowerPC32 -------*- C++ -*-=//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the PowerPC 32-bit CodeEmitter and associated machinery to
11 // JIT-compile bitcode to native PowerPC.
13 //===----------------------------------------------------------------------===//
15 #include "PPCTargetMachine.h"
16 #include "PPCRelocations.h"
18 #include "llvm/Module.h"
19 #include "llvm/PassManager.h"
20 #include "llvm/CodeGen/JITCodeEmitter.h"
21 #include "llvm/CodeGen/MachineFunctionPass.h"
22 #include "llvm/CodeGen/MachineInstrBuilder.h"
23 #include "llvm/CodeGen/MachineModuleInfo.h"
24 #include "llvm/Support/ErrorHandling.h"
25 #include "llvm/Support/raw_ostream.h"
26 #include "llvm/Target/TargetOptions.h"
30 class PPCCodeEmitter : public MachineFunctionPass {
33 MachineModuleInfo *MMI;
35 void getAnalysisUsage(AnalysisUsage &AU) const {
36 AU.addRequired<MachineModuleInfo>();
37 MachineFunctionPass::getAnalysisUsage(AU);
42 /// MovePCtoLROffset - When/if we see a MovePCtoLR instruction, we record
43 /// its address in the function into this pointer.
44 void *MovePCtoLROffset;
47 PPCCodeEmitter(TargetMachine &tm, JITCodeEmitter &mce)
48 : MachineFunctionPass(&ID), TM(tm), MCE(mce) {}
50 /// getBinaryCodeForInstr - This function, generated by the
51 /// CodeEmitterGenerator using TableGen, produces the binary encoding for
52 /// machine instructions.
54 unsigned getBinaryCodeForInstr(const MachineInstr &MI);
56 /// getMachineOpValue - evaluates the MachineOperand of a given MachineInstr
58 unsigned getMachineOpValue(const MachineInstr &MI,
59 const MachineOperand &MO);
61 const char *getPassName() const { return "PowerPC Machine Code Emitter"; }
63 /// runOnMachineFunction - emits the given MachineFunction to memory
65 bool runOnMachineFunction(MachineFunction &MF);
67 /// emitBasicBlock - emits the given MachineBasicBlock to memory
69 void emitBasicBlock(MachineBasicBlock &MBB);
71 /// getValueBit - return the particular bit of Val
73 unsigned getValueBit(int64_t Val, unsigned bit) { return (Val >> bit) & 1; }
77 char PPCCodeEmitter::ID = 0;
79 /// createPPCCodeEmitterPass - Return a pass that emits the collected PPC code
80 /// to the specified MCE object.
81 FunctionPass *llvm::createPPCJITCodeEmitterPass(PPCTargetMachine &TM,
82 JITCodeEmitter &JCE) {
83 return new PPCCodeEmitter(TM, JCE);
86 bool PPCCodeEmitter::runOnMachineFunction(MachineFunction &MF) {
87 assert((MF.getTarget().getRelocationModel() != Reloc::Default ||
88 MF.getTarget().getRelocationModel() != Reloc::Static) &&
89 "JIT relocation model must be set to static or default!");
91 MMI = &getAnalysis<MachineModuleInfo>();
92 MCE.setModuleInfo(MMI);
95 MCE.startFunction(MF);
96 for (MachineFunction::iterator BB = MF.begin(), E = MF.end(); BB != E; ++BB)
98 } while (MCE.finishFunction(MF));
103 void PPCCodeEmitter::emitBasicBlock(MachineBasicBlock &MBB) {
104 MCE.StartMachineBasicBlock(&MBB);
106 for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); I != E; ++I){
107 const MachineInstr &MI = *I;
108 MCE.processDebugLoc(MI.getDebugLoc(), true);
109 switch (MI.getOpcode()) {
111 MCE.emitWordBE(getBinaryCodeForInstr(MI));
113 case TargetOpcode::DBG_LABEL:
114 case TargetOpcode::EH_LABEL:
115 MCE.emitLabel(MI.getOperand(0).getMCSymbol());
117 case TargetOpcode::IMPLICIT_DEF:
118 case TargetOpcode::KILL:
119 break; // pseudo opcode, no side effects
120 case PPC::MovePCtoLR:
121 case PPC::MovePCtoLR8:
122 assert(TM.getRelocationModel() == Reloc::PIC_);
123 MovePCtoLROffset = (void*)MCE.getCurrentPCValue();
124 MCE.emitWordBE(0x48000005); // bl 1
127 MCE.processDebugLoc(MI.getDebugLoc(), false);
131 unsigned PPCCodeEmitter::getMachineOpValue(const MachineInstr &MI,
132 const MachineOperand &MO) {
134 unsigned rv = 0; // Return value; defaults to 0 for unhandled cases
135 // or things that get fixed up later by the JIT.
137 rv = PPCRegisterInfo::getRegisterNumbering(MO.getReg());
139 // Special encoding for MTCRF and MFOCRF, which uses a bit mask for the
140 // register, not the register number directly.
141 if ((MI.getOpcode() == PPC::MTCRF || MI.getOpcode() == PPC::MFOCRF) &&
142 (MO.getReg() >= PPC::CR0 && MO.getReg() <= PPC::CR7)) {
145 } else if (MO.isImm()) {
147 } else if (MO.isGlobal() || MO.isSymbol() ||
148 MO.isCPI() || MO.isJTI()) {
150 if (MI.getOpcode() == PPC::BL_Darwin || MI.getOpcode() == PPC::BL8_Darwin ||
151 MI.getOpcode() == PPC::BL_SVR4 || MI.getOpcode() == PPC::BL8_ELF ||
152 MI.getOpcode() == PPC::TAILB || MI.getOpcode() == PPC::TAILB8)
153 Reloc = PPC::reloc_pcrel_bx;
155 if (TM.getRelocationModel() == Reloc::PIC_) {
156 assert(MovePCtoLROffset && "MovePCtoLR not seen yet?");
158 switch (MI.getOpcode()) {
159 default: MI.dump(); llvm_unreachable("Unknown instruction for relocation!");
164 Reloc = PPC::reloc_absolute_high; // Pointer to symbol
190 Reloc = PPC::reloc_absolute_low;
197 Reloc = PPC::reloc_absolute_low_ix;
204 R = MachineRelocation::getGV(MCE.getCurrentPCOffset(), Reloc,
205 const_cast<GlobalValue *>(MO.getGlobal()), 0,
206 isa<Function>(MO.getGlobal()));
207 } else if (MO.isSymbol()) {
208 R = MachineRelocation::getExtSym(MCE.getCurrentPCOffset(),
209 Reloc, MO.getSymbolName(), 0);
210 } else if (MO.isCPI()) {
211 R = MachineRelocation::getConstPool(MCE.getCurrentPCOffset(),
212 Reloc, MO.getIndex(), 0);
215 R = MachineRelocation::getJumpTable(MCE.getCurrentPCOffset(),
216 Reloc, MO.getIndex(), 0);
219 // If in PIC mode, we need to encode the negated address of the
220 // 'movepctolr' into the unrelocated field. After relocation, we'll have
221 // &gv-&movepctolr-4 in the imm field. Once &movepctolr is added to the imm
222 // field, we get &gv. This doesn't happen for branch relocations, which are
223 // always implicitly pc relative.
224 if (TM.getRelocationModel() == Reloc::PIC_ && Reloc != PPC::reloc_pcrel_bx){
225 assert(MovePCtoLROffset && "MovePCtoLR not seen yet?");
226 R.setConstantVal(-(intptr_t)MovePCtoLROffset - 4);
228 MCE.addRelocation(R);
230 } else if (MO.isMBB()) {
232 unsigned Opcode = MI.getOpcode();
233 if (Opcode == PPC::B || Opcode == PPC::BL_Darwin ||
234 Opcode == PPC::BLA_Darwin|| Opcode == PPC::BL_SVR4 ||
235 Opcode == PPC::BLA_SVR4)
236 Reloc = PPC::reloc_pcrel_bx;
237 else // BCC instruction
238 Reloc = PPC::reloc_pcrel_bcx;
240 MCE.addRelocation(MachineRelocation::getBB(MCE.getCurrentPCOffset(),
241 Reloc, MO.getMBB()));
244 errs() << "ERROR: Unknown type of MachineOperand: " << MO << "\n";
252 #include "PPCGenCodeEmitter.inc"