1 //===-- PPCCodeEmitter.cpp - JIT Code Emitter for PowerPC32 -------*- C++ -*-=//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the PowerPC 32-bit CodeEmitter and associated machinery to
11 // JIT-compile bytecode to native PowerPC.
13 //===----------------------------------------------------------------------===//
15 #include "PPCTargetMachine.h"
16 #include "PPCRelocations.h"
18 #include "llvm/Module.h"
19 #include "llvm/PassManager.h"
20 #include "llvm/CodeGen/MachineCodeEmitter.h"
21 #include "llvm/CodeGen/MachineFunctionPass.h"
22 #include "llvm/CodeGen/MachineInstrBuilder.h"
23 #include "llvm/CodeGen/Passes.h"
24 #include "llvm/Support/Debug.h"
25 #include "llvm/Target/TargetOptions.h"
30 class PPCCodeEmitter : public MachineFunctionPass {
32 MachineCodeEmitter &MCE;
34 // Tracks which instruction references which BasicBlock
35 std::vector<std::pair<MachineBasicBlock*, unsigned*> > BBRefs;
36 // Tracks where each BasicBlock starts
37 std::map<MachineBasicBlock*, long> BBLocations;
39 /// getMachineOpValue - evaluates the MachineOperand of a given MachineInstr
41 int getMachineOpValue(MachineInstr &MI, MachineOperand &MO);
44 PPCCodeEmitter(TargetMachine &T, MachineCodeEmitter &M)
47 const char *getPassName() const { return "PowerPC Machine Code Emitter"; }
49 /// runOnMachineFunction - emits the given MachineFunction to memory
51 bool runOnMachineFunction(MachineFunction &MF);
53 /// emitBasicBlock - emits the given MachineBasicBlock to memory
55 void emitBasicBlock(MachineBasicBlock &MBB);
57 /// emitWord - write a 32-bit word to memory at the current PC
59 void emitWord(unsigned w) { MCE.emitWord(w); }
61 /// getValueBit - return the particular bit of Val
63 unsigned getValueBit(int64_t Val, unsigned bit) { return (Val >> bit) & 1; }
65 /// getBinaryCodeForInstr - This function, generated by the
66 /// CodeEmitterGenerator using TableGen, produces the binary encoding for
67 /// machine instructions.
69 unsigned getBinaryCodeForInstr(MachineInstr &MI);
73 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to get
74 /// machine code emitted. This uses a MachineCodeEmitter object to handle
75 /// actually outputting the machine code and resolving things like the address
76 /// of functions. This method should returns true if machine code emission is
79 bool PPCTargetMachine::addPassesToEmitMachineCode(FunctionPassManager &PM,
80 MachineCodeEmitter &MCE) {
81 // Machine code emitter pass for PowerPC
82 PM.add(new PPCCodeEmitter(*this, MCE));
83 // Delete machine code for this function after emitting it
84 PM.add(createMachineCodeDeleter());
88 bool PPCCodeEmitter::runOnMachineFunction(MachineFunction &MF) {
89 assert((MF.getTarget().getRelocationModel() != Reloc::Default ||
90 MF.getTarget().getRelocationModel() != Reloc::Static) &&
91 "JIT relocation model must be set to static or default!");
92 MCE.startFunction(MF);
93 MCE.emitConstantPool(MF.getConstantPool());
94 for (MachineFunction::iterator BB = MF.begin(), E = MF.end(); BB != E; ++BB)
96 MCE.finishFunction(MF);
98 // Resolve branches to BasicBlocks for the entire function
99 for (unsigned i = 0, e = BBRefs.size(); i != e; ++i) {
100 intptr_t Location = BBLocations[BBRefs[i].first];
101 unsigned *Ref = BBRefs[i].second;
102 DEBUG(std::cerr << "Fixup @ " << (void*)Ref << " to " << (void*)Location
104 unsigned Instr = *Ref;
105 intptr_t BranchTargetDisp = (Location - (intptr_t)Ref) >> 2;
107 switch (Instr >> 26) {
108 default: assert(0 && "Unknown branch user!");
109 case 18: // This is B or BL
110 *Ref |= (BranchTargetDisp & ((1 << 24)-1)) << 2;
112 case 16: // This is BLT,BLE,BEQ,BGE,BGT,BNE, or other bcx instruction
113 *Ref |= (BranchTargetDisp & ((1 << 14)-1)) << 2;
123 void PPCCodeEmitter::emitBasicBlock(MachineBasicBlock &MBB) {
124 BBLocations[&MBB] = MCE.getCurrentPCValue();
125 for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); I != E; ++I){
126 MachineInstr &MI = *I;
127 unsigned Opcode = MI.getOpcode();
128 switch (MI.getOpcode()) {
130 emitWord(getBinaryCodeForInstr(*I));
132 case PPC::IMPLICIT_DEF_GPR:
133 case PPC::IMPLICIT_DEF_F8:
134 case PPC::IMPLICIT_DEF_F4:
135 case PPC::IMPLICIT_DEF_VRRC:
136 break; // pseudo opcode, no side effects
137 case PPC::MovePCtoLR:
138 assert(0 && "CodeEmitter does not support MovePCtoLR instruction");
144 int PPCCodeEmitter::getMachineOpValue(MachineInstr &MI, MachineOperand &MO) {
146 int rv = 0; // Return value; defaults to 0 for unhandled cases
147 // or things that get fixed up later by the JIT.
148 if (MO.isRegister()) {
149 rv = PPCRegisterInfo::getRegisterNumbering(MO.getReg());
151 // Special encoding for MTCRF and MFOCRF, which uses a bit mask for the
152 // register, not the register number directly.
153 if ((MI.getOpcode() == PPC::MTCRF || MI.getOpcode() == PPC::MFOCRF) &&
154 (MO.getReg() >= PPC::CR0 && MO.getReg() <= PPC::CR7)) {
157 } else if (MO.isImmediate()) {
158 rv = MO.getImmedValue();
159 } else if (MO.isGlobalAddress() || MO.isExternalSymbol()) {
161 if (MI.getOpcode() == PPC::BL)
162 Reloc = PPC::reloc_pcrel_bx;
164 switch (MI.getOpcode()) {
165 default: MI.dump(); assert(0 && "Unknown instruction for relocation!");
167 Reloc = PPC::reloc_absolute_high; // Pointer to symbol
182 Reloc = PPC::reloc_absolute_low;
186 if (MO.isGlobalAddress())
187 MCE.addRelocation(MachineRelocation(MCE.getCurrentPCOffset(),
188 Reloc, MO.getGlobal(), 0));
190 MCE.addRelocation(MachineRelocation(MCE.getCurrentPCOffset(),
191 Reloc, MO.getSymbolName(), 0));
192 } else if (MO.isMachineBasicBlock()) {
193 unsigned* CurrPC = (unsigned*)(intptr_t)MCE.getCurrentPCValue();
194 BBRefs.push_back(std::make_pair(MO.getMachineBasicBlock(), CurrPC));
195 } else if (MO.isConstantPoolIndex()) {
196 unsigned index = MO.getConstantPoolIndex();
197 unsigned Opcode = MI.getOpcode();
198 rv = MCE.getConstantPoolEntryAddress(index);
199 if (Opcode == PPC::LIS || Opcode == PPC::ADDIS) {
200 // lis wants hi16(addr)
201 if ((short)rv < 0) rv += 1 << 16;
203 } else if (Opcode == PPC::LWZ || Opcode == PPC::LA ||
205 Opcode == PPC::LFS || Opcode == PPC::LFD) {
206 // These load opcodes want lo16(addr)
209 assert(0 && "Unknown constant pool using instruction!");
212 std::cerr << "ERROR: Unknown type of MachineOperand: " << MO << "\n";
219 #include "PPCGenCodeEmitter.inc"