1 //===-- PPCCodeEmitter.cpp - JIT Code Emitter for PowerPC32 -------*- C++ -*-=//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the PowerPC 32-bit CodeEmitter and associated machinery to
11 // JIT-compile bitcode to native PowerPC.
13 //===----------------------------------------------------------------------===//
15 #include "PPCTargetMachine.h"
16 #include "PPCRelocations.h"
18 #include "llvm/Module.h"
19 #include "llvm/PassManager.h"
20 #include "llvm/CodeGen/MachineCodeEmitter.h"
21 #include "llvm/CodeGen/JITCodeEmitter.h"
22 #include "llvm/CodeGen/ObjectCodeEmitter.h"
23 #include "llvm/CodeGen/MachineFunctionPass.h"
24 #include "llvm/CodeGen/MachineInstrBuilder.h"
25 #include "llvm/CodeGen/MachineModuleInfo.h"
26 #include "llvm/CodeGen/Passes.h"
27 #include "llvm/Support/Debug.h"
28 #include "llvm/Support/Compiler.h"
29 #include "llvm/Support/ErrorHandling.h"
30 #include "llvm/Support/raw_ostream.h"
31 #include "llvm/Target/TargetOptions.h"
35 class PPCCodeEmitter {
37 MachineCodeEmitter &MCE;
39 PPCCodeEmitter(TargetMachine &tm, MachineCodeEmitter &mce):
42 /// getBinaryCodeForInstr - This function, generated by the
43 /// CodeEmitterGenerator using TableGen, produces the binary encoding for
44 /// machine instructions.
46 unsigned getBinaryCodeForInstr(const MachineInstr &MI);
48 /// getMachineOpValue - evaluates the MachineOperand of a given MachineInstr
50 unsigned getMachineOpValue(const MachineInstr &MI,
51 const MachineOperand &MO);
53 /// MovePCtoLROffset - When/if we see a MovePCtoLR instruction, we record
54 /// its address in the function into this pointer.
56 void *MovePCtoLROffset;
59 template <class CodeEmitter>
60 class VISIBILITY_HIDDEN Emitter : public MachineFunctionPass,
66 void getAnalysisUsage(AnalysisUsage &AU) const {
67 AU.addRequired<MachineModuleInfo>();
68 MachineFunctionPass::getAnalysisUsage(AU);
73 Emitter(TargetMachine &tm, CodeEmitter &mce)
74 : MachineFunctionPass(&ID), PPCCodeEmitter(tm, mce), TM(tm), MCE(mce) {}
76 const char *getPassName() const { return "PowerPC Machine Code Emitter"; }
78 /// runOnMachineFunction - emits the given MachineFunction to memory
80 bool runOnMachineFunction(MachineFunction &MF);
82 /// emitBasicBlock - emits the given MachineBasicBlock to memory
84 void emitBasicBlock(MachineBasicBlock &MBB);
86 /// getValueBit - return the particular bit of Val
88 unsigned getValueBit(int64_t Val, unsigned bit) { return (Val >> bit) & 1; }
91 template <class CodeEmitter>
92 char Emitter<CodeEmitter>::ID = 0;
95 /// createPPCCodeEmitterPass - Return a pass that emits the collected PPC code
96 /// to the specified MCE object.
98 FunctionPass *llvm::createPPCCodeEmitterPass(PPCTargetMachine &TM,
99 MachineCodeEmitter &MCE) {
100 return new Emitter<MachineCodeEmitter>(TM, MCE);
103 FunctionPass *llvm::createPPCJITCodeEmitterPass(PPCTargetMachine &TM,
104 JITCodeEmitter &JCE) {
105 return new Emitter<JITCodeEmitter>(TM, JCE);
108 FunctionPass *llvm::createPPCObjectCodeEmitterPass(PPCTargetMachine &TM,
109 ObjectCodeEmitter &OCE) {
110 return new Emitter<ObjectCodeEmitter>(TM, OCE);
113 template <class CodeEmitter>
114 bool Emitter<CodeEmitter>::runOnMachineFunction(MachineFunction &MF) {
115 assert((MF.getTarget().getRelocationModel() != Reloc::Default ||
116 MF.getTarget().getRelocationModel() != Reloc::Static) &&
117 "JIT relocation model must be set to static or default!");
119 MCE.setModuleInfo(&getAnalysis<MachineModuleInfo>());
121 MovePCtoLROffset = 0;
122 MCE.startFunction(MF);
123 for (MachineFunction::iterator BB = MF.begin(), E = MF.end(); BB != E; ++BB)
125 } while (MCE.finishFunction(MF));
130 template <class CodeEmitter>
131 void Emitter<CodeEmitter>::emitBasicBlock(MachineBasicBlock &MBB) {
132 MCE.StartMachineBasicBlock(&MBB);
134 for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); I != E; ++I){
135 const MachineInstr &MI = *I;
136 MCE.processDebugLoc(MI.getDebugLoc());
137 switch (MI.getOpcode()) {
139 MCE.emitWordBE(getBinaryCodeForInstr(MI));
141 case TargetInstrInfo::DBG_LABEL:
142 case TargetInstrInfo::EH_LABEL:
143 MCE.emitLabel(MI.getOperand(0).getImm());
145 case TargetInstrInfo::IMPLICIT_DEF:
146 break; // pseudo opcode, no side effects
147 case PPC::MovePCtoLR:
148 case PPC::MovePCtoLR8:
149 assert(TM.getRelocationModel() == Reloc::PIC_);
150 MovePCtoLROffset = (void*)MCE.getCurrentPCValue();
151 MCE.emitWordBE(0x48000005); // bl 1
157 unsigned PPCCodeEmitter::getMachineOpValue(const MachineInstr &MI,
158 const MachineOperand &MO) {
160 unsigned rv = 0; // Return value; defaults to 0 for unhandled cases
161 // or things that get fixed up later by the JIT.
163 rv = PPCRegisterInfo::getRegisterNumbering(MO.getReg());
165 // Special encoding for MTCRF and MFOCRF, which uses a bit mask for the
166 // register, not the register number directly.
167 if ((MI.getOpcode() == PPC::MTCRF || MI.getOpcode() == PPC::MFOCRF) &&
168 (MO.getReg() >= PPC::CR0 && MO.getReg() <= PPC::CR7)) {
171 } else if (MO.isImm()) {
173 } else if (MO.isGlobal() || MO.isSymbol() ||
174 MO.isCPI() || MO.isJTI()) {
176 if (MI.getOpcode() == PPC::BL_Darwin || MI.getOpcode() == PPC::BL8_Darwin ||
177 MI.getOpcode() == PPC::BL_SVR4 || MI.getOpcode() == PPC::BL8_ELF ||
178 MI.getOpcode() == PPC::TAILB || MI.getOpcode() == PPC::TAILB8)
179 Reloc = PPC::reloc_pcrel_bx;
181 if (TM.getRelocationModel() == Reloc::PIC_) {
182 assert(MovePCtoLROffset && "MovePCtoLR not seen yet?");
184 switch (MI.getOpcode()) {
185 default: MI.dump(); llvm_unreachable("Unknown instruction for relocation!");
190 Reloc = PPC::reloc_absolute_high; // Pointer to symbol
216 Reloc = PPC::reloc_absolute_low;
223 Reloc = PPC::reloc_absolute_low_ix;
230 R = MachineRelocation::getGV(MCE.getCurrentPCOffset(), Reloc,
232 isa<Function>(MO.getGlobal()));
233 } else if (MO.isSymbol()) {
234 R = MachineRelocation::getExtSym(MCE.getCurrentPCOffset(),
235 Reloc, MO.getSymbolName(), 0);
236 } else if (MO.isCPI()) {
237 R = MachineRelocation::getConstPool(MCE.getCurrentPCOffset(),
238 Reloc, MO.getIndex(), 0);
241 R = MachineRelocation::getJumpTable(MCE.getCurrentPCOffset(),
242 Reloc, MO.getIndex(), 0);
245 // If in PIC mode, we need to encode the negated address of the
246 // 'movepctolr' into the unrelocated field. After relocation, we'll have
247 // &gv-&movepctolr-4 in the imm field. Once &movepctolr is added to the imm
248 // field, we get &gv. This doesn't happen for branch relocations, which are
249 // always implicitly pc relative.
250 if (TM.getRelocationModel() == Reloc::PIC_ && Reloc != PPC::reloc_pcrel_bx){
251 assert(MovePCtoLROffset && "MovePCtoLR not seen yet?");
252 R.setConstantVal(-(intptr_t)MovePCtoLROffset - 4);
254 MCE.addRelocation(R);
256 } else if (MO.isMBB()) {
258 unsigned Opcode = MI.getOpcode();
259 if (Opcode == PPC::B || Opcode == PPC::BL_Darwin ||
260 Opcode == PPC::BLA_Darwin|| Opcode == PPC::BL_SVR4 ||
261 Opcode == PPC::BLA_SVR4)
262 Reloc = PPC::reloc_pcrel_bx;
263 else // BCC instruction
264 Reloc = PPC::reloc_pcrel_bcx;
266 MCE.addRelocation(MachineRelocation::getBB(MCE.getCurrentPCOffset(),
267 Reloc, MO.getMBB()));
270 cerr << "ERROR: Unknown type of MachineOperand: " << MO << "\n";
278 #include "PPCGenCodeEmitter.inc"