1 //===-- PPCCodeEmitter.cpp - JIT Code Emitter for PowerPC32 -------*- C++ -*-=//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the PowerPC 32-bit CodeEmitter and associated machinery to
11 // JIT-compile bytecode to native PowerPC.
13 //===----------------------------------------------------------------------===//
15 #include "PPCTargetMachine.h"
16 #include "PPCRelocations.h"
18 #include "llvm/Module.h"
19 #include "llvm/PassManager.h"
20 #include "llvm/CodeGen/MachineCodeEmitter.h"
21 #include "llvm/CodeGen/MachineFunctionPass.h"
22 #include "llvm/CodeGen/MachineInstrBuilder.h"
23 #include "llvm/CodeGen/Passes.h"
24 #include "llvm/Support/Debug.h"
29 class PPCCodeEmitter : public MachineFunctionPass {
31 MachineCodeEmitter &MCE;
33 // Tracks which instruction references which BasicBlock
34 std::vector<std::pair<MachineBasicBlock*, unsigned*> > BBRefs;
35 // Tracks where each BasicBlock starts
36 std::map<MachineBasicBlock*, long> BBLocations;
38 /// getMachineOpValue - evaluates the MachineOperand of a given MachineInstr
40 int getMachineOpValue(MachineInstr &MI, MachineOperand &MO);
43 PPCCodeEmitter(TargetMachine &T, MachineCodeEmitter &M)
46 const char *getPassName() const { return "PowerPC Machine Code Emitter"; }
48 /// runOnMachineFunction - emits the given MachineFunction to memory
50 bool runOnMachineFunction(MachineFunction &MF);
52 /// emitBasicBlock - emits the given MachineBasicBlock to memory
54 void emitBasicBlock(MachineBasicBlock &MBB);
56 /// emitWord - write a 32-bit word to memory at the current PC
58 void emitWord(unsigned w) { MCE.emitWord(w); }
60 /// getValueBit - return the particular bit of Val
62 unsigned getValueBit(int64_t Val, unsigned bit) { return (Val >> bit) & 1; }
64 /// getBinaryCodeForInstr - This function, generated by the
65 /// CodeEmitterGenerator using TableGen, produces the binary encoding for
66 /// machine instructions.
68 unsigned getBinaryCodeForInstr(MachineInstr &MI);
72 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to get
73 /// machine code emitted. This uses a MachineCodeEmitter object to handle
74 /// actually outputting the machine code and resolving things like the address
75 /// of functions. This method should returns true if machine code emission is
78 bool PPCTargetMachine::addPassesToEmitMachineCode(FunctionPassManager &PM,
79 MachineCodeEmitter &MCE) {
80 // Machine code emitter pass for PowerPC
81 PM.add(new PPCCodeEmitter(*this, MCE));
82 // Delete machine code for this function after emitting it
83 PM.add(createMachineCodeDeleter());
87 bool PPCCodeEmitter::runOnMachineFunction(MachineFunction &MF) {
88 MCE.startFunction(MF);
89 MCE.emitConstantPool(MF.getConstantPool());
90 for (MachineFunction::iterator BB = MF.begin(), E = MF.end(); BB != E; ++BB)
92 MCE.finishFunction(MF);
94 // Resolve branches to BasicBlocks for the entire function
95 for (unsigned i = 0, e = BBRefs.size(); i != e; ++i) {
96 intptr_t Location = BBLocations[BBRefs[i].first];
97 unsigned *Ref = BBRefs[i].second;
98 DEBUG(std::cerr << "Fixup @ " << (void*)Ref << " to " << (void*)Location
100 unsigned Instr = *Ref;
101 intptr_t BranchTargetDisp = (Location - (intptr_t)Ref) >> 2;
103 switch (Instr >> 26) {
104 default: assert(0 && "Unknown branch user!");
105 case 18: // This is B or BL
106 *Ref |= (BranchTargetDisp & ((1 << 24)-1)) << 2;
108 case 16: // This is BLT,BLE,BEQ,BGE,BGT,BNE, or other bcx instruction
109 *Ref |= (BranchTargetDisp & ((1 << 14)-1)) << 2;
119 void PPCCodeEmitter::emitBasicBlock(MachineBasicBlock &MBB) {
120 assert(!PICEnabled && "CodeEmitter does not support PIC!");
121 BBLocations[&MBB] = MCE.getCurrentPCValue();
122 for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); I != E; ++I){
123 MachineInstr &MI = *I;
124 unsigned Opcode = MI.getOpcode();
125 switch (MI.getOpcode()) {
127 emitWord(getBinaryCodeForInstr(*I));
129 case PPC::IMPLICIT_DEF_GPR:
130 case PPC::IMPLICIT_DEF_F8:
131 case PPC::IMPLICIT_DEF_F4:
132 break; // pseudo opcode, no side effects
133 case PPC::MovePCtoLR:
134 assert(0 && "CodeEmitter does not support MovePCtoLR instruction");
140 static unsigned enumRegToMachineReg(unsigned enumReg) {
142 case PPC::R0 : case PPC::F0 : case PPC::CR0: return 0;
143 case PPC::R1 : case PPC::F1 : case PPC::CR1: return 1;
144 case PPC::R2 : case PPC::F2 : case PPC::CR2: return 2;
145 case PPC::R3 : case PPC::F3 : case PPC::CR3: return 3;
146 case PPC::R4 : case PPC::F4 : case PPC::CR4: return 4;
147 case PPC::R5 : case PPC::F5 : case PPC::CR5: return 5;
148 case PPC::R6 : case PPC::F6 : case PPC::CR6: return 6;
149 case PPC::R7 : case PPC::F7 : case PPC::CR7: return 7;
150 case PPC::R8 : case PPC::F8 : return 8;
151 case PPC::R9 : case PPC::F9 : return 9;
152 case PPC::R10: case PPC::F10: return 10;
153 case PPC::R11: case PPC::F11: return 11;
154 case PPC::R12: case PPC::F12: return 12;
155 case PPC::R13: case PPC::F13: return 13;
156 case PPC::R14: case PPC::F14: return 14;
157 case PPC::R15: case PPC::F15: return 15;
158 case PPC::R16: case PPC::F16: return 16;
159 case PPC::R17: case PPC::F17: return 17;
160 case PPC::R18: case PPC::F18: return 18;
161 case PPC::R19: case PPC::F19: return 19;
162 case PPC::R20: case PPC::F20: return 20;
163 case PPC::R21: case PPC::F21: return 21;
164 case PPC::R22: case PPC::F22: return 22;
165 case PPC::R23: case PPC::F23: return 23;
166 case PPC::R24: case PPC::F24: return 24;
167 case PPC::R25: case PPC::F25: return 25;
168 case PPC::R26: case PPC::F26: return 26;
169 case PPC::R27: case PPC::F27: return 27;
170 case PPC::R28: case PPC::F28: return 28;
171 case PPC::R29: case PPC::F29: return 29;
172 case PPC::R30: case PPC::F30: return 30;
173 case PPC::R31: case PPC::F31: return 31;
175 std::cerr << "Unhandled reg in enumRegToRealReg!\n";
180 int PPCCodeEmitter::getMachineOpValue(MachineInstr &MI, MachineOperand &MO) {
182 int rv = 0; // Return value; defaults to 0 for unhandled cases
183 // or things that get fixed up later by the JIT.
184 if (MO.isRegister()) {
185 rv = enumRegToMachineReg(MO.getReg());
187 // Special encoding for MTCRF and MFOCRF, which uses a bit mask for the
188 // register, not the register number directly.
189 if ((MI.getOpcode() == PPC::MTCRF || MI.getOpcode() == PPC::MFOCRF) &&
190 (MO.getReg() >= PPC::CR0 && MO.getReg() <= PPC::CR7)) {
193 } else if (MO.isImmediate()) {
194 rv = MO.getImmedValue();
195 } else if (MO.isGlobalAddress() || MO.isExternalSymbol()) {
196 bool isExternal = MO.isExternalSymbol() ||
197 MO.getGlobal()->hasWeakLinkage() ||
198 MO.getGlobal()->hasLinkOnceLinkage() ||
199 MO.getGlobal()->isExternal();
201 if (MI.getOpcode() == PPC::BL)
202 Reloc = PPC::reloc_pcrel_bx;
204 switch (MI.getOpcode()) {
205 default: MI.dump(); assert(0 && "Unknown instruction for relocation!");
208 Reloc = PPC::reloc_absolute_ptr_high; // Pointer to stub
210 Reloc = PPC::reloc_absolute_high; // Pointer to symbol
213 assert(!isExternal && "Something in the ISEL changed\n");
214 Reloc = PPC::reloc_absolute_low;
228 Reloc = PPC::reloc_absolute_ptr_low;
230 Reloc = PPC::reloc_absolute_low;
234 if (MO.isGlobalAddress())
235 MCE.addRelocation(MachineRelocation(MCE.getCurrentPCOffset(),
236 Reloc, MO.getGlobal(), 0));
238 MCE.addRelocation(MachineRelocation(MCE.getCurrentPCOffset(),
239 Reloc, MO.getSymbolName(), 0));
240 } else if (MO.isMachineBasicBlock()) {
241 unsigned* CurrPC = (unsigned*)(intptr_t)MCE.getCurrentPCValue();
242 BBRefs.push_back(std::make_pair(MO.getMachineBasicBlock(), CurrPC));
243 } else if (MO.isConstantPoolIndex()) {
244 unsigned index = MO.getConstantPoolIndex();
245 unsigned Opcode = MI.getOpcode();
246 rv = MCE.getConstantPoolEntryAddress(index);
247 if (Opcode == PPC::LIS || Opcode == PPC::ADDIS) {
248 // lis wants hi16(addr)
249 if ((short)rv < 0) rv += 1 << 16;
251 } else if (Opcode == PPC::LWZ || Opcode == PPC::LA ||
253 Opcode == PPC::LFS || Opcode == PPC::LFD) {
254 // These load opcodes want lo16(addr)
257 assert(0 && "Unknown constant pool using instruction!");
260 std::cerr << "ERROR: Unknown type of MachineOperand: " << MO << "\n";
267 #include "PPCGenCodeEmitter.inc"