1 //===-- PPCCodeEmitter.cpp - JIT Code Emitter for PowerPC32 -------*- C++ -*-=//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the PowerPC 32-bit CodeEmitter and associated machinery to
11 // JIT-compile bitcode to native PowerPC.
13 //===----------------------------------------------------------------------===//
15 #include "PPCTargetMachine.h"
16 #include "PPCRelocations.h"
18 #include "llvm/Module.h"
19 #include "llvm/PassManager.h"
20 #include "llvm/CodeGen/JITCodeEmitter.h"
21 #include "llvm/CodeGen/MachineFunctionPass.h"
22 #include "llvm/CodeGen/MachineInstrBuilder.h"
23 #include "llvm/CodeGen/MachineModuleInfo.h"
24 #include "llvm/Support/ErrorHandling.h"
25 #include "llvm/Support/raw_ostream.h"
26 #include "llvm/Target/TargetOptions.h"
30 class PPCCodeEmitter : public MachineFunctionPass {
33 MachineModuleInfo *MMI;
35 void getAnalysisUsage(AnalysisUsage &AU) const {
36 AU.addRequired<MachineModuleInfo>();
37 MachineFunctionPass::getAnalysisUsage(AU);
42 /// MovePCtoLROffset - When/if we see a MovePCtoLR instruction, we record
43 /// its address in the function into this pointer.
44 void *MovePCtoLROffset;
47 PPCCodeEmitter(TargetMachine &tm, JITCodeEmitter &mce)
48 : MachineFunctionPass(ID), TM(tm), MCE(mce) {}
50 /// getBinaryCodeForInstr - This function, generated by the
51 /// CodeEmitterGenerator using TableGen, produces the binary encoding for
52 /// machine instructions.
53 unsigned getBinaryCodeForInstr(const MachineInstr &MI) const;
56 MachineRelocation GetRelocation(const MachineOperand &MO,
57 unsigned RelocID) const;
59 /// getMachineOpValue - evaluates the MachineOperand of a given MachineInstr
60 unsigned getMachineOpValue(const MachineInstr &MI,
61 const MachineOperand &MO) const;
63 unsigned get_crbitm_encoding(const MachineInstr &MI, unsigned OpNo) const;
64 unsigned getCallTargetEncoding(const MachineInstr &MI, unsigned OpNo) const;
66 const char *getPassName() const { return "PowerPC Machine Code Emitter"; }
68 /// runOnMachineFunction - emits the given MachineFunction to memory
70 bool runOnMachineFunction(MachineFunction &MF);
72 /// emitBasicBlock - emits the given MachineBasicBlock to memory
74 void emitBasicBlock(MachineBasicBlock &MBB);
78 char PPCCodeEmitter::ID = 0;
80 /// createPPCCodeEmitterPass - Return a pass that emits the collected PPC code
81 /// to the specified MCE object.
82 FunctionPass *llvm::createPPCJITCodeEmitterPass(PPCTargetMachine &TM,
83 JITCodeEmitter &JCE) {
84 return new PPCCodeEmitter(TM, JCE);
87 bool PPCCodeEmitter::runOnMachineFunction(MachineFunction &MF) {
88 assert((MF.getTarget().getRelocationModel() != Reloc::Default ||
89 MF.getTarget().getRelocationModel() != Reloc::Static) &&
90 "JIT relocation model must be set to static or default!");
92 MMI = &getAnalysis<MachineModuleInfo>();
93 MCE.setModuleInfo(MMI);
96 MCE.startFunction(MF);
97 for (MachineFunction::iterator BB = MF.begin(), E = MF.end(); BB != E; ++BB)
99 } while (MCE.finishFunction(MF));
104 void PPCCodeEmitter::emitBasicBlock(MachineBasicBlock &MBB) {
105 MCE.StartMachineBasicBlock(&MBB);
107 for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); I != E; ++I){
108 const MachineInstr &MI = *I;
109 MCE.processDebugLoc(MI.getDebugLoc(), true);
110 switch (MI.getOpcode()) {
112 MCE.emitWordBE(getBinaryCodeForInstr(MI));
114 case TargetOpcode::PROLOG_LABEL:
115 case TargetOpcode::EH_LABEL:
116 MCE.emitLabel(MI.getOperand(0).getMCSymbol());
118 case TargetOpcode::IMPLICIT_DEF:
119 case TargetOpcode::KILL:
120 break; // pseudo opcode, no side effects
121 case PPC::MovePCtoLR:
122 case PPC::MovePCtoLR8:
123 assert(TM.getRelocationModel() == Reloc::PIC_);
124 MovePCtoLROffset = (void*)MCE.getCurrentPCValue();
125 MCE.emitWordBE(0x48000005); // bl 1
128 MCE.processDebugLoc(MI.getDebugLoc(), false);
132 unsigned PPCCodeEmitter::get_crbitm_encoding(const MachineInstr &MI,
133 unsigned OpNo) const {
134 const MachineOperand &MO = MI.getOperand(OpNo);
135 assert((MI.getOpcode() == PPC::MTCRF || MI.getOpcode() == PPC::MFOCRF) &&
136 (MO.getReg() >= PPC::CR0 && MO.getReg() <= PPC::CR7));
137 return 0x80 >> PPCRegisterInfo::getRegisterNumbering(MO.getReg());
140 MachineRelocation PPCCodeEmitter::GetRelocation(const MachineOperand &MO,
141 unsigned RelocID) const {
143 return MachineRelocation::getGV(MCE.getCurrentPCOffset(), RelocID,
144 const_cast<GlobalValue *>(MO.getGlobal()),0,
145 isa<Function>(MO.getGlobal()));
147 return MachineRelocation::getExtSym(MCE.getCurrentPCOffset(),
148 RelocID, MO.getSymbolName(), 0);
150 return MachineRelocation::getConstPool(MCE.getCurrentPCOffset(),
151 RelocID, MO.getIndex(), 0);
154 MCE.addRelocation(MachineRelocation::getBB(MCE.getCurrentPCOffset(),
155 RelocID, MO.getMBB()));
158 return MachineRelocation::getJumpTable(MCE.getCurrentPCOffset(),
159 RelocID, MO.getIndex(), 0);
162 unsigned PPCCodeEmitter::getCallTargetEncoding(const MachineInstr &MI,
163 unsigned OpNo) const {
164 const MachineOperand &MO = MI.getOperand(OpNo);
165 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO);
167 MCE.addRelocation(GetRelocation(MO, PPC::reloc_pcrel_bx));
172 unsigned PPCCodeEmitter::getMachineOpValue(const MachineInstr &MI,
173 const MachineOperand &MO) const {
176 assert(MI.getOpcode() != PPC::MTCRF && MI.getOpcode() != PPC::MFOCRF);
177 return PPCRegisterInfo::getRegisterNumbering(MO.getReg());
183 if (MO.isGlobal() || MO.isSymbol() || MO.isCPI() || MO.isJTI()) {
185 assert((TM.getRelocationModel() != Reloc::PIC_ || MovePCtoLROffset) &&
186 "MovePCtoLR not seen yet?");
187 switch (MI.getOpcode()) {
188 default: MI.dump(); llvm_unreachable("Unknown instruction for relocation!");
193 Reloc = PPC::reloc_absolute_high; // Pointer to symbol
219 Reloc = PPC::reloc_absolute_low;
226 Reloc = PPC::reloc_absolute_low_ix;
230 MachineRelocation R = GetRelocation(MO, Reloc);
232 // If in PIC mode, we need to encode the negated address of the
233 // 'movepctolr' into the unrelocated field. After relocation, we'll have
234 // &gv-&movepctolr-4 in the imm field. Once &movepctolr is added to the imm
235 // field, we get &gv. This doesn't happen for branch relocations, which are
236 // always implicitly pc relative.
237 if (TM.getRelocationModel() == Reloc::PIC_) {
238 assert(MovePCtoLROffset && "MovePCtoLR not seen yet?");
239 R.setConstantVal(-(intptr_t)MovePCtoLROffset - 4);
241 MCE.addRelocation(R);
243 } else if (MO.isMBB()) {
245 unsigned Opcode = MI.getOpcode();
246 if (Opcode == PPC::B)
247 Reloc = PPC::reloc_pcrel_bx;
248 else // BCC instruction
249 Reloc = PPC::reloc_pcrel_bcx;
251 MCE.addRelocation(MachineRelocation::getBB(MCE.getCurrentPCOffset(),
252 Reloc, MO.getMBB()));
255 errs() << "ERROR: Unknown type of MachineOperand: " << MO << "\n";
263 #include "PPCGenCodeEmitter.inc"