1 //===-- PPCFrameLowering.h - Define frame lowering for PowerPC --*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
13 #ifndef POWERPC_FRAMEINFO_H
14 #define POWERPC_FRAMEINFO_H
17 #include "PPCSubtarget.h"
18 #include "llvm/ADT/STLExtras.h"
19 #include "llvm/Target/TargetFrameLowering.h"
20 #include "llvm/Target/TargetMachine.h"
25 class PPCFrameLowering: public TargetFrameLowering {
26 const PPCSubtarget &Subtarget;
29 PPCFrameLowering(const PPCSubtarget &sti)
30 : TargetFrameLowering(TargetFrameLowering::StackGrowsDown,
31 (sti.hasQPX() || sti.isBGQ()) ? 32 : 16, 0),
35 unsigned determineFrameLayout(MachineFunction &MF,
37 bool UseEstimate = false) const;
39 /// emitProlog/emitEpilog - These methods insert prolog and epilog code into
41 void emitPrologue(MachineFunction &MF) const;
42 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const;
44 bool hasFP(const MachineFunction &MF) const;
45 bool needsFP(const MachineFunction &MF) const;
46 void replaceFPWithRealFP(MachineFunction &MF) const;
48 void processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
49 RegScavenger *RS = NULL) const;
50 void processFunctionBeforeFrameFinalized(MachineFunction &MF,
51 RegScavenger *RS = NULL) const;
52 void addScavengingSpillSlot(MachineFunction &MF, RegScavenger *RS) const;
54 bool spillCalleeSavedRegisters(MachineBasicBlock &MBB,
55 MachineBasicBlock::iterator MI,
56 const std::vector<CalleeSavedInfo> &CSI,
57 const TargetRegisterInfo *TRI) const;
59 void eliminateCallFramePseudoInstr(MachineFunction &MF,
60 MachineBasicBlock &MBB,
61 MachineBasicBlock::iterator I) const;
63 bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
64 MachineBasicBlock::iterator MI,
65 const std::vector<CalleeSavedInfo> &CSI,
66 const TargetRegisterInfo *TRI) const;
68 /// targetHandlesStackFrameRounding - Returns true if the target is
69 /// responsible for rounding up the stack frame (probably at emitPrologue
71 bool targetHandlesStackFrameRounding() const { return true; }
73 /// getReturnSaveOffset - Return the previous frame offset to save the
75 static unsigned getReturnSaveOffset(bool isPPC64, bool isDarwinABI) {
77 return isPPC64 ? 16 : 8;
79 return isPPC64 ? 16 : 4;
82 /// getFramePointerSaveOffset - Return the previous frame offset to save the
84 static unsigned getFramePointerSaveOffset(bool isPPC64, bool isDarwinABI) {
85 // For the Darwin ABI:
86 // We cannot use the TOC save slot (offset +20) in the PowerPC linkage area
87 // for saving the frame pointer (if needed.) While the published ABI has
88 // not used this slot since at least MacOSX 10.2, there is older code
89 // around that does use it, and that needs to continue to work.
91 return isPPC64 ? -8U : -4U;
93 // SVR4 ABI: First slot in the general register save area.
94 return isPPC64 ? -8U : -4U;
97 /// getLinkageSize - Return the size of the PowerPC ABI linkage area.
99 static unsigned getLinkageSize(bool isPPC64, bool isDarwinABI) {
100 if (isDarwinABI || isPPC64)
101 return 6 * (isPPC64 ? 8 : 4);
107 /// getMinCallArgumentsSize - Return the size of the minium PowerPC ABI
109 static unsigned getMinCallArgumentsSize(bool isPPC64, bool isDarwinABI) {
110 // For the Darwin ABI / 64-bit SVR4 ABI:
111 // The prolog code of the callee may store up to 8 GPR argument registers to
112 // the stack, allowing va_start to index over them in memory if its varargs.
113 // Because we cannot tell if this is needed on the caller side, we have to
114 // conservatively assume that it is needed. As such, make sure we have at
115 // least enough stack space for the caller to store the 8 GPRs.
116 if (isDarwinABI || isPPC64)
117 return 8 * (isPPC64 ? 8 : 4);
120 // There is no default stack allocated for the 8 first GPR arguments.
124 /// getMinCallFrameSize - Return the minimum size a call frame can be using
126 static unsigned getMinCallFrameSize(bool isPPC64, bool isDarwinABI) {
127 // The call frame needs to be at least big enough for linkage and 8 args.
128 return getLinkageSize(isPPC64, isDarwinABI) +
129 getMinCallArgumentsSize(isPPC64, isDarwinABI);
132 // With the SVR4 ABI, callee-saved registers have fixed offsets on the stack.
134 getCalleeSavedSpillSlots(unsigned &NumEntries) const {
135 if (Subtarget.isDarwinABI()) {
137 if (Subtarget.isPPC64()) {
138 static const SpillSlot darwin64Offsets = {PPC::X31, -8};
139 return &darwin64Offsets;
141 static const SpillSlot darwinOffsets = {PPC::R31, -4};
142 return &darwinOffsets;
146 // Early exit if not using the SVR4 ABI.
147 if (!Subtarget.isSVR4ABI()) {
152 // Note that the offsets here overlap, but this is fixed up in
153 // processFunctionBeforeFrameFinalized.
155 static const SpillSlot Offsets[] = {
156 // Floating-point register save area offsets.
176 // General register save area offsets.
196 // CR save area offset. We map each of the nonvolatile CR fields
197 // to the slot for CR2, which is the first of the nonvolatile CR
198 // fields to be assigned, so that we only allocate one save slot.
199 // See PPCRegisterInfo::hasReservedSpillSlot() for more information.
202 // VRSAVE save area offset.
205 // Vector register save area
220 static const SpillSlot Offsets64[] = {
221 // Floating-point register save area offsets.
241 // General register save area offsets.
261 // VRSAVE save area offset.
264 // Vector register save area
279 if (Subtarget.isPPC64()) {
280 NumEntries = array_lengthof(Offsets64);
284 NumEntries = array_lengthof(Offsets);
291 } // End llvm namespace