1 //===- PowerPCInstrFormats.td - PowerPC Instruction Formats --*- tablegen -*-=//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 //===----------------------------------------------------------------------===//
12 // PowerPC instruction formats
14 class I<bits<6> opcode, dag OOL, dag IOL, string asmstr, InstrItinClass itin>
18 bit PPC64 = 0; // Default value, override with isPPC64
20 let Namespace = "PPC";
21 let Inst{0-5} = opcode;
22 let OutOperandList = OOL;
23 let InOperandList = IOL;
24 let AsmString = asmstr;
27 bits<1> PPC970_First = 0;
28 bits<1> PPC970_Single = 0;
29 bits<1> PPC970_Cracked = 0;
30 bits<3> PPC970_Unit = 0;
32 /// These fields correspond to the fields in PPCInstrInfo.h. Any changes to
33 /// these must be reflected there! See comments there for what these are.
34 let TSFlags{0} = PPC970_First;
35 let TSFlags{1} = PPC970_Single;
36 let TSFlags{2} = PPC970_Cracked;
37 let TSFlags{5-3} = PPC970_Unit;
40 class PPC970_DGroup_First { bits<1> PPC970_First = 1; }
41 class PPC970_DGroup_Single { bits<1> PPC970_Single = 1; }
42 class PPC970_DGroup_Cracked { bits<1> PPC970_Cracked = 1; }
43 class PPC970_MicroCode;
45 class PPC970_Unit_Pseudo { bits<3> PPC970_Unit = 0; }
46 class PPC970_Unit_FXU { bits<3> PPC970_Unit = 1; }
47 class PPC970_Unit_LSU { bits<3> PPC970_Unit = 2; }
48 class PPC970_Unit_FPU { bits<3> PPC970_Unit = 3; }
49 class PPC970_Unit_CRU { bits<3> PPC970_Unit = 4; }
50 class PPC970_Unit_VALU { bits<3> PPC970_Unit = 5; }
51 class PPC970_Unit_VPERM { bits<3> PPC970_Unit = 6; }
52 class PPC970_Unit_BRU { bits<3> PPC970_Unit = 7; }
56 class IForm<bits<6> opcode, bit aa, bit lk, dag OOL, dag IOL, string asmstr,
57 InstrItinClass itin, list<dag> pattern>
58 : I<opcode, OOL, IOL, asmstr, itin> {
59 let Pattern = pattern;
68 class BForm<bits<6> opcode, bit aa, bit lk, dag OOL, dag IOL, string asmstr>
69 : I<opcode, OOL, IOL, asmstr, BrB> {
70 bits<7> BIBO; // 2 bits of BI and 5 bits of BO.
75 let BI{0-1} = BIBO{5-6};
76 let BI{2-4} = CR{0-2};
78 let Inst{6-10} = BIBO{4-0};
87 class DForm_base<bits<6> opcode, dag OOL, dag IOL, string asmstr,
88 InstrItinClass itin, list<dag> pattern>
89 : I<opcode, OOL, IOL, asmstr, itin> {
94 let Pattern = pattern;
101 class DForm_1<bits<6> opcode, dag OOL, dag IOL, string asmstr,
102 InstrItinClass itin, list<dag> pattern>
103 : I<opcode, OOL, IOL, asmstr, itin> {
108 let Pattern = pattern;
115 class DForm_2<bits<6> opcode, dag OOL, dag IOL, string asmstr,
116 InstrItinClass itin, list<dag> pattern>
117 : DForm_base<opcode, OOL, IOL, asmstr, itin, pattern>;
119 class DForm_2_r0<bits<6> opcode, dag OOL, dag IOL, string asmstr,
120 InstrItinClass itin, list<dag> pattern>
121 : I<opcode, OOL, IOL, asmstr, itin> {
125 let Pattern = pattern;
132 class DForm_4<bits<6> opcode, dag OOL, dag IOL, string asmstr,
133 InstrItinClass itin, list<dag> pattern>
134 : I<opcode, OOL, IOL, asmstr, itin> {
139 let Pattern = pattern;
146 class DForm_4_zero<bits<6> opcode, dag OOL, dag IOL, string asmstr,
147 InstrItinClass itin, list<dag> pattern>
148 : DForm_1<opcode, OOL, IOL, asmstr, itin, pattern> {
154 class DForm_5<bits<6> opcode, dag OOL, dag IOL, string asmstr,
156 : I<opcode, OOL, IOL, asmstr, itin> {
165 let Inst{11-15} = RA;
169 class DForm_5_ext<bits<6> opcode, dag OOL, dag IOL, string asmstr,
171 : DForm_5<opcode, OOL, IOL, asmstr, itin> {
175 class DForm_6<bits<6> opcode, dag OOL, dag IOL, string asmstr,
177 : DForm_5<opcode, OOL, IOL, asmstr, itin>;
179 class DForm_6_ext<bits<6> opcode, dag OOL, dag IOL, string asmstr,
181 : DForm_6<opcode, OOL, IOL, asmstr, itin> {
187 class DSForm_1<bits<6> opcode, bits<2> xo, dag OOL, dag IOL, string asmstr,
188 InstrItinClass itin, list<dag> pattern>
189 : I<opcode, OOL, IOL, asmstr, itin> {
194 let Pattern = pattern;
196 let Inst{6-10} = RST;
197 let Inst{11-15} = RA;
198 let Inst{16-29} = DS;
199 let Inst{30-31} = xo;
203 class XForm_base_r3xo<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
204 InstrItinClass itin, list<dag> pattern>
205 : I<opcode, OOL, IOL, asmstr, itin> {
210 let Pattern = pattern;
212 bit RC = 0; // set by isDOT
214 let Inst{6-10} = RST;
217 let Inst{21-30} = xo;
221 // This is the same as XForm_base_r3xo, but the first two operands are swapped
222 // when code is emitted.
223 class XForm_base_r3xo_swapped
224 <bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
226 : I<opcode, OOL, IOL, asmstr, itin> {
231 bit RC = 0; // set by isDOT
233 let Inst{6-10} = RST;
236 let Inst{21-30} = xo;
241 class XForm_1<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
242 InstrItinClass itin, list<dag> pattern>
243 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern>;
245 class XForm_6<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
246 InstrItinClass itin, list<dag> pattern>
247 : XForm_base_r3xo_swapped<opcode, xo, OOL, IOL, asmstr, itin> {
248 let Pattern = pattern;
251 class XForm_8<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
252 InstrItinClass itin, list<dag> pattern>
253 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern>;
255 class XForm_10<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
256 InstrItinClass itin, list<dag> pattern>
257 : XForm_base_r3xo_swapped<opcode, xo, OOL, IOL, asmstr, itin> {
258 let Pattern = pattern;
261 class XForm_11<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
262 InstrItinClass itin, list<dag> pattern>
263 : XForm_base_r3xo_swapped<opcode, xo, OOL, IOL, asmstr, itin> {
265 let Pattern = pattern;
268 class XForm_16<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
270 : I<opcode, OOL, IOL, asmstr, itin> {
279 let Inst{11-15} = RA;
280 let Inst{16-20} = RB;
281 let Inst{21-30} = xo;
285 class XForm_16_ext<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
287 : XForm_16<opcode, xo, OOL, IOL, asmstr, itin> {
291 class XForm_17<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
293 : I<opcode, OOL, IOL, asmstr, itin> {
300 let Inst{11-15} = FRA;
301 let Inst{16-20} = FRB;
302 let Inst{21-30} = xo;
306 class XForm_24<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
307 InstrItinClass itin, list<dag> pattern>
308 : I<opcode, OOL, IOL, asmstr, itin> {
309 let Pattern = pattern;
313 let Inst{21-30} = xo;
317 class XForm_24_sync<bits<6> opcode, bits<10> xo, dag OOL, dag IOL,
318 string asmstr, InstrItinClass itin, list<dag> pattern>
319 : I<opcode, OOL, IOL, asmstr, itin> {
320 let Pattern = pattern;
324 let Inst{21-30} = xo;
328 class XForm_25<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
329 InstrItinClass itin, list<dag> pattern>
330 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> {
333 class XForm_26<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
334 InstrItinClass itin, list<dag> pattern>
335 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> {
339 class XForm_28<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
340 InstrItinClass itin, list<dag> pattern>
341 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> {
344 // This is used for MFFS, MTFSB0, MTFSB1. 42 is arbitrary; this series of
345 // numbers presumably relates to some document, but I haven't found it.
346 class XForm_42<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
347 InstrItinClass itin, list<dag> pattern>
348 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> {
349 let Pattern = pattern;
351 bit RC = 0; // set by isDOT
353 let Inst{6-10} = RST;
355 let Inst{21-30} = xo;
358 class XForm_43<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
359 InstrItinClass itin, list<dag> pattern>
360 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> {
361 let Pattern = pattern;
364 bit RC = 0; // set by isDOT
368 let Inst{21-30} = xo;
372 // DCB_Form - Form X instruction, used for dcb* instructions.
373 class DCB_Form<bits<10> xo, bits<5> immfield, dag OOL, dag IOL, string asmstr,
374 InstrItinClass itin, list<dag> pattern>
375 : I<31, OOL, IOL, asmstr, itin> {
379 let Pattern = pattern;
381 let Inst{6-10} = immfield;
384 let Inst{21-30} = xo;
389 // DSS_Form - Form X instruction, used for altivec dss* instructions.
390 class DSS_Form<bits<10> xo, dag OOL, dag IOL, string asmstr,
391 InstrItinClass itin, list<dag> pattern>
392 : I<31, OOL, IOL, asmstr, itin> {
398 let Pattern = pattern;
402 let Inst{9-10} = STRM;
405 let Inst{21-30} = xo;
410 class XLForm_1<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
411 InstrItinClass itin, list<dag> pattern>
412 : I<opcode, OOL, IOL, asmstr, itin> {
417 let Pattern = pattern;
419 let Inst{6-10} = CRD;
420 let Inst{11-15} = CRA;
421 let Inst{16-20} = CRB;
422 let Inst{21-30} = xo;
426 class XLForm_1_ext<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
427 InstrItinClass itin, list<dag> pattern>
428 : I<opcode, OOL, IOL, asmstr, itin> {
431 let Pattern = pattern;
433 let Inst{6-10} = CRD;
434 let Inst{11-15} = CRD;
435 let Inst{16-20} = CRD;
436 let Inst{21-30} = xo;
440 class XLForm_2<bits<6> opcode, bits<10> xo, bit lk, dag OOL, dag IOL, string asmstr,
441 InstrItinClass itin, list<dag> pattern>
442 : I<opcode, OOL, IOL, asmstr, itin> {
447 let Pattern = pattern;
450 let Inst{11-15} = BI;
452 let Inst{19-20} = BH;
453 let Inst{21-30} = xo;
457 class XLForm_2_br<bits<6> opcode, bits<10> xo, bit lk,
458 dag OOL, dag IOL, string asmstr, InstrItinClass itin, list<dag> pattern>
459 : XLForm_2<opcode, xo, lk, OOL, IOL, asmstr, itin, pattern> {
460 bits<7> BIBO; // 2 bits of BI and 5 bits of BO.
464 let BI{0-1} = BIBO{0-1};
470 class XLForm_2_ext<bits<6> opcode, bits<10> xo, bits<5> bo, bits<5> bi, bit lk,
471 dag OOL, dag IOL, string asmstr, InstrItinClass itin, list<dag> pattern>
472 : XLForm_2<opcode, xo, lk, OOL, IOL, asmstr, itin, pattern> {
478 class XLForm_3<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
480 : I<opcode, OOL, IOL, asmstr, itin> {
486 let Inst{11-13} = BFA;
489 let Inst{21-30} = xo;
494 class XFXForm_1<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
496 : I<opcode, OOL, IOL, asmstr, itin> {
501 let Inst{11} = SPR{4};
502 let Inst{12} = SPR{3};
503 let Inst{13} = SPR{2};
504 let Inst{14} = SPR{1};
505 let Inst{15} = SPR{0};
506 let Inst{16} = SPR{9};
507 let Inst{17} = SPR{8};
508 let Inst{18} = SPR{7};
509 let Inst{19} = SPR{6};
510 let Inst{20} = SPR{5};
511 let Inst{21-30} = xo;
515 class XFXForm_1_ext<bits<6> opcode, bits<10> xo, bits<10> spr,
516 dag OOL, dag IOL, string asmstr, InstrItinClass itin>
517 : XFXForm_1<opcode, xo, OOL, IOL, asmstr, itin> {
521 class XFXForm_3<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
523 : I<opcode, OOL, IOL, asmstr, itin> {
528 let Inst{21-30} = xo;
532 class XFXForm_5<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
534 : I<opcode, OOL, IOL, asmstr, itin> {
540 let Inst{12-19} = FXM;
542 let Inst{21-30} = xo;
546 class XFXForm_5a<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
548 : I<opcode, OOL, IOL, asmstr, itin> {
554 let Inst{12-19} = FXM;
556 let Inst{21-30} = xo;
560 class XFXForm_7<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
562 : XFXForm_1<opcode, xo, OOL, IOL, asmstr, itin>;
564 class XFXForm_7_ext<bits<6> opcode, bits<10> xo, bits<10> spr,
565 dag OOL, dag IOL, string asmstr, InstrItinClass itin>
566 : XFXForm_7<opcode, xo, OOL, IOL, asmstr, itin> {
571 // This is probably 1.7.9, but I don't have the reference that uses this
572 // numbering scheme...
573 class XFLForm<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
574 string cstr, InstrItinClass itin, list<dag>pattern>
575 : I<opcode, OOL, IOL, asmstr, itin> {
579 bit RC = 0; // set by isDOT
580 let Pattern = pattern;
581 let Constraints = cstr;
586 let Inst{16-20} = RT;
587 let Inst{21-30} = xo;
591 // 1.7.10 XS-Form - SRADI.
592 class XSForm_1<bits<6> opcode, bits<9> xo, dag OOL, dag IOL, string asmstr,
593 InstrItinClass itin, list<dag> pattern>
594 : I<opcode, OOL, IOL, asmstr, itin> {
599 bit RC = 0; // set by isDOT
600 let Pattern = pattern;
604 let Inst{16-20} = SH{4,3,2,1,0};
605 let Inst{21-29} = xo;
606 let Inst{30} = SH{5};
611 class XOForm_1<bits<6> opcode, bits<9> xo, bit oe, dag OOL, dag IOL, string asmstr,
612 InstrItinClass itin, list<dag> pattern>
613 : I<opcode, OOL, IOL, asmstr, itin> {
618 let Pattern = pattern;
620 bit RC = 0; // set by isDOT
623 let Inst{11-15} = RA;
624 let Inst{16-20} = RB;
626 let Inst{22-30} = xo;
630 class XOForm_3<bits<6> opcode, bits<9> xo, bit oe,
631 dag OOL, dag IOL, string asmstr, InstrItinClass itin, list<dag> pattern>
632 : XOForm_1<opcode, xo, oe, OOL, IOL, asmstr, itin, pattern> {
637 class AForm_1<bits<6> opcode, bits<5> xo, dag OOL, dag IOL, string asmstr,
638 InstrItinClass itin, list<dag> pattern>
639 : I<opcode, OOL, IOL, asmstr, itin> {
645 let Pattern = pattern;
647 bit RC = 0; // set by isDOT
649 let Inst{6-10} = FRT;
650 let Inst{11-15} = FRA;
651 let Inst{16-20} = FRB;
652 let Inst{21-25} = FRC;
653 let Inst{26-30} = xo;
657 class AForm_2<bits<6> opcode, bits<5> xo, dag OOL, dag IOL, string asmstr,
658 InstrItinClass itin, list<dag> pattern>
659 : AForm_1<opcode, xo, OOL, IOL, asmstr, itin, pattern> {
663 class AForm_3<bits<6> opcode, bits<5> xo, dag OOL, dag IOL, string asmstr,
664 InstrItinClass itin, list<dag> pattern>
665 : AForm_1<opcode, xo, OOL, IOL, asmstr, itin, pattern> {
670 class MForm_1<bits<6> opcode, dag OOL, dag IOL, string asmstr,
671 InstrItinClass itin, list<dag> pattern>
672 : I<opcode, OOL, IOL, asmstr, itin> {
679 let Pattern = pattern;
681 bit RC = 0; // set by isDOT
684 let Inst{11-15} = RA;
685 let Inst{16-20} = RB;
686 let Inst{21-25} = MB;
687 let Inst{26-30} = ME;
691 class MForm_2<bits<6> opcode, dag OOL, dag IOL, string asmstr,
692 InstrItinClass itin, list<dag> pattern>
693 : MForm_1<opcode, OOL, IOL, asmstr, itin, pattern> {
697 class MDForm_1<bits<6> opcode, bits<3> xo, dag OOL, dag IOL, string asmstr,
698 InstrItinClass itin, list<dag> pattern>
699 : I<opcode, OOL, IOL, asmstr, itin> {
705 let Pattern = pattern;
707 bit RC = 0; // set by isDOT
710 let Inst{11-15} = RA;
711 let Inst{16-20} = SH{4,3,2,1,0};
712 let Inst{21-26} = MBE{4,3,2,1,0,5};
713 let Inst{27-29} = xo;
714 let Inst{30} = SH{5};
722 // VAForm_1 - DACB ordering.
723 class VAForm_1<bits<6> xo, dag OOL, dag IOL, string asmstr,
724 InstrItinClass itin, list<dag> pattern>
725 : I<4, OOL, IOL, asmstr, itin> {
731 let Pattern = pattern;
734 let Inst{11-15} = VA;
735 let Inst{16-20} = VB;
736 let Inst{21-25} = VC;
737 let Inst{26-31} = xo;
740 // VAForm_1a - DABC ordering.
741 class VAForm_1a<bits<6> xo, dag OOL, dag IOL, string asmstr,
742 InstrItinClass itin, list<dag> pattern>
743 : I<4, OOL, IOL, asmstr, itin> {
749 let Pattern = pattern;
752 let Inst{11-15} = VA;
753 let Inst{16-20} = VB;
754 let Inst{21-25} = VC;
755 let Inst{26-31} = xo;
758 class VAForm_2<bits<6> xo, dag OOL, dag IOL, string asmstr,
759 InstrItinClass itin, list<dag> pattern>
760 : I<4, OOL, IOL, asmstr, itin> {
766 let Pattern = pattern;
769 let Inst{11-15} = VA;
770 let Inst{16-20} = VB;
772 let Inst{22-25} = SH;
773 let Inst{26-31} = xo;
777 class VXForm_1<bits<11> xo, dag OOL, dag IOL, string asmstr,
778 InstrItinClass itin, list<dag> pattern>
779 : I<4, OOL, IOL, asmstr, itin> {
784 let Pattern = pattern;
787 let Inst{11-15} = VA;
788 let Inst{16-20} = VB;
789 let Inst{21-31} = xo;
792 class VXForm_setzero<bits<11> xo, dag OOL, dag IOL, string asmstr,
793 InstrItinClass itin, list<dag> pattern>
794 : VXForm_1<xo, OOL, IOL, asmstr, itin, pattern> {
800 class VXForm_2<bits<11> xo, dag OOL, dag IOL, string asmstr,
801 InstrItinClass itin, list<dag> pattern>
802 : I<4, OOL, IOL, asmstr, itin> {
806 let Pattern = pattern;
810 let Inst{16-20} = VB;
811 let Inst{21-31} = xo;
814 class VXForm_3<bits<11> xo, dag OOL, dag IOL, string asmstr,
815 InstrItinClass itin, list<dag> pattern>
816 : I<4, OOL, IOL, asmstr, itin> {
820 let Pattern = pattern;
823 let Inst{11-15} = IMM;
825 let Inst{21-31} = xo;
828 /// VXForm_4 - VX instructions with "VD,0,0" register fields, like mfvscr.
829 class VXForm_4<bits<11> xo, dag OOL, dag IOL, string asmstr,
830 InstrItinClass itin, list<dag> pattern>
831 : I<4, OOL, IOL, asmstr, itin> {
834 let Pattern = pattern;
839 let Inst{21-31} = xo;
842 /// VXForm_5 - VX instructions with "0,0,VB" register fields, like mtvscr.
843 class VXForm_5<bits<11> xo, dag OOL, dag IOL, string asmstr,
844 InstrItinClass itin, list<dag> pattern>
845 : I<4, OOL, IOL, asmstr, itin> {
848 let Pattern = pattern;
852 let Inst{16-20} = VB;
853 let Inst{21-31} = xo;
857 class VXRForm_1<bits<10> xo, dag OOL, dag IOL, string asmstr,
858 InstrItinClass itin, list<dag> pattern>
859 : I<4, OOL, IOL, asmstr, itin> {
865 let Pattern = pattern;
868 let Inst{11-15} = VA;
869 let Inst{16-20} = VB;
871 let Inst{22-31} = xo;
874 //===----------------------------------------------------------------------===//
875 class Pseudo<dag OOL, dag IOL, string asmstr, list<dag> pattern>
876 : I<0, OOL, IOL, asmstr, NoItinerary> {
878 let Pattern = pattern;