1 //===- PowerPCInstrFormats.td - PowerPC Instruction Formats --*- tablegen -*-=//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 //===----------------------------------------------------------------------===//
12 // PowerPC instruction formats
14 class I<bits<6> opcode, dag OOL, dag IOL, string asmstr, InstrItinClass itin>
17 field bits<32> SoftFail = 0;
20 bit PPC64 = 0; // Default value, override with isPPC64
22 let Namespace = "PPC";
23 let Inst{0-5} = opcode;
24 let OutOperandList = OOL;
25 let InOperandList = IOL;
26 let AsmString = asmstr;
29 bits<1> PPC970_First = 0;
30 bits<1> PPC970_Single = 0;
31 bits<1> PPC970_Cracked = 0;
32 bits<3> PPC970_Unit = 0;
34 /// These fields correspond to the fields in PPCInstrInfo.h. Any changes to
35 /// these must be reflected there! See comments there for what these are.
36 let TSFlags{0} = PPC970_First;
37 let TSFlags{1} = PPC970_Single;
38 let TSFlags{2} = PPC970_Cracked;
39 let TSFlags{5-3} = PPC970_Unit;
41 // Fields used for relation models.
44 // For cases where multiple instruction definitions really represent the
45 // same underlying instruction but with one definition for 64-bit arguments
46 // and one for 32-bit arguments, this bit breaks the degeneracy between
47 // the two forms and allows TableGen to generate mapping tables.
48 bit Interpretation64Bit = 0;
51 class PPC970_DGroup_First { bits<1> PPC970_First = 1; }
52 class PPC970_DGroup_Single { bits<1> PPC970_Single = 1; }
53 class PPC970_DGroup_Cracked { bits<1> PPC970_Cracked = 1; }
54 class PPC970_MicroCode;
56 class PPC970_Unit_Pseudo { bits<3> PPC970_Unit = 0; }
57 class PPC970_Unit_FXU { bits<3> PPC970_Unit = 1; }
58 class PPC970_Unit_LSU { bits<3> PPC970_Unit = 2; }
59 class PPC970_Unit_FPU { bits<3> PPC970_Unit = 3; }
60 class PPC970_Unit_CRU { bits<3> PPC970_Unit = 4; }
61 class PPC970_Unit_VALU { bits<3> PPC970_Unit = 5; }
62 class PPC970_Unit_VPERM { bits<3> PPC970_Unit = 6; }
63 class PPC970_Unit_BRU { bits<3> PPC970_Unit = 7; }
65 // Two joined instructions; used to emit two adjacent instructions as one.
66 // The itinerary from the first instruction is used for scheduling and
68 class I2<bits<6> opcode1, bits<6> opcode2, dag OOL, dag IOL, string asmstr,
72 field bits<64> SoftFail = 0;
75 bit PPC64 = 0; // Default value, override with isPPC64
77 let Namespace = "PPC";
78 let Inst{0-5} = opcode1;
79 let Inst{32-37} = opcode2;
80 let OutOperandList = OOL;
81 let InOperandList = IOL;
82 let AsmString = asmstr;
85 bits<1> PPC970_First = 0;
86 bits<1> PPC970_Single = 0;
87 bits<1> PPC970_Cracked = 0;
88 bits<3> PPC970_Unit = 0;
90 /// These fields correspond to the fields in PPCInstrInfo.h. Any changes to
91 /// these must be reflected there! See comments there for what these are.
92 let TSFlags{0} = PPC970_First;
93 let TSFlags{1} = PPC970_Single;
94 let TSFlags{2} = PPC970_Cracked;
95 let TSFlags{5-3} = PPC970_Unit;
97 // Fields used for relation models.
99 bit Interpretation64Bit = 0;
103 class IForm<bits<6> opcode, bit aa, bit lk, dag OOL, dag IOL, string asmstr,
104 InstrItinClass itin, list<dag> pattern>
105 : I<opcode, OOL, IOL, asmstr, itin> {
106 let Pattern = pattern;
115 class BForm<bits<6> opcode, bit aa, bit lk, dag OOL, dag IOL, string asmstr>
116 : I<opcode, OOL, IOL, asmstr, IIC_BrB> {
117 bits<7> BIBO; // 2 bits of BI and 5 bits of BO.
122 let BI{0-1} = BIBO{5-6};
123 let BI{2-4} = CR{0-2};
125 let Inst{6-10} = BIBO{4-0};
126 let Inst{11-15} = BI;
127 let Inst{16-29} = BD;
132 class BForm_1<bits<6> opcode, bits<5> bo, bit aa, bit lk, dag OOL, dag IOL,
134 : BForm<opcode, aa, lk, OOL, IOL, asmstr> {
140 class BForm_2<bits<6> opcode, bits<5> bo, bits<5> bi, bit aa, bit lk,
141 dag OOL, dag IOL, string asmstr>
142 : I<opcode, OOL, IOL, asmstr, IIC_BrB> {
146 let Inst{11-15} = bi;
147 let Inst{16-29} = BD;
152 class BForm_3<bits<6> opcode, bit aa, bit lk,
153 dag OOL, dag IOL, string asmstr>
154 : I<opcode, OOL, IOL, asmstr, IIC_BrB> {
160 let Inst{11-15} = BI;
161 let Inst{16-29} = BD;
166 class BForm_4<bits<6> opcode, bits<5> bo, bit aa, bit lk,
167 dag OOL, dag IOL, string asmstr>
168 : I<opcode, OOL, IOL, asmstr, IIC_BrB> {
173 let Inst{11-15} = BI;
174 let Inst{16-29} = BD;
180 class SCForm<bits<6> opcode, bits<1> xo,
181 dag OOL, dag IOL, string asmstr, InstrItinClass itin,
183 : I<opcode, OOL, IOL, asmstr, itin> {
186 let Pattern = pattern;
188 let Inst{20-26} = LEV;
193 class DForm_base<bits<6> opcode, dag OOL, dag IOL, string asmstr,
194 InstrItinClass itin, list<dag> pattern>
195 : I<opcode, OOL, IOL, asmstr, itin> {
200 let Pattern = pattern;
207 class DForm_1<bits<6> opcode, dag OOL, dag IOL, string asmstr,
208 InstrItinClass itin, list<dag> pattern>
209 : I<opcode, OOL, IOL, asmstr, itin> {
213 let Pattern = pattern;
216 let Inst{11-15} = Addr{20-16}; // Base Reg
217 let Inst{16-31} = Addr{15-0}; // Displacement
220 class DForm_1a<bits<6> opcode, dag OOL, dag IOL, string asmstr,
221 InstrItinClass itin, list<dag> pattern>
222 : I<opcode, OOL, IOL, asmstr, itin> {
227 let Pattern = pattern;
235 class DForm_2<bits<6> opcode, dag OOL, dag IOL, string asmstr,
236 InstrItinClass itin, list<dag> pattern>
237 : DForm_base<opcode, OOL, IOL, asmstr, itin, pattern> {
239 // Even though ADDICo does not really have an RC bit, provide
240 // the declaration of one here so that isDOT has something to set.
244 class DForm_2_r0<bits<6> opcode, dag OOL, dag IOL, string asmstr,
245 InstrItinClass itin, list<dag> pattern>
246 : I<opcode, OOL, IOL, asmstr, itin> {
250 let Pattern = pattern;
257 class DForm_4<bits<6> opcode, dag OOL, dag IOL, string asmstr,
258 InstrItinClass itin, list<dag> pattern>
259 : I<opcode, OOL, IOL, asmstr, itin> {
264 let Pattern = pattern;
271 class DForm_4_zero<bits<6> opcode, dag OOL, dag IOL, string asmstr,
272 InstrItinClass itin, list<dag> pattern>
273 : DForm_1<opcode, OOL, IOL, asmstr, itin, pattern> {
278 class DForm_4_fixedreg_zero<bits<6> opcode, bits<5> R, dag OOL, dag IOL,
279 string asmstr, InstrItinClass itin,
281 : DForm_4<opcode, OOL, IOL, asmstr, itin, pattern> {
287 class IForm_and_DForm_1<bits<6> opcode1, bit aa, bit lk, bits<6> opcode2,
288 dag OOL, dag IOL, string asmstr,
289 InstrItinClass itin, list<dag> pattern>
290 : I2<opcode1, opcode2, OOL, IOL, asmstr, itin> {
294 let Pattern = pattern;
302 let Inst{43-47} = Addr{20-16}; // Base Reg
303 let Inst{48-63} = Addr{15-0}; // Displacement
306 // This is used to emit BL8+NOP.
307 class IForm_and_DForm_4_zero<bits<6> opcode1, bit aa, bit lk, bits<6> opcode2,
308 dag OOL, dag IOL, string asmstr,
309 InstrItinClass itin, list<dag> pattern>
310 : IForm_and_DForm_1<opcode1, aa, lk, opcode2,
311 OOL, IOL, asmstr, itin, pattern> {
316 class DForm_5<bits<6> opcode, dag OOL, dag IOL, string asmstr,
318 : I<opcode, OOL, IOL, asmstr, itin> {
327 let Inst{11-15} = RA;
331 class DForm_5_ext<bits<6> opcode, dag OOL, dag IOL, string asmstr,
333 : DForm_5<opcode, OOL, IOL, asmstr, itin> {
337 class DForm_6<bits<6> opcode, dag OOL, dag IOL, string asmstr,
339 : DForm_5<opcode, OOL, IOL, asmstr, itin>;
341 class DForm_6_ext<bits<6> opcode, dag OOL, dag IOL, string asmstr,
343 : DForm_6<opcode, OOL, IOL, asmstr, itin> {
349 class DSForm_1<bits<6> opcode, bits<2> xo, dag OOL, dag IOL, string asmstr,
350 InstrItinClass itin, list<dag> pattern>
351 : I<opcode, OOL, IOL, asmstr, itin> {
355 let Pattern = pattern;
357 let Inst{6-10} = RST;
358 let Inst{11-15} = DS_RA{18-14}; // Register #
359 let Inst{16-29} = DS_RA{13-0}; // Displacement.
360 let Inst{30-31} = xo;
365 class XForm_base_r3xo<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
366 InstrItinClass itin, list<dag> pattern>
367 : I<opcode, OOL, IOL, asmstr, itin> {
372 let Pattern = pattern;
374 bit RC = 0; // set by isDOT
376 let Inst{6-10} = RST;
379 let Inst{21-30} = xo;
383 class XForm_tlb<bits<10> xo, dag OOL, dag IOL, string asmstr,
384 InstrItinClass itin> : XForm_base_r3xo<31, xo, OOL, IOL, asmstr, itin, []> {
388 class XForm_attn<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
390 : I<opcode, OOL, IOL, asmstr, itin> {
391 let Inst{21-30} = xo;
394 // This is the same as XForm_base_r3xo, but the first two operands are swapped
395 // when code is emitted.
396 class XForm_base_r3xo_swapped
397 <bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
399 : I<opcode, OOL, IOL, asmstr, itin> {
404 bit RC = 0; // set by isDOT
406 let Inst{6-10} = RST;
409 let Inst{21-30} = xo;
414 class XForm_1<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
415 InstrItinClass itin, list<dag> pattern>
416 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern>;
418 class XForm_1a<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
419 InstrItinClass itin, list<dag> pattern>
420 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> {
424 class XForm_rs<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
425 InstrItinClass itin, list<dag> pattern>
426 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> {
431 class XForm_tlbws<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
432 InstrItinClass itin, list<dag> pattern>
433 : I<opcode, OOL, IOL, asmstr, itin> {
438 let Pattern = pattern;
440 let Inst{6-10} = RST;
443 let Inst{21-30} = xo;
447 class XForm_6<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
448 InstrItinClass itin, list<dag> pattern>
449 : XForm_base_r3xo_swapped<opcode, xo, OOL, IOL, asmstr, itin> {
450 let Pattern = pattern;
453 class XForm_8<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
454 InstrItinClass itin, list<dag> pattern>
455 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern>;
457 class XForm_10<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
458 InstrItinClass itin, list<dag> pattern>
459 : XForm_base_r3xo_swapped<opcode, xo, OOL, IOL, asmstr, itin> {
460 let Pattern = pattern;
463 class XForm_11<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
464 InstrItinClass itin, list<dag> pattern>
465 : XForm_base_r3xo_swapped<opcode, xo, OOL, IOL, asmstr, itin> {
467 let Pattern = pattern;
470 class XForm_16<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
472 : I<opcode, OOL, IOL, asmstr, itin> {
481 let Inst{11-15} = RA;
482 let Inst{16-20} = RB;
483 let Inst{21-30} = xo;
487 class XForm_icbt<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
489 : I<opcode, OOL, IOL, asmstr, itin> {
496 let Inst{11-15} = RA;
497 let Inst{16-20} = RB;
498 let Inst{21-30} = xo;
502 class XForm_sr<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
504 : I<opcode, OOL, IOL, asmstr, itin> {
509 let Inst{12-15} = SR;
510 let Inst{21-30} = xo;
513 class XForm_mbar<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
515 : I<opcode, OOL, IOL, asmstr, itin> {
519 let Inst{21-30} = xo;
522 class XForm_srin<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
524 : I<opcode, OOL, IOL, asmstr, itin> {
529 let Inst{16-20} = RB;
530 let Inst{21-30} = xo;
533 class XForm_mtmsr<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
535 : I<opcode, OOL, IOL, asmstr, itin> {
541 let Inst{21-30} = xo;
544 class XForm_16_ext<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
546 : XForm_16<opcode, xo, OOL, IOL, asmstr, itin> {
550 class XForm_17<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
552 : I<opcode, OOL, IOL, asmstr, itin> {
559 let Inst{11-15} = FRA;
560 let Inst{16-20} = FRB;
561 let Inst{21-30} = xo;
566 class XForm_18<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
567 InstrItinClass itin, list<dag> pattern>
568 : I<opcode, OOL, IOL, asmstr, itin> {
573 let Pattern = pattern;
575 let Inst{6-10} = FRT;
576 let Inst{11-15} = FRA;
577 let Inst{16-20} = FRB;
578 let Inst{21-30} = xo;
582 class XForm_19<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
583 InstrItinClass itin, list<dag> pattern>
584 : XForm_18<opcode, xo, OOL, IOL, asmstr, itin, pattern> {
588 class XForm_20<bits<6> opcode, bits<6> xo, dag OOL, dag IOL, string asmstr,
589 InstrItinClass itin, list<dag> pattern>
590 : I<opcode, OOL, IOL, asmstr, itin> {
596 let Pattern = pattern;
598 let Inst{6-10} = FRT;
599 let Inst{11-15} = FRA;
600 let Inst{16-20} = FRB;
601 let Inst{21-24} = tttt;
602 let Inst{25-30} = xo;
606 class XForm_24<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
607 InstrItinClass itin, list<dag> pattern>
608 : I<opcode, OOL, IOL, asmstr, itin> {
609 let Pattern = pattern;
613 let Inst{21-30} = xo;
617 class XForm_24_sync<bits<6> opcode, bits<10> xo, dag OOL, dag IOL,
618 string asmstr, InstrItinClass itin, list<dag> pattern>
619 : I<opcode, OOL, IOL, asmstr, itin> {
622 let Pattern = pattern;
627 let Inst{21-30} = xo;
631 class XForm_24_eieio<bits<6> opcode, bits<10> xo, dag OOL, dag IOL,
632 string asmstr, InstrItinClass itin, list<dag> pattern>
633 : XForm_24_sync<opcode, xo, OOL, IOL, asmstr, itin, pattern> {
637 class XForm_25<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
638 InstrItinClass itin, list<dag> pattern>
639 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> {
642 class XForm_26<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
643 InstrItinClass itin, list<dag> pattern>
644 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> {
648 class XForm_28<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
649 InstrItinClass itin, list<dag> pattern>
650 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> {
653 // This is used for MFFS, MTFSB0, MTFSB1. 42 is arbitrary; this series of
654 // numbers presumably relates to some document, but I haven't found it.
655 class XForm_42<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
656 InstrItinClass itin, list<dag> pattern>
657 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> {
658 let Pattern = pattern;
660 bit RC = 0; // set by isDOT
662 let Inst{6-10} = RST;
664 let Inst{21-30} = xo;
667 class XForm_43<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
668 InstrItinClass itin, list<dag> pattern>
669 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> {
670 let Pattern = pattern;
673 bit RC = 0; // set by isDOT
677 let Inst{21-30} = xo;
681 class XForm_0<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
682 InstrItinClass itin, list<dag> pattern>
683 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> {
689 class XForm_16b<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
690 InstrItinClass itin, list<dag> pattern>
691 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> {
696 class XForm_htm0<bits<6> opcode, bits<10> xo, dag OOL, dag IOL,
697 string asmstr, InstrItinClass itin, list<dag> pattern>
698 : I<opcode, OOL, IOL, asmstr, itin> {
706 let Inst{21-30} = xo;
710 class XForm_htm1<bits<6> opcode, bits<10> xo, dag OOL, dag IOL,
711 string asmstr, InstrItinClass itin, list<dag> pattern>
712 : I<opcode, OOL, IOL, asmstr, itin> {
719 let Inst{21-30} = xo;
723 class XForm_htm2<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
724 InstrItinClass itin, list<dag> pattern>
725 : I<opcode, OOL, IOL, asmstr, itin> {
728 bit RC = 0; // set by isDOT
733 let Inst{21-30} = xo;
737 class XForm_htm3<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
738 InstrItinClass itin, list<dag> pattern>
739 : I<opcode, OOL, IOL, asmstr, itin> {
746 let Inst{21-30} = xo;
751 class XX1Form<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
752 InstrItinClass itin, list<dag> pattern>
753 : I<opcode, OOL, IOL, asmstr, itin> {
758 let Pattern = pattern;
760 let Inst{6-10} = XT{4-0};
763 let Inst{21-30} = xo;
764 let Inst{31} = XT{5};
767 class XX1_RS6_RD5_XO<bits<6> opcode, bits<10> xo, dag OOL, dag IOL,
768 string asmstr, InstrItinClass itin, list<dag> pattern>
769 : XX1Form<opcode, xo, OOL, IOL, asmstr, itin, pattern> {
773 class XX2Form<bits<6> opcode, bits<9> xo, dag OOL, dag IOL, string asmstr,
774 InstrItinClass itin, list<dag> pattern>
775 : I<opcode, OOL, IOL, asmstr, itin> {
779 let Pattern = pattern;
781 let Inst{6-10} = XT{4-0};
783 let Inst{16-20} = XB{4-0};
784 let Inst{21-29} = xo;
785 let Inst{30} = XB{5};
786 let Inst{31} = XT{5};
789 class XX2Form_1<bits<6> opcode, bits<9> xo, dag OOL, dag IOL, string asmstr,
790 InstrItinClass itin, list<dag> pattern>
791 : I<opcode, OOL, IOL, asmstr, itin> {
795 let Pattern = pattern;
799 let Inst{16-20} = XB{4-0};
800 let Inst{21-29} = xo;
801 let Inst{30} = XB{5};
805 class XX2Form_2<bits<6> opcode, bits<9> xo, dag OOL, dag IOL, string asmstr,
806 InstrItinClass itin, list<dag> pattern>
807 : I<opcode, OOL, IOL, asmstr, itin> {
812 let Pattern = pattern;
814 let Inst{6-10} = XT{4-0};
817 let Inst{16-20} = XB{4-0};
818 let Inst{21-29} = xo;
819 let Inst{30} = XB{5};
820 let Inst{31} = XT{5};
823 class XX3Form<bits<6> opcode, bits<8> xo, dag OOL, dag IOL, string asmstr,
824 InstrItinClass itin, list<dag> pattern>
825 : I<opcode, OOL, IOL, asmstr, itin> {
830 let Pattern = pattern;
832 let Inst{6-10} = XT{4-0};
833 let Inst{11-15} = XA{4-0};
834 let Inst{16-20} = XB{4-0};
835 let Inst{21-28} = xo;
836 let Inst{29} = XA{5};
837 let Inst{30} = XB{5};
838 let Inst{31} = XT{5};
841 class XX3Form_1<bits<6> opcode, bits<8> xo, dag OOL, dag IOL, string asmstr,
842 InstrItinClass itin, list<dag> pattern>
843 : I<opcode, OOL, IOL, asmstr, itin> {
848 let Pattern = pattern;
852 let Inst{11-15} = XA{4-0};
853 let Inst{16-20} = XB{4-0};
854 let Inst{21-28} = xo;
855 let Inst{29} = XA{5};
856 let Inst{30} = XB{5};
860 class XX3Form_2<bits<6> opcode, bits<5> xo, dag OOL, dag IOL, string asmstr,
861 InstrItinClass itin, list<dag> pattern>
862 : I<opcode, OOL, IOL, asmstr, itin> {
868 let Pattern = pattern;
870 let Inst{6-10} = XT{4-0};
871 let Inst{11-15} = XA{4-0};
872 let Inst{16-20} = XB{4-0};
875 let Inst{24-28} = xo;
876 let Inst{29} = XA{5};
877 let Inst{30} = XB{5};
878 let Inst{31} = XT{5};
881 class XX3Form_Rc<bits<6> opcode, bits<7> xo, dag OOL, dag IOL, string asmstr,
882 InstrItinClass itin, list<dag> pattern>
883 : I<opcode, OOL, IOL, asmstr, itin> {
888 let Pattern = pattern;
890 bit RC = 0; // set by isDOT
892 let Inst{6-10} = XT{4-0};
893 let Inst{11-15} = XA{4-0};
894 let Inst{16-20} = XB{4-0};
896 let Inst{22-28} = xo;
897 let Inst{29} = XA{5};
898 let Inst{30} = XB{5};
899 let Inst{31} = XT{5};
902 class XX4Form<bits<6> opcode, bits<2> xo, dag OOL, dag IOL, string asmstr,
903 InstrItinClass itin, list<dag> pattern>
904 : I<opcode, OOL, IOL, asmstr, itin> {
910 let Pattern = pattern;
912 let Inst{6-10} = XT{4-0};
913 let Inst{11-15} = XA{4-0};
914 let Inst{16-20} = XB{4-0};
915 let Inst{21-25} = XC{4-0};
916 let Inst{26-27} = xo;
917 let Inst{28} = XC{5};
918 let Inst{29} = XA{5};
919 let Inst{30} = XB{5};
920 let Inst{31} = XT{5};
923 // DCB_Form - Form X instruction, used for dcb* instructions.
924 class DCB_Form<bits<10> xo, bits<5> immfield, dag OOL, dag IOL, string asmstr,
925 InstrItinClass itin, list<dag> pattern>
926 : I<31, OOL, IOL, asmstr, itin> {
930 let Pattern = pattern;
932 let Inst{6-10} = immfield;
935 let Inst{21-30} = xo;
939 class DCB_Form_hint<bits<10> xo, dag OOL, dag IOL, string asmstr,
940 InstrItinClass itin, list<dag> pattern>
941 : I<31, OOL, IOL, asmstr, itin> {
946 let Pattern = pattern;
951 let Inst{21-30} = xo;
955 // DSS_Form - Form X instruction, used for altivec dss* instructions.
956 class DSS_Form<bits<1> T, bits<10> xo, dag OOL, dag IOL, string asmstr,
957 InstrItinClass itin, list<dag> pattern>
958 : I<31, OOL, IOL, asmstr, itin> {
963 let Pattern = pattern;
967 let Inst{9-10} = STRM;
970 let Inst{21-30} = xo;
975 class XLForm_1<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
976 InstrItinClass itin, list<dag> pattern>
977 : I<opcode, OOL, IOL, asmstr, itin> {
982 let Pattern = pattern;
984 let Inst{6-10} = CRD;
985 let Inst{11-15} = CRA;
986 let Inst{16-20} = CRB;
987 let Inst{21-30} = xo;
991 class XLForm_1_ext<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
992 InstrItinClass itin, list<dag> pattern>
993 : I<opcode, OOL, IOL, asmstr, itin> {
996 let Pattern = pattern;
998 let Inst{6-10} = CRD;
999 let Inst{11-15} = CRD;
1000 let Inst{16-20} = CRD;
1001 let Inst{21-30} = xo;
1005 class XLForm_2<bits<6> opcode, bits<10> xo, bit lk, dag OOL, dag IOL, string asmstr,
1006 InstrItinClass itin, list<dag> pattern>
1007 : I<opcode, OOL, IOL, asmstr, itin> {
1012 let Pattern = pattern;
1014 let Inst{6-10} = BO;
1015 let Inst{11-15} = BI;
1016 let Inst{16-18} = 0;
1017 let Inst{19-20} = BH;
1018 let Inst{21-30} = xo;
1022 class XLForm_2_br<bits<6> opcode, bits<10> xo, bit lk,
1023 dag OOL, dag IOL, string asmstr, InstrItinClass itin, list<dag> pattern>
1024 : XLForm_2<opcode, xo, lk, OOL, IOL, asmstr, itin, pattern> {
1025 bits<7> BIBO; // 2 bits of BI and 5 bits of BO.
1029 let BI{0-1} = BIBO{5-6};
1030 let BI{2-4} = CR{0-2};
1034 class XLForm_2_br2<bits<6> opcode, bits<10> xo, bits<5> bo, bit lk,
1035 dag OOL, dag IOL, string asmstr, InstrItinClass itin, list<dag> pattern>
1036 : XLForm_2<opcode, xo, lk, OOL, IOL, asmstr, itin, pattern> {
1041 class XLForm_2_ext<bits<6> opcode, bits<10> xo, bits<5> bo, bits<5> bi, bit lk,
1042 dag OOL, dag IOL, string asmstr, InstrItinClass itin, list<dag> pattern>
1043 : XLForm_2<opcode, xo, lk, OOL, IOL, asmstr, itin, pattern> {
1049 class XLForm_3<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
1050 InstrItinClass itin>
1051 : I<opcode, OOL, IOL, asmstr, itin> {
1057 let Inst{11-13} = BFA;
1058 let Inst{14-15} = 0;
1059 let Inst{16-20} = 0;
1060 let Inst{21-30} = xo;
1064 class XLForm_4<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
1065 InstrItinClass itin>
1066 : I<opcode, OOL, IOL, asmstr, itin> {
1075 let Inst{11-14} = 0;
1077 let Inst{16-19} = U;
1079 let Inst{21-30} = xo;
1083 class XLForm_S<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
1084 InstrItinClass itin, list<dag> pattern>
1085 : I<opcode, OOL, IOL, asmstr, itin> {
1088 let Pattern = pattern;
1092 let Inst{21-30} = xo;
1096 class XLForm_2_and_DSForm_1<bits<6> opcode1, bits<10> xo1, bit lk,
1097 bits<6> opcode2, bits<2> xo2,
1098 dag OOL, dag IOL, string asmstr,
1099 InstrItinClass itin, list<dag> pattern>
1100 : I2<opcode1, opcode2, OOL, IOL, asmstr, itin> {
1108 let Pattern = pattern;
1110 let Inst{6-10} = BO;
1111 let Inst{11-15} = BI;
1112 let Inst{16-18} = 0;
1113 let Inst{19-20} = BH;
1114 let Inst{21-30} = xo1;
1117 let Inst{38-42} = RST;
1118 let Inst{43-47} = DS_RA{18-14}; // Register #
1119 let Inst{48-61} = DS_RA{13-0}; // Displacement.
1120 let Inst{62-63} = xo2;
1123 class XLForm_2_ext_and_DSForm_1<bits<6> opcode1, bits<10> xo1,
1124 bits<5> bo, bits<5> bi, bit lk,
1125 bits<6> opcode2, bits<2> xo2,
1126 dag OOL, dag IOL, string asmstr,
1127 InstrItinClass itin, list<dag> pattern>
1128 : XLForm_2_and_DSForm_1<opcode1, xo1, lk, opcode2, xo2,
1129 OOL, IOL, asmstr, itin, pattern> {
1136 class XFXForm_1<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
1137 InstrItinClass itin>
1138 : I<opcode, OOL, IOL, asmstr, itin> {
1142 let Inst{6-10} = RT;
1143 let Inst{11} = SPR{4};
1144 let Inst{12} = SPR{3};
1145 let Inst{13} = SPR{2};
1146 let Inst{14} = SPR{1};
1147 let Inst{15} = SPR{0};
1148 let Inst{16} = SPR{9};
1149 let Inst{17} = SPR{8};
1150 let Inst{18} = SPR{7};
1151 let Inst{19} = SPR{6};
1152 let Inst{20} = SPR{5};
1153 let Inst{21-30} = xo;
1157 class XFXForm_1_ext<bits<6> opcode, bits<10> xo, bits<10> spr,
1158 dag OOL, dag IOL, string asmstr, InstrItinClass itin>
1159 : XFXForm_1<opcode, xo, OOL, IOL, asmstr, itin> {
1163 class XFXForm_3<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
1164 InstrItinClass itin>
1165 : I<opcode, OOL, IOL, asmstr, itin> {
1168 let Inst{6-10} = RT;
1169 let Inst{11-20} = 0;
1170 let Inst{21-30} = xo;
1174 class XFXForm_3p<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
1175 InstrItinClass itin, list<dag> pattern>
1176 : I<opcode, OOL, IOL, asmstr, itin> {
1179 let Pattern = pattern;
1181 let Inst{6-10} = RT;
1182 let Inst{11-20} = Entry;
1183 let Inst{21-30} = xo;
1187 class XFXForm_5<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
1188 InstrItinClass itin>
1189 : I<opcode, OOL, IOL, asmstr, itin> {
1193 let Inst{6-10} = rS;
1195 let Inst{12-19} = FXM;
1197 let Inst{21-30} = xo;
1201 class XFXForm_5a<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
1202 InstrItinClass itin>
1203 : I<opcode, OOL, IOL, asmstr, itin> {
1207 let Inst{6-10} = ST;
1209 let Inst{12-19} = FXM;
1211 let Inst{21-30} = xo;
1215 class XFXForm_7<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
1216 InstrItinClass itin>
1217 : XFXForm_1<opcode, xo, OOL, IOL, asmstr, itin>;
1219 class XFXForm_7_ext<bits<6> opcode, bits<10> xo, bits<10> spr,
1220 dag OOL, dag IOL, string asmstr, InstrItinClass itin>
1221 : XFXForm_7<opcode, xo, OOL, IOL, asmstr, itin> {
1226 // This is probably 1.7.9, but I don't have the reference that uses this
1227 // numbering scheme...
1228 class XFLForm<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
1229 InstrItinClass itin, list<dag>pattern>
1230 : I<opcode, OOL, IOL, asmstr, itin> {
1234 bit RC = 0; // set by isDOT
1235 let Pattern = pattern;
1238 let Inst{7-14} = FM;
1240 let Inst{16-20} = rT;
1241 let Inst{21-30} = xo;
1245 class XFLForm_1<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
1246 InstrItinClass itin, list<dag>pattern>
1247 : I<opcode, OOL, IOL, asmstr, itin> {
1253 bit RC = 0; // set by isDOT
1254 let Pattern = pattern;
1257 let Inst{7-14} = FLM;
1259 let Inst{16-20} = FRB;
1260 let Inst{21-30} = xo;
1264 // 1.7.10 XS-Form - SRADI.
1265 class XSForm_1<bits<6> opcode, bits<9> xo, dag OOL, dag IOL, string asmstr,
1266 InstrItinClass itin, list<dag> pattern>
1267 : I<opcode, OOL, IOL, asmstr, itin> {
1272 bit RC = 0; // set by isDOT
1273 let Pattern = pattern;
1275 let Inst{6-10} = RS;
1276 let Inst{11-15} = A;
1277 let Inst{16-20} = SH{4,3,2,1,0};
1278 let Inst{21-29} = xo;
1279 let Inst{30} = SH{5};
1284 class XOForm_1<bits<6> opcode, bits<9> xo, bit oe, dag OOL, dag IOL, string asmstr,
1285 InstrItinClass itin, list<dag> pattern>
1286 : I<opcode, OOL, IOL, asmstr, itin> {
1291 let Pattern = pattern;
1293 bit RC = 0; // set by isDOT
1295 let Inst{6-10} = RT;
1296 let Inst{11-15} = RA;
1297 let Inst{16-20} = RB;
1299 let Inst{22-30} = xo;
1303 class XOForm_3<bits<6> opcode, bits<9> xo, bit oe,
1304 dag OOL, dag IOL, string asmstr, InstrItinClass itin, list<dag> pattern>
1305 : XOForm_1<opcode, xo, oe, OOL, IOL, asmstr, itin, pattern> {
1310 class AForm_1<bits<6> opcode, bits<5> xo, dag OOL, dag IOL, string asmstr,
1311 InstrItinClass itin, list<dag> pattern>
1312 : I<opcode, OOL, IOL, asmstr, itin> {
1318 let Pattern = pattern;
1320 bit RC = 0; // set by isDOT
1322 let Inst{6-10} = FRT;
1323 let Inst{11-15} = FRA;
1324 let Inst{16-20} = FRB;
1325 let Inst{21-25} = FRC;
1326 let Inst{26-30} = xo;
1330 class AForm_2<bits<6> opcode, bits<5> xo, dag OOL, dag IOL, string asmstr,
1331 InstrItinClass itin, list<dag> pattern>
1332 : AForm_1<opcode, xo, OOL, IOL, asmstr, itin, pattern> {
1336 class AForm_3<bits<6> opcode, bits<5> xo, dag OOL, dag IOL, string asmstr,
1337 InstrItinClass itin, list<dag> pattern>
1338 : AForm_1<opcode, xo, OOL, IOL, asmstr, itin, pattern> {
1342 class AForm_4<bits<6> opcode, bits<5> xo, dag OOL, dag IOL, string asmstr,
1343 InstrItinClass itin, list<dag> pattern>
1344 : I<opcode, OOL, IOL, asmstr, itin> {
1350 let Pattern = pattern;
1352 let Inst{6-10} = RT;
1353 let Inst{11-15} = RA;
1354 let Inst{16-20} = RB;
1355 let Inst{21-25} = COND;
1356 let Inst{26-30} = xo;
1361 class AForm_4a<bits<6> opcode, bits<5> xo, dag OOL, dag IOL, string asmstr,
1362 InstrItinClass itin, list<dag> pattern>
1363 : AForm_1<opcode, xo, OOL, IOL, asmstr, itin, pattern> {
1369 class MForm_1<bits<6> opcode, dag OOL, dag IOL, string asmstr,
1370 InstrItinClass itin, list<dag> pattern>
1371 : I<opcode, OOL, IOL, asmstr, itin> {
1378 let Pattern = pattern;
1380 bit RC = 0; // set by isDOT
1382 let Inst{6-10} = RS;
1383 let Inst{11-15} = RA;
1384 let Inst{16-20} = RB;
1385 let Inst{21-25} = MB;
1386 let Inst{26-30} = ME;
1390 class MForm_2<bits<6> opcode, dag OOL, dag IOL, string asmstr,
1391 InstrItinClass itin, list<dag> pattern>
1392 : MForm_1<opcode, OOL, IOL, asmstr, itin, pattern> {
1396 class MDForm_1<bits<6> opcode, bits<3> xo, dag OOL, dag IOL, string asmstr,
1397 InstrItinClass itin, list<dag> pattern>
1398 : I<opcode, OOL, IOL, asmstr, itin> {
1404 let Pattern = pattern;
1406 bit RC = 0; // set by isDOT
1408 let Inst{6-10} = RS;
1409 let Inst{11-15} = RA;
1410 let Inst{16-20} = SH{4,3,2,1,0};
1411 let Inst{21-26} = MBE{4,3,2,1,0,5};
1412 let Inst{27-29} = xo;
1413 let Inst{30} = SH{5};
1417 class MDSForm_1<bits<6> opcode, bits<4> xo, dag OOL, dag IOL, string asmstr,
1418 InstrItinClass itin, list<dag> pattern>
1419 : I<opcode, OOL, IOL, asmstr, itin> {
1425 let Pattern = pattern;
1427 bit RC = 0; // set by isDOT
1429 let Inst{6-10} = RS;
1430 let Inst{11-15} = RA;
1431 let Inst{16-20} = RB;
1432 let Inst{21-26} = MBE{4,3,2,1,0,5};
1433 let Inst{27-30} = xo;
1440 // VAForm_1 - DACB ordering.
1441 class VAForm_1<bits<6> xo, dag OOL, dag IOL, string asmstr,
1442 InstrItinClass itin, list<dag> pattern>
1443 : I<4, OOL, IOL, asmstr, itin> {
1449 let Pattern = pattern;
1451 let Inst{6-10} = VD;
1452 let Inst{11-15} = VA;
1453 let Inst{16-20} = VB;
1454 let Inst{21-25} = VC;
1455 let Inst{26-31} = xo;
1458 // VAForm_1a - DABC ordering.
1459 class VAForm_1a<bits<6> xo, dag OOL, dag IOL, string asmstr,
1460 InstrItinClass itin, list<dag> pattern>
1461 : I<4, OOL, IOL, asmstr, itin> {
1467 let Pattern = pattern;
1469 let Inst{6-10} = VD;
1470 let Inst{11-15} = VA;
1471 let Inst{16-20} = VB;
1472 let Inst{21-25} = VC;
1473 let Inst{26-31} = xo;
1476 class VAForm_2<bits<6> xo, dag OOL, dag IOL, string asmstr,
1477 InstrItinClass itin, list<dag> pattern>
1478 : I<4, OOL, IOL, asmstr, itin> {
1484 let Pattern = pattern;
1486 let Inst{6-10} = VD;
1487 let Inst{11-15} = VA;
1488 let Inst{16-20} = VB;
1490 let Inst{22-25} = SH;
1491 let Inst{26-31} = xo;
1495 class VXForm_1<bits<11> xo, dag OOL, dag IOL, string asmstr,
1496 InstrItinClass itin, list<dag> pattern>
1497 : I<4, OOL, IOL, asmstr, itin> {
1502 let Pattern = pattern;
1504 let Inst{6-10} = VD;
1505 let Inst{11-15} = VA;
1506 let Inst{16-20} = VB;
1507 let Inst{21-31} = xo;
1510 class VXForm_setzero<bits<11> xo, dag OOL, dag IOL, string asmstr,
1511 InstrItinClass itin, list<dag> pattern>
1512 : VXForm_1<xo, OOL, IOL, asmstr, itin, pattern> {
1518 class VXForm_2<bits<11> xo, dag OOL, dag IOL, string asmstr,
1519 InstrItinClass itin, list<dag> pattern>
1520 : I<4, OOL, IOL, asmstr, itin> {
1524 let Pattern = pattern;
1526 let Inst{6-10} = VD;
1527 let Inst{11-15} = 0;
1528 let Inst{16-20} = VB;
1529 let Inst{21-31} = xo;
1532 class VXForm_3<bits<11> xo, dag OOL, dag IOL, string asmstr,
1533 InstrItinClass itin, list<dag> pattern>
1534 : I<4, OOL, IOL, asmstr, itin> {
1538 let Pattern = pattern;
1540 let Inst{6-10} = VD;
1541 let Inst{11-15} = IMM;
1542 let Inst{16-20} = 0;
1543 let Inst{21-31} = xo;
1546 /// VXForm_4 - VX instructions with "VD,0,0" register fields, like mfvscr.
1547 class VXForm_4<bits<11> xo, dag OOL, dag IOL, string asmstr,
1548 InstrItinClass itin, list<dag> pattern>
1549 : I<4, OOL, IOL, asmstr, itin> {
1552 let Pattern = pattern;
1554 let Inst{6-10} = VD;
1555 let Inst{11-15} = 0;
1556 let Inst{16-20} = 0;
1557 let Inst{21-31} = xo;
1560 /// VXForm_5 - VX instructions with "0,0,VB" register fields, like mtvscr.
1561 class VXForm_5<bits<11> xo, dag OOL, dag IOL, string asmstr,
1562 InstrItinClass itin, list<dag> pattern>
1563 : I<4, OOL, IOL, asmstr, itin> {
1566 let Pattern = pattern;
1569 let Inst{11-15} = 0;
1570 let Inst{16-20} = VB;
1571 let Inst{21-31} = xo;
1574 /// VXForm_CR - VX crypto instructions with "VRT, VRA, ST, SIX"
1575 class VXForm_CR<bits<11> xo, dag OOL, dag IOL, string asmstr,
1576 InstrItinClass itin, list<dag> pattern>
1577 : I<4, OOL, IOL, asmstr, itin> {
1583 let Pattern = pattern;
1585 let Inst{6-10} = VD;
1586 let Inst{11-15} = VA;
1588 let Inst{17-20} = SIX;
1589 let Inst{21-31} = xo;
1592 /// VXForm_BX - VX crypto instructions with "VRT, VRA, 0 - like vsbox"
1593 class VXForm_BX<bits<11> xo, dag OOL, dag IOL, string asmstr,
1594 InstrItinClass itin, list<dag> pattern>
1595 : I<4, OOL, IOL, asmstr, itin> {
1599 let Pattern = pattern;
1601 let Inst{6-10} = VD;
1602 let Inst{11-15} = VA;
1603 let Inst{16-20} = 0;
1604 let Inst{21-31} = xo;
1608 class VXRForm_1<bits<10> xo, dag OOL, dag IOL, string asmstr,
1609 InstrItinClass itin, list<dag> pattern>
1610 : I<4, OOL, IOL, asmstr, itin> {
1616 let Pattern = pattern;
1618 let Inst{6-10} = VD;
1619 let Inst{11-15} = VA;
1620 let Inst{16-20} = VB;
1622 let Inst{22-31} = xo;
1625 // Z23-Form (used by QPX)
1626 class Z23Form_1<bits<6> opcode, bits<8> xo, dag OOL, dag IOL, string asmstr,
1627 InstrItinClass itin, list<dag> pattern>
1628 : I<opcode, OOL, IOL, asmstr, itin> {
1634 let Pattern = pattern;
1636 bit RC = 0; // set by isDOT
1638 let Inst{6-10} = FRT;
1639 let Inst{11-15} = FRA;
1640 let Inst{16-20} = FRB;
1641 let Inst{21-22} = idx;
1642 let Inst{23-30} = xo;
1646 class Z23Form_2<bits<6> opcode, bits<8> xo, dag OOL, dag IOL, string asmstr,
1647 InstrItinClass itin, list<dag> pattern>
1648 : Z23Form_1<opcode, xo, OOL, IOL, asmstr, itin, pattern> {
1652 class Z23Form_3<bits<6> opcode, bits<8> xo, dag OOL, dag IOL, string asmstr,
1653 InstrItinClass itin, list<dag> pattern>
1654 : I<opcode, OOL, IOL, asmstr, itin> {
1658 let Pattern = pattern;
1660 bit RC = 0; // set by isDOT
1662 let Inst{6-10} = FRT;
1663 let Inst{11-22} = idx;
1664 let Inst{23-30} = xo;
1668 //===----------------------------------------------------------------------===//
1669 class Pseudo<dag OOL, dag IOL, string asmstr, list<dag> pattern>
1670 : I<0, OOL, IOL, asmstr, NoItinerary> {
1671 let isCodeGenOnly = 1;
1673 let Pattern = pattern;