1 //===- PowerPCInstrFormats.td - PowerPC Instruction Formats --*- tablegen -*-=//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
13 class Format<bits<5> val> {
17 def Pseudo: Format<0>;
20 def Simm16 : Format<3>;
21 def PCRelimm24 : Format<5>;
22 def Imm24 : Format<6>;
24 def PCRelimm14 : Format<8>;
25 def Imm14 : Format<9>;
26 def Imm2 : Format<10>;
28 def Imm3 : Format<12>;
29 def Imm1 : Format<13>;
31 def Imm4 : Format<15>;
32 def Imm8 : Format<16>;
33 def Disimm16 : Format<17>;
34 def Disimm14 : Format<18>;
37 def Imm15 : Format<21>;
39 def Imm6 : Format<23>;
41 //===----------------------------------------------------------------------===//
43 // PowerPC instruction formats
45 class I<bits<6> opcode, dag OL, string asmstr> : Instruction {
48 bit PPC64 = 0; // Default value, override with isPPC64
49 bit VMX = 0; // Default value, override with isVMX
52 let Namespace = "PPC";
53 let Inst{0-5} = opcode;
55 let AsmString = asmstr;
59 class IForm<bits<6> opcode, bit aa, bit lk, dag OL, string asmstr>
60 : I<opcode, OL, asmstr> {
69 class BForm<bits<6> opcode, bit aa, bit lk, dag OL, string asmstr>
70 : I<opcode, OL, asmstr> {
77 let Inst{11-13} = CRNum;
78 let Inst{14-15} = BICode;
84 class BForm_ext<bits<6> opcode, bit aa, bit lk, bits<5> bo, bits<2> bicode,
85 dag OL, string asmstr>
86 : BForm<opcode, aa, lk, OL, asmstr> {
92 class DForm_base<bits<6> opcode, dag OL, string asmstr> : I<opcode, OL, asmstr>{
102 class DForm_1<bits<6> opcode, dag OL, string asmstr> : I<opcode, OL, asmstr> {
112 class DForm_2<bits<6> opcode, dag OL, string asmstr>
113 : DForm_base<opcode, OL, asmstr>;
115 class DForm_2_r0<bits<6> opcode, dag OL, string asmstr>
116 : I<opcode, OL, asmstr> {
125 // Currently we make the use/def reg distinction in ISel, not tablegen
126 class DForm_3<bits<6> opcode, dag OL, string asmstr>
127 : DForm_1<opcode, OL, asmstr>;
129 class DForm_4<bits<6> opcode, dag OL, string asmstr> : I<opcode, OL, asmstr> {
139 class DForm_4_zero<bits<6> opcode, dag OL, string asmstr>
140 : DForm_1<opcode, OL, asmstr> {
146 class DForm_5<bits<6> opcode, dag OL, string asmstr> : I<opcode, OL, asmstr> {
155 let Inst{11-15} = RA;
159 class DForm_5_ext<bits<6> opcode, dag OL, string asmstr>
160 : DForm_5<opcode, OL, asmstr> {
164 class DForm_6<bits<6> opcode, dag OL, string asmstr>
165 : DForm_5<opcode, OL, asmstr>;
167 class DForm_6_ext<bits<6> opcode, dag OL, string asmstr>
168 : DForm_6<opcode, OL, asmstr> {
172 class DForm_8<bits<6> opcode, dag OL, string asmstr>
173 : DForm_1<opcode, OL, asmstr> {
176 class DForm_9<bits<6> opcode, dag OL, string asmstr>
177 : DForm_1<opcode, OL, asmstr> {
181 class DSForm_1<bits<6> opcode, bits<2> xo, dag OL, string asmstr>
182 : I<opcode, OL, asmstr> {
187 let Inst{6-10} = RST;
188 let Inst{11-15} = RA;
189 let Inst{16-29} = DS;
190 let Inst{30-31} = xo;
193 class DSForm_2<bits<6> opcode, bits<2> xo, dag OL, string asmstr>
194 : DSForm_1<opcode, xo, OL, asmstr>;
197 class XForm_base_r3xo<bits<6> opcode, bits<10> xo,
198 dag OL, string asmstr> : I<opcode, OL, asmstr> {
203 bit RC = 0; // set by isDOT
205 let Inst{6-10} = RST;
208 let Inst{21-30} = xo;
212 // This is the same as XForm_base_r3xo, but the first two operands are swapped
213 // when code is emitted.
214 class XForm_base_r3xo_swapped
215 <bits<6> opcode, bits<10> xo, dag OL, string asmstr>
216 : I<opcode, OL, asmstr> {
221 bit RC = 0; // set by isDOT
223 let Inst{6-10} = RST;
226 let Inst{21-30} = xo;
231 class XForm_1<bits<6> opcode, bits<10> xo, dag OL, string asmstr>
232 : XForm_base_r3xo<opcode, xo, OL, asmstr>;
234 class XForm_6<bits<6> opcode, bits<10> xo, dag OL, string asmstr>
235 : XForm_base_r3xo_swapped<opcode, xo, OL, asmstr>;
237 class XForm_8<bits<6> opcode, bits<10> xo, dag OL, string asmstr>
238 : XForm_base_r3xo<opcode, xo, OL, asmstr>;
240 class XForm_10<bits<6> opcode, bits<10> xo, dag OL, string asmstr>
241 : XForm_base_r3xo_swapped<opcode, xo, OL, asmstr> {
244 class XForm_11<bits<6> opcode, bits<10> xo, dag OL, string asmstr>
245 : XForm_base_r3xo_swapped<opcode, xo, OL, asmstr> {
249 class XForm_16<bits<6> opcode, bits<10> xo, dag OL, string asmstr>
250 : I<opcode, OL, asmstr> {
259 let Inst{11-15} = RA;
260 let Inst{16-20} = RB;
261 let Inst{21-30} = xo;
265 class XForm_16_ext<bits<6> opcode, bits<10> xo, dag OL, string asmstr>
266 : XForm_16<opcode, xo, OL, asmstr> {
270 class XForm_17<bits<6> opcode, bits<10> xo, dag OL, string asmstr>
271 : I<opcode, OL, asmstr> {
278 let Inst{11-15} = FRA;
279 let Inst{16-20} = FRB;
280 let Inst{21-30} = xo;
284 class XForm_25<bits<6> opcode, bits<10> xo, dag OL, string asmstr>
285 : XForm_base_r3xo<opcode, xo, OL, asmstr> {
288 class XForm_26<bits<6> opcode, bits<10> xo, dag OL, string asmstr>
289 : XForm_base_r3xo<opcode, xo, OL, asmstr> {
293 class XForm_28<bits<6> opcode, bits<10> xo, dag OL, string asmstr>
294 : XForm_base_r3xo<opcode, xo, OL, asmstr> {
298 class XLForm_1<bits<6> opcode, bits<10> xo, dag OL, string asmstr>
299 : I<opcode, OL, asmstr> {
308 let Inst{9-10} = CRDb;
309 let Inst{11-13} = CRA;
310 let Inst{14-15} = CRAb;
311 let Inst{16-18} = CRB;
312 let Inst{19-20} = CRBb;
313 let Inst{21-30} = xo;
317 class XLForm_2<bits<6> opcode, bits<10> xo, bit lk,
318 dag OL, string asmstr> : I<opcode, OL, asmstr> {
324 let Inst{11-15} = BI;
326 let Inst{19-20} = BH;
327 let Inst{21-30} = xo;
331 class XLForm_2_ext<bits<6> opcode, bits<10> xo, bits<5> bo,
332 bits<5> bi, bit lk, dag OL, string asmstr>
333 : XLForm_2<opcode, xo, lk, OL, asmstr> {
339 class XLForm_3<bits<6> opcode, bits<10> xo, dag OL, string asmstr>
340 : I<opcode, OL, asmstr> {
346 let Inst{11-13} = BFA;
349 let Inst{21-30} = xo;
354 class XFXForm_1<bits<6> opcode, bits<10> xo, dag OL, string asmstr>
355 : I<opcode, OL, asmstr> {
360 let Inst{11-20} = SPR;
361 let Inst{21-30} = xo;
365 class XFXForm_1_ext<bits<6> opcode, bits<10> xo, bits<10> spr,
366 dag OL, string asmstr>
367 : XFXForm_1<opcode, xo, OL, asmstr> {
371 class XFXForm_3<bits<6> opcode, bits<10> xo, dag OL, string asmstr>
372 : I<opcode, OL, asmstr> {
377 let Inst{21-30} = xo;
381 class XFXForm_5<bits<6> opcode, bit mfcrf, bits<10> xo,
382 dag OL, string asmstr> : I<opcode, OL, asmstr> {
387 let Inst{11} = mfcrf;
388 let Inst{12-19} = FXM;
390 let Inst{21-30} = xo;
394 class XFXForm_7<bits<6> opcode, bits<10> xo, dag OL, string asmstr>
395 : XFXForm_1<opcode, xo, OL, asmstr>;
397 class XFXForm_7_ext<bits<6> opcode, bits<10> xo, bits<10> spr,
398 dag OL, string asmstr>
399 : XFXForm_7<opcode, xo, OL, asmstr> {
404 class XSForm_1<bits<6> opcode, bits<9> xo, dag OL, string asmstr>
405 : I<opcode, OL, asmstr> {
410 bit RC = 0; // set by isDOT
414 let Inst{16-20} = SH{1-5};
415 let Inst{21-29} = xo;
416 let Inst{30} = SH{0};
421 class XOForm_1<bits<6> opcode, bits<9> xo, bit oe, dag OL, string asmstr>
422 : I<opcode, OL, asmstr> {
427 bit RC = 0; // set by isDOT
430 let Inst{11-15} = RA;
431 let Inst{16-20} = RB;
433 let Inst{22-30} = xo;
437 class XOForm_1r<bits<6> opcode, bits<9> xo, bit oe, dag OL, string asmstr>
438 : XOForm_1<opcode, xo, oe, OL, asmstr> {
439 let Inst{11-15} = RB;
440 let Inst{16-20} = RA;
443 class XOForm_3<bits<6> opcode, bits<9> xo, bit oe,
444 dag OL, string asmstr>
445 : XOForm_1<opcode, xo, oe, OL, asmstr> {
450 class AForm_1<bits<6> opcode, bits<5> xo, dag OL, string asmstr>
451 : I<opcode, OL, asmstr> {
457 bit RC = 0; // set by isDOT
459 let Inst{6-10} = FRT;
460 let Inst{11-15} = FRA;
461 let Inst{16-20} = FRB;
462 let Inst{21-25} = FRC;
463 let Inst{26-30} = xo;
467 class AForm_2<bits<6> opcode, bits<5> xo, dag OL, string asmstr>
468 : AForm_1<opcode, xo, OL, asmstr> {
472 class AForm_3<bits<6> opcode, bits<5> xo, dag OL, string asmstr>
473 : AForm_1<opcode, xo, OL, asmstr> {
478 class MForm_1<bits<6> opcode, dag OL, string asmstr> : I<opcode, OL, asmstr> {
485 bit RC = 0; // set by isDOT
488 let Inst{11-15} = RA;
489 let Inst{16-20} = RB;
490 let Inst{21-25} = MB;
491 let Inst{26-30} = ME;
495 class MForm_2<bits<6> opcode, dag OL, string asmstr>
496 : MForm_1<opcode, OL, asmstr> {
500 class MDForm_1<bits<6> opcode, bits<3> xo, dag OL, string asmstr>
501 : I<opcode, OL, asmstr> {
507 bit RC = 0; // set by isDOT
510 let Inst{11-15} = RA;
511 let Inst{16-20} = SH{1-5};
512 let Inst{21-26} = MBE;
513 let Inst{27-29} = xo;
514 let Inst{30} = SH{0};
518 //===----------------------------------------------------------------------===//
520 class Pseudo<dag OL, string asmstr> : I<0, OL, asmstr> {