1 //===- PowerPCInstrFormats.td - PowerPC Instruction Formats --*- tablegen -*-=//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
13 class Format<bits<5> val> {
17 def Pseudo: Format<0>;
20 def Simm16 : Format<3>;
21 def PCRelimm24 : Format<5>;
22 def Imm24 : Format<6>;
24 def PCRelimm14 : Format<8>;
25 def Imm14 : Format<9>;
26 def Imm2 : Format<10>;
28 def Imm3 : Format<12>;
29 def Imm1 : Format<13>;
31 def Imm4 : Format<15>;
32 def Imm8 : Format<16>;
33 def Disimm16 : Format<17>;
34 def Disimm14 : Format<18>;
37 def Imm15 : Format<21>;
39 def Imm6 : Format<23>;
41 //===----------------------------------------------------------------------===//
43 // PowerPC instruction formats
45 class I<bits<6> opcode, bit ppc64, bit vmx, dag OL, string asmstr>
53 let Namespace = "PPC";
54 let Inst{0-5} = opcode;
56 let AsmString = asmstr;
60 class IForm<bits<6> opcode, bit aa, bit lk, bit ppc64, bit vmx,
61 dag OL, string asmstr> : I<opcode, ppc64, vmx, OL, asmstr> {
70 class BForm<bits<6> opcode, bit aa, bit lk, bit ppc64, bit vmx,
71 dag OL, string asmstr> : I<opcode, ppc64, vmx, OL, asmstr> {
78 let Inst{11-13} = CRNum;
79 let Inst{14-15} = BICode;
85 class BForm_ext<bits<6> opcode, bit aa, bit lk, bits<5> bo, bits<2> bicode,
86 bit ppc64, bit vmx, dag OL, string asmstr>
87 : BForm<opcode, aa, lk, ppc64, vmx, OL, asmstr> {
93 class DForm_base<bits<6> opcode, bit ppc64, bit vmx, dag OL, string asmstr>
94 : I<opcode, ppc64, vmx, OL, asmstr> {
104 class DForm_1<bits<6> opcode, bit ppc64, bit vmx, dag OL, string asmstr>
105 : I<opcode, ppc64, vmx, OL, asmstr> {
115 class DForm_2<bits<6> opcode, bit ppc64, bit vmx, dag OL, string asmstr>
116 : DForm_base<opcode, ppc64, vmx, OL, asmstr>;
118 class DForm_2_r0<bits<6> opcode, bit ppc64, bit vmx, dag OL, string asmstr>
119 : I<opcode, ppc64, vmx, OL, asmstr> {
128 // Currently we make the use/def reg distinction in ISel, not tablegen
129 class DForm_3<bits<6> opcode, bit ppc64, bit vmx, dag OL, string asmstr>
130 : DForm_1<opcode, ppc64, vmx, OL, asmstr>;
132 class DForm_4<bits<6> opcode, bit ppc64, bit vmx, dag OL, string asmstr>
133 : DForm_base<opcode, ppc64, vmx, OL, asmstr>;
135 class DForm_4_zero<bits<6> opcode, bit ppc64, bit vmx, dag OL, string asmstr>
136 : DForm_1<opcode, ppc64, vmx, OL, asmstr> {
142 class DForm_5<bits<6> opcode, bit ppc64, bit vmx, dag OL, string asmstr>
143 : I<opcode, ppc64, vmx, OL, asmstr> {
152 let Inst{11-15} = RA;
156 class DForm_5_ext<bits<6> opcode, bit ppc64, bit vmx, dag OL, string asmstr>
157 : DForm_5<opcode, ppc64, vmx, OL, asmstr> {
161 class DForm_6<bits<6> opcode, bit ppc64, bit vmx, dag OL, string asmstr>
162 : DForm_5<opcode, ppc64, vmx, OL, asmstr>;
164 class DForm_6_ext<bits<6> opcode, bit ppc64, bit vmx, dag OL, string asmstr>
165 : DForm_6<opcode, ppc64, vmx, OL, asmstr> {
169 class DForm_8<bits<6> opcode, bit ppc64, bit vmx, dag OL, string asmstr>
170 : DForm_1<opcode, ppc64, vmx, OL, asmstr> {
173 class DForm_9<bits<6> opcode, bit ppc64, bit vmx, dag OL, string asmstr>
174 : DForm_1<opcode, ppc64, vmx, OL, asmstr> {
178 class DSForm_1<bits<6> opcode, bits<2> xo, bit ppc64, bit vmx,
179 dag OL, string asmstr> : I<opcode, ppc64, vmx, OL, asmstr> {
184 let Inst{6-10} = RST;
185 let Inst{11-15} = RA;
186 let Inst{16-29} = DS;
187 let Inst{30-31} = xo;
190 class DSForm_2<bits<6> opcode, bits<2> xo, bit ppc64, bit vmx,
191 dag OL, string asmstr>
192 : DSForm_1<opcode, xo, ppc64, vmx, OL, asmstr>;
195 class XForm_base_r3xo<bits<6> opcode, bits<10> xo, bit rc, bit ppc64, bit vmx,
196 dag OL, string asmstr>
197 : I<opcode, ppc64, vmx, OL, asmstr> {
202 let Inst{6-10} = RST;
205 let Inst{21-30} = xo;
210 class XForm_1<bits<6> opcode, bits<10> xo, bit ppc64, bit vmx,
211 dag OL, string asmstr>
212 : XForm_base_r3xo<opcode, xo, 0, ppc64, vmx, OL, asmstr>;
214 class XForm_5<bits<6> opcode, bits<10> xo, bit ppc64, bit vmx,
215 dag OL, string asmstr>
216 : XForm_base_r3xo<opcode, xo, 0, ppc64, vmx, OL, asmstr> {
221 class XForm_6<bits<6> opcode, bits<10> xo, bit rc, bit ppc64, bit vmx,
222 dag OL, string asmstr>
223 : I<opcode, ppc64, vmx, OL, asmstr> {
228 let Inst{6-10} = RST;
231 let Inst{21-30} = xo;
235 class XForm_8<bits<6> opcode, bits<10> xo, bit ppc64, bit vmx,
236 dag OL, string asmstr>
237 : XForm_base_r3xo<opcode, xo, 0, ppc64, vmx, OL, asmstr>;
239 class XForm_10<bits<6> opcode, bits<10> xo, bit rc, bit ppc64, bit vmx,
240 dag OL, string asmstr>
241 : XForm_base_r3xo<opcode, xo, rc, ppc64, vmx, OL, asmstr> {
244 class XForm_11<bits<6> opcode, bits<10> xo, bit rc, bit ppc64, bit vmx,
245 dag OL, string asmstr>
246 : XForm_base_r3xo<opcode, xo, rc, ppc64, vmx, OL, asmstr> {
250 class XForm_16<bits<6> opcode, bits<10> xo, bit ppc64, bit vmx,
251 dag OL, string asmstr> : I<opcode, ppc64, vmx, OL, asmstr> {
260 let Inst{11-15} = RA;
261 let Inst{16-20} = RB;
262 let Inst{21-30} = xo;
266 class XForm_16_ext<bits<6> opcode, bits<10> xo, bit ppc64, bit vmx,
267 dag OL, string asmstr>
268 : XForm_16<opcode, xo, ppc64, vmx, OL, asmstr> {
272 class XForm_17<bits<6> opcode, bits<10> xo, bit ppc64, bit vmx,
273 dag OL, string asmstr> : I<opcode, ppc64, vmx, OL, asmstr> {
280 let Inst{11-15} = FRA;
281 let Inst{16-20} = FRB;
282 let Inst{21-30} = xo;
286 class XForm_25<bits<6> opcode, bits<10> xo, bit ppc64, bit vmx,
287 dag OL, string asmstr>
288 : XForm_base_r3xo<opcode, xo, 0, ppc64, vmx, OL, asmstr> {
291 class XForm_26<bits<6> opcode, bits<10> xo, bit rc, bit ppc64, bit vmx,
292 dag OL, string asmstr>
293 : XForm_base_r3xo<opcode, xo, rc, ppc64, vmx, OL, asmstr> {
297 class XForm_28<bits<6> opcode, bits<10> xo, bit ppc64, bit vmx,
298 dag OL, string asmstr>
299 : XForm_base_r3xo<opcode, xo, 0, ppc64, vmx, OL, asmstr> {
303 class XLForm_1<bits<6> opcode, bits<10> xo, bit ppc64, bit vmx,
304 dag OL, string asmstr>
305 : XForm_base_r3xo<opcode, xo, 0, ppc64, vmx, OL, asmstr> {
308 class XLForm_2<bits<6> opcode, bits<10> xo, bit lk, bit ppc64, bit vmx,
309 dag OL, string asmstr> : I<opcode, ppc64, vmx, OL, asmstr> {
315 let Inst{11-15} = BI;
317 let Inst{19-20} = BH;
318 let Inst{21-30} = xo;
322 class XLForm_2_ext<bits<6> opcode, bits<10> xo, bits<5> bo,
323 bits<5> bi, bit lk, bit ppc64, bit vmx,
324 dag OL, string asmstr>
325 : XLForm_2<opcode, xo, lk, ppc64, vmx, OL, asmstr> {
332 class XFXForm_1<bits<6> opcode, bits<10> xo, bit ppc64, bit vmx,
333 dag OL, string asmstr> : I<opcode, ppc64, vmx, OL, asmstr> {
338 let Inst{11-20} = SPR;
339 let Inst{21-30} = xo;
343 class XFXForm_1_ext<bits<6> opcode, bits<10> xo, bits<10> spr, bit ppc64,
344 bit vmx, dag OL, string asmstr>
345 : XFXForm_1<opcode, xo, ppc64, vmx, OL, asmstr> {
349 class XFXForm_7<bits<6> opcode, bits<10> xo, bit ppc64, bit vmx,
350 dag OL, string asmstr>
351 : XFXForm_1<opcode, xo, ppc64, vmx, OL, asmstr>;
353 class XFXForm_7_ext<bits<6> opcode, bits<10> xo, bits<10> spr,
354 bit ppc64, bit vmx, dag OL, string asmstr>
355 : XFXForm_7<opcode, xo, ppc64, vmx, OL, asmstr> {
360 class XSForm_1<bits<6> opcode, bits<9> xo, bit rc, bit ppc64, bit vmx,
361 dag OL, string asmstr> : I<opcode, ppc64, vmx, OL, asmstr> {
368 let Inst{16-20} = SH{1-5};
369 let Inst{21-29} = xo;
370 let Inst{30} = SH{0};
375 class XOForm_1<bits<6> opcode, bits<9> xo, bit oe, bit rc, bit ppc64, bit vmx,
376 dag OL, string asmstr> : I<opcode, ppc64, vmx, OL, asmstr> {
382 let Inst{11-15} = RA;
383 let Inst{16-20} = RB;
385 let Inst{22-30} = xo;
389 class XOForm_1r<bits<6> opcode, bits<9> xo, bit oe, bit rc, bit ppc64, bit vmx,
390 dag OL, string asmstr>
391 : XOForm_1<opcode, xo, oe, rc, ppc64, vmx, OL, asmstr> {
392 let Inst{11-15} = RB;
393 let Inst{16-20} = RA;
396 class XOForm_3<bits<6> opcode, bits<9> xo, bit oe, bit rc, bit ppc64, bit vmx,
397 dag OL, string asmstr>
398 : XOForm_1<opcode, xo, oe, rc, ppc64, vmx, OL, asmstr> {
403 class AForm_1<bits<6> opcode, bits<5> xo, bit rc, bit ppc64, bit vmx,
404 dag OL, string asmstr> : I<opcode, ppc64, vmx, OL, asmstr> {
410 let Inst{6-10} = FRT;
411 let Inst{11-15} = FRA;
412 let Inst{16-20} = FRB;
413 let Inst{21-25} = FRC;
414 let Inst{26-30} = xo;
418 class AForm_2<bits<6> opcode, bits<5> xo, bit rc, bit ppc64, bit vmx, dag OL,
420 : AForm_1<opcode, xo, rc, ppc64, vmx, OL, asmstr> {
424 class AForm_3<bits<6> opcode, bits<5> xo, bit rc, bit ppc64, bit vmx, dag OL,
426 : AForm_1<opcode, xo, rc, ppc64, vmx, OL, asmstr> {
431 class MForm_1<bits<6> opcode, bit rc, bit ppc64, bit vmx,
432 dag OL, string asmstr> : I<opcode, ppc64, vmx, OL, asmstr> {
440 let Inst{11-15} = RA;
441 let Inst{16-20} = RB;
442 let Inst{21-25} = MB;
443 let Inst{26-30} = ME;
447 class MForm_2<bits<6> opcode, bit rc, bit ppc64, bit vmx,
448 dag OL, string asmstr>
449 : MForm_1<opcode, rc, ppc64, vmx, OL, asmstr> {
453 class MDForm_1<bits<6> opcode, bits<3> xo, bit rc, bit ppc64, bit vmx,
454 dag OL, string asmstr> : I<opcode, ppc64, vmx, OL, asmstr> {
461 let Inst{11-15} = RA;
462 let Inst{16-20} = SH{1-5};
463 let Inst{21-26} = MBE;
464 let Inst{27-29} = xo;
465 let Inst{30} = SH{0};
469 //===----------------------------------------------------------------------===//
471 class Pseudo<dag OL, string asmstr> : I<0, 0, 0, OL, asmstr> {