1 //===- PowerPCInstrFormats.td - PowerPC Instruction Formats --*- tablegen -*-=//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 //===----------------------------------------------------------------------===//
12 // PowerPC instruction formats
14 class I<bits<6> opcode, dag OL, string asmstr, InstrItinClass itin>
18 bit PPC64 = 0; // Default value, override with isPPC64
21 let Namespace = "PPC";
22 let Inst{0-5} = opcode;
24 let AsmString = asmstr;
27 /// These fields correspond to the fields in PPCInstrInfo.h. Any changes to
28 /// these must be reflected there! See comments there for what these are.
29 bits<1> PPC970_First = 0;
30 bits<1> PPC970_Single = 0;
31 bits<1> PPC970_Cracked = 0;
32 bits<3> PPC970_Unit = 0;
35 class PPC970_DGroup_First { bits<1> PPC970_First = 1; }
36 class PPC970_DGroup_Single { bits<1> PPC970_Single = 1; }
37 class PPC970_DGroup_Cracked { bits<1> PPC970_Cracked = 1; }
38 class PPC970_MicroCode;
40 class PPC970_Unit_Pseudo { bits<3> PPC970_Unit = 0; }
41 class PPC970_Unit_FXU { bits<3> PPC970_Unit = 1; }
42 class PPC970_Unit_LSU { bits<3> PPC970_Unit = 2; }
43 class PPC970_Unit_FPU { bits<3> PPC970_Unit = 3; }
44 class PPC970_Unit_CRU { bits<3> PPC970_Unit = 4; }
45 class PPC970_Unit_VALU { bits<3> PPC970_Unit = 5; }
46 class PPC970_Unit_VPERM { bits<3> PPC970_Unit = 6; }
47 class PPC970_Unit_BRU { bits<3> PPC970_Unit = 7; }
51 class IForm<bits<6> opcode, bit aa, bit lk, dag OL, string asmstr,
52 InstrItinClass itin, list<dag> pattern>
53 : I<opcode, OL, asmstr, itin> {
54 let Pattern = pattern;
63 class BForm<bits<6> opcode, bit aa, bit lk, bits<5> bo, bits<2> bicode, dag OL,
64 string asmstr, InstrItinClass itin>
65 : I<opcode, OL, asmstr, itin> {
71 let Inst{14-15} = bicode;
77 class CBForm<bits<6> opcode, bit aa, bit lk, dag OL,
78 string asmstr> : I<opcode, OL, asmstr, BrB> {
79 bits<7> BIBO; // 2 bits of BI and 5 bits of BO.
84 let BI{0-1} = BIBO{5-6};
85 let BI{2-4} = CR{0-2};
87 let Inst{6-10} = BIBO{4-0};
96 class DForm_base<bits<6> opcode, dag OL, string asmstr, InstrItinClass itin,
98 : I<opcode, OL, asmstr, itin> {
103 let Pattern = pattern;
110 class DForm_1<bits<6> opcode, dag OL, string asmstr, InstrItinClass itin,
112 : I<opcode, OL, asmstr, itin> {
117 let Pattern = pattern;
124 class DForm_2<bits<6> opcode, dag OL, string asmstr, InstrItinClass itin,
126 : DForm_base<opcode, OL, asmstr, itin, pattern>;
128 class DForm_2_r0<bits<6> opcode, dag OL, string asmstr, InstrItinClass itin,
130 : I<opcode, OL, asmstr, itin> {
134 let Pattern = pattern;
141 class DForm_4<bits<6> opcode, dag OL, string asmstr, InstrItinClass itin,
143 : I<opcode, OL, asmstr, itin> {
148 let Pattern = pattern;
155 class DForm_4_zero<bits<6> opcode, dag OL, string asmstr, InstrItinClass itin,
157 : DForm_1<opcode, OL, asmstr, itin, pattern> {
163 class DForm_5<bits<6> opcode, dag OL, string asmstr, InstrItinClass itin>
164 : I<opcode, OL, asmstr, itin> {
173 let Inst{11-15} = RA;
177 class DForm_5_ext<bits<6> opcode, dag OL, string asmstr, InstrItinClass itin>
178 : DForm_5<opcode, OL, asmstr, itin> {
182 class DForm_6<bits<6> opcode, dag OL, string asmstr, InstrItinClass itin>
183 : DForm_5<opcode, OL, asmstr, itin>;
185 class DForm_6_ext<bits<6> opcode, dag OL, string asmstr, InstrItinClass itin>
186 : DForm_6<opcode, OL, asmstr, itin> {
192 class DSForm_1<bits<6> opcode, bits<2> xo, dag OL, string asmstr,
193 InstrItinClass itin, list<dag> pattern>
194 : I<opcode, OL, asmstr, itin> {
199 let Pattern = pattern;
201 let Inst{6-10} = RST;
202 let Inst{11-15} = RA;
203 let Inst{16-29} = DS;
204 let Inst{30-31} = xo;
208 class XForm_base_r3xo<bits<6> opcode, bits<10> xo, dag OL, string asmstr,
209 InstrItinClass itin, list<dag> pattern>
210 : I<opcode, OL, asmstr, itin> {
215 let Pattern = pattern;
217 bit RC = 0; // set by isDOT
219 let Inst{6-10} = RST;
222 let Inst{21-30} = xo;
226 // This is the same as XForm_base_r3xo, but the first two operands are swapped
227 // when code is emitted.
228 class XForm_base_r3xo_swapped
229 <bits<6> opcode, bits<10> xo, dag OL, string asmstr,
231 : I<opcode, OL, asmstr, itin> {
236 bit RC = 0; // set by isDOT
238 let Inst{6-10} = RST;
241 let Inst{21-30} = xo;
246 class XForm_1<bits<6> opcode, bits<10> xo, dag OL, string asmstr,
247 InstrItinClass itin, list<dag> pattern>
248 : XForm_base_r3xo<opcode, xo, OL, asmstr, itin, pattern>;
250 class XForm_6<bits<6> opcode, bits<10> xo, dag OL, string asmstr,
251 InstrItinClass itin, list<dag> pattern>
252 : XForm_base_r3xo_swapped<opcode, xo, OL, asmstr, itin> {
253 let Pattern = pattern;
256 class XForm_8<bits<6> opcode, bits<10> xo, dag OL, string asmstr,
257 InstrItinClass itin, list<dag> pattern>
258 : XForm_base_r3xo<opcode, xo, OL, asmstr, itin, pattern>;
260 class XForm_10<bits<6> opcode, bits<10> xo, dag OL, string asmstr,
261 InstrItinClass itin, list<dag> pattern>
262 : XForm_base_r3xo_swapped<opcode, xo, OL, asmstr, itin> {
263 let Pattern = pattern;
266 class XForm_11<bits<6> opcode, bits<10> xo, dag OL, string asmstr,
267 InstrItinClass itin, list<dag> pattern>
268 : XForm_base_r3xo_swapped<opcode, xo, OL, asmstr, itin> {
270 let Pattern = pattern;
273 class XForm_16<bits<6> opcode, bits<10> xo, dag OL, string asmstr,
275 : I<opcode, OL, asmstr, itin> {
284 let Inst{11-15} = RA;
285 let Inst{16-20} = RB;
286 let Inst{21-30} = xo;
290 class XForm_16_ext<bits<6> opcode, bits<10> xo, dag OL, string asmstr,
292 : XForm_16<opcode, xo, OL, asmstr, itin> {
296 class XForm_17<bits<6> opcode, bits<10> xo, dag OL, string asmstr,
298 : I<opcode, OL, asmstr, itin> {
305 let Inst{11-15} = FRA;
306 let Inst{16-20} = FRB;
307 let Inst{21-30} = xo;
311 class XForm_25<bits<6> opcode, bits<10> xo, dag OL, string asmstr,
312 InstrItinClass itin, list<dag> pattern>
313 : XForm_base_r3xo<opcode, xo, OL, asmstr, itin, pattern> {
316 class XForm_26<bits<6> opcode, bits<10> xo, dag OL, string asmstr,
317 InstrItinClass itin, list<dag> pattern>
318 : XForm_base_r3xo<opcode, xo, OL, asmstr, itin, pattern> {
322 class XForm_28<bits<6> opcode, bits<10> xo, dag OL, string asmstr,
323 InstrItinClass itin, list<dag> pattern>
324 : XForm_base_r3xo<opcode, xo, OL, asmstr, itin, pattern> {
327 // DCB_Form - Form X instruction, used for dcb* instructions.
328 class DCB_Form<bits<10> xo, bits<5> immfield, dag OL, string asmstr,
329 InstrItinClass itin, list<dag> pattern>
330 : I<31, OL, asmstr, itin> {
334 let Pattern = pattern;
336 let Inst{6-10} = immfield;
339 let Inst{21-30} = xo;
344 // DSS_Form - Form X instruction, used for altivec dss* instructions.
345 class DSS_Form<bits<10> xo, dag OL, string asmstr,
346 InstrItinClass itin, list<dag> pattern>
347 : I<31, OL, asmstr, itin> {
353 let Pattern = pattern;
357 let Inst{9-10} = STRM;
360 let Inst{21-30} = xo;
365 class XLForm_1<bits<6> opcode, bits<10> xo, dag OL, string asmstr,
367 : I<opcode, OL, asmstr, itin> {
376 let Inst{9-10} = CRDb;
377 let Inst{11-13} = CRA;
378 let Inst{14-15} = CRAb;
379 let Inst{16-18} = CRB;
380 let Inst{19-20} = CRBb;
381 let Inst{21-30} = xo;
385 class XLForm_2<bits<6> opcode, bits<10> xo, bit lk, dag OL, string asmstr,
386 InstrItinClass itin, list<dag> pattern>
387 : I<opcode, OL, asmstr, itin> {
392 let Pattern = pattern;
395 let Inst{11-15} = BI;
397 let Inst{19-20} = BH;
398 let Inst{21-30} = xo;
402 class XLForm_2_br<bits<6> opcode, bits<10> xo, bit lk,
403 dag OL, string asmstr, InstrItinClass itin, list<dag> pattern>
404 : XLForm_2<opcode, xo, lk, OL, asmstr, itin, pattern> {
405 bits<7> BIBO; // 2 bits of BI and 5 bits of BO.
409 let BI{0-1} = BIBO{0-1};
415 class XLForm_2_ext<bits<6> opcode, bits<10> xo, bits<5> bo, bits<5> bi, bit lk,
416 dag OL, string asmstr, InstrItinClass itin, list<dag> pattern>
417 : XLForm_2<opcode, xo, lk, OL, asmstr, itin, pattern> {
423 class XLForm_3<bits<6> opcode, bits<10> xo, dag OL, string asmstr,
425 : I<opcode, OL, asmstr, itin> {
431 let Inst{11-13} = BFA;
434 let Inst{21-30} = xo;
439 class XFXForm_1<bits<6> opcode, bits<10> xo, dag OL, string asmstr,
441 : I<opcode, OL, asmstr, itin> {
446 let Inst{11} = SPR{4};
447 let Inst{12} = SPR{3};
448 let Inst{13} = SPR{2};
449 let Inst{14} = SPR{1};
450 let Inst{15} = SPR{0};
451 let Inst{16} = SPR{9};
452 let Inst{17} = SPR{8};
453 let Inst{18} = SPR{7};
454 let Inst{19} = SPR{6};
455 let Inst{20} = SPR{5};
456 let Inst{21-30} = xo;
460 class XFXForm_1_ext<bits<6> opcode, bits<10> xo, bits<10> spr,
461 dag OL, string asmstr, InstrItinClass itin>
462 : XFXForm_1<opcode, xo, OL, asmstr, itin> {
466 class XFXForm_3<bits<6> opcode, bits<10> xo, dag OL, string asmstr,
468 : I<opcode, OL, asmstr, itin> {
473 let Inst{21-30} = xo;
477 class XFXForm_5<bits<6> opcode, bits<10> xo, dag OL, string asmstr,
479 : I<opcode, OL, asmstr, itin> {
485 let Inst{12-19} = FXM;
487 let Inst{21-30} = xo;
491 class XFXForm_5a<bits<6> opcode, bits<10> xo, dag OL, string asmstr,
493 : I<opcode, OL, asmstr, itin> {
499 let Inst{12-19} = FXM;
501 let Inst{21-30} = xo;
505 class XFXForm_7<bits<6> opcode, bits<10> xo, dag OL, string asmstr,
507 : XFXForm_1<opcode, xo, OL, asmstr, itin>;
509 class XFXForm_7_ext<bits<6> opcode, bits<10> xo, bits<10> spr,
510 dag OL, string asmstr, InstrItinClass itin>
511 : XFXForm_7<opcode, xo, OL, asmstr, itin> {
516 class XSForm_1<bits<6> opcode, bits<9> xo, dag OL, string asmstr,
517 InstrItinClass itin, list<dag> pattern>
518 : I<opcode, OL, asmstr, itin> {
523 bit RC = 0; // set by isDOT
524 let Pattern = pattern;
528 let Inst{16-20} = SH{1-5};
529 let Inst{21-29} = xo;
530 let Inst{30} = SH{0};
535 class XOForm_1<bits<6> opcode, bits<9> xo, bit oe, dag OL, string asmstr,
536 InstrItinClass itin, list<dag> pattern>
537 : I<opcode, OL, asmstr, itin> {
542 let Pattern = pattern;
544 bit RC = 0; // set by isDOT
547 let Inst{11-15} = RA;
548 let Inst{16-20} = RB;
550 let Inst{22-30} = xo;
554 class XOForm_3<bits<6> opcode, bits<9> xo, bit oe,
555 dag OL, string asmstr, InstrItinClass itin, list<dag> pattern>
556 : XOForm_1<opcode, xo, oe, OL, asmstr, itin, pattern> {
561 class AForm_1<bits<6> opcode, bits<5> xo, dag OL, string asmstr,
562 InstrItinClass itin, list<dag> pattern>
563 : I<opcode, OL, asmstr, itin> {
569 let Pattern = pattern;
571 bit RC = 0; // set by isDOT
573 let Inst{6-10} = FRT;
574 let Inst{11-15} = FRA;
575 let Inst{16-20} = FRB;
576 let Inst{21-25} = FRC;
577 let Inst{26-30} = xo;
581 class AForm_2<bits<6> opcode, bits<5> xo, dag OL, string asmstr,
582 InstrItinClass itin, list<dag> pattern>
583 : AForm_1<opcode, xo, OL, asmstr, itin, pattern> {
587 class AForm_3<bits<6> opcode, bits<5> xo, dag OL, string asmstr,
588 InstrItinClass itin, list<dag> pattern>
589 : AForm_1<opcode, xo, OL, asmstr, itin, pattern> {
594 class MForm_1<bits<6> opcode, dag OL, string asmstr,
595 InstrItinClass itin, list<dag> pattern>
596 : I<opcode, OL, asmstr, itin> {
603 let Pattern = pattern;
605 bit RC = 0; // set by isDOT
608 let Inst{11-15} = RA;
609 let Inst{16-20} = RB;
610 let Inst{21-25} = MB;
611 let Inst{26-30} = ME;
615 class MForm_2<bits<6> opcode, dag OL, string asmstr,
616 InstrItinClass itin, list<dag> pattern>
617 : MForm_1<opcode, OL, asmstr, itin, pattern> {
621 class MDForm_1<bits<6> opcode, bits<3> xo, dag OL, string asmstr,
622 InstrItinClass itin, list<dag> pattern>
623 : I<opcode, OL, asmstr, itin> {
629 let Pattern = pattern;
631 bit RC = 0; // set by isDOT
634 let Inst{11-15} = RA;
635 let Inst{16-20} = { SH{4}, SH{3}, SH{2}, SH{1}, SH{0} };
636 let Inst{21-26} = { MBE{4}, MBE{3}, MBE{2}, MBE{1}, MBE{0}, MBE{5} };
637 let Inst{27-29} = xo;
638 let Inst{30} = SH{5};
646 // VAForm_1 - DACB ordering.
647 class VAForm_1<bits<6> xo, dag OL, string asmstr,
648 InstrItinClass itin, list<dag> pattern>
649 : I<4, OL, asmstr, itin> {
655 let Pattern = pattern;
658 let Inst{11-15} = VA;
659 let Inst{16-20} = VB;
660 let Inst{21-25} = VC;
661 let Inst{26-31} = xo;
664 // VAForm_1a - DABC ordering.
665 class VAForm_1a<bits<6> xo, dag OL, string asmstr,
666 InstrItinClass itin, list<dag> pattern>
667 : I<4, OL, asmstr, itin> {
673 let Pattern = pattern;
676 let Inst{11-15} = VA;
677 let Inst{16-20} = VB;
678 let Inst{21-25} = VC;
679 let Inst{26-31} = xo;
682 class VAForm_2<bits<6> xo, dag OL, string asmstr,
683 InstrItinClass itin, list<dag> pattern>
684 : I<4, OL, asmstr, itin> {
690 let Pattern = pattern;
693 let Inst{11-15} = VA;
694 let Inst{16-20} = VB;
696 let Inst{22-25} = SH;
697 let Inst{26-31} = xo;
701 class VXForm_1<bits<11> xo, dag OL, string asmstr,
702 InstrItinClass itin, list<dag> pattern>
703 : I<4, OL, asmstr, itin> {
708 let Pattern = pattern;
711 let Inst{11-15} = VA;
712 let Inst{16-20} = VB;
713 let Inst{21-31} = xo;
716 class VXForm_setzero<bits<11> xo, dag OL, string asmstr,
717 InstrItinClass itin, list<dag> pattern>
718 : VXForm_1<xo, OL, asmstr, itin, pattern> {
724 class VXForm_2<bits<11> xo, dag OL, string asmstr,
725 InstrItinClass itin, list<dag> pattern>
726 : I<4, OL, asmstr, itin> {
730 let Pattern = pattern;
734 let Inst{16-20} = VB;
735 let Inst{21-31} = xo;
738 class VXForm_3<bits<11> xo, dag OL, string asmstr,
739 InstrItinClass itin, list<dag> pattern>
740 : I<4, OL, asmstr, itin> {
744 let Pattern = pattern;
747 let Inst{11-15} = IMM;
749 let Inst{21-31} = xo;
752 /// VXForm_4 - VX instructions with "VD,0,0" register fields, like mfvscr.
753 class VXForm_4<bits<11> xo, dag OL, string asmstr,
754 InstrItinClass itin, list<dag> pattern>
755 : I<4, OL, asmstr, itin> {
758 let Pattern = pattern;
763 let Inst{21-31} = xo;
766 /// VXForm_5 - VX instructions with "0,0,VB" register fields, like mtvscr.
767 class VXForm_5<bits<11> xo, dag OL, string asmstr,
768 InstrItinClass itin, list<dag> pattern>
769 : I<4, OL, asmstr, itin> {
772 let Pattern = pattern;
776 let Inst{16-20} = VB;
777 let Inst{21-31} = xo;
781 class VXRForm_1<bits<10> xo, dag OL, string asmstr,
782 InstrItinClass itin, list<dag> pattern>
783 : I<4, OL, asmstr, itin> {
789 let Pattern = pattern;
792 let Inst{11-15} = VA;
793 let Inst{16-20} = VB;
795 let Inst{22-31} = xo;
798 //===----------------------------------------------------------------------===//
799 class Pseudo<dag OL, string asmstr, list<dag> pattern>
800 : I<0, OL, asmstr, NoItinerary> {
802 let Pattern = pattern;