1 //===- PPCInstrQPX.td - The PowerPC QPX Extension --*- tablegen -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file describes the QPX extension to the PowerPC instruction set.
12 // Book Q: QPX Architecture Definition. IBM (as updated in) 2011.
14 //===----------------------------------------------------------------------===//
16 def PPCRegQFRCAsmOperand : AsmOperandClass {
17 let Name = "RegQFRC"; let PredicateMethod = "isRegNumber";
19 def qfrc : RegisterOperand<QFRC> {
20 let ParserMatchClass = PPCRegQFRCAsmOperand;
22 def PPCRegQSRCAsmOperand : AsmOperandClass {
23 let Name = "RegQSRC"; let PredicateMethod = "isRegNumber";
25 def qsrc : RegisterOperand<QSRC> {
26 let ParserMatchClass = PPCRegQSRCAsmOperand;
28 def PPCRegQBRCAsmOperand : AsmOperandClass {
29 let Name = "RegQBRC"; let PredicateMethod = "isRegNumber";
31 def qbrc : RegisterOperand<QBRC> {
32 let ParserMatchClass = PPCRegQBRCAsmOperand;
35 //===----------------------------------------------------------------------===//
36 // Helpers for defining instructions that directly correspond to intrinsics.
38 // QPXA1_Int - A AForm_1 intrinsic definition.
39 class QPXA1_Int<bits<6> opcode, bits<5> xo, string opc, Intrinsic IntID>
40 : AForm_1<opcode, xo, (outs qfrc:$FRT), (ins qfrc:$FRA, qfrc:$FRB, qfrc:$FRC),
41 !strconcat(opc, " $FRT, $FRA, $FRC, $FRB"), IIC_FPFused,
42 [(set v4f64:$FRT, (IntID v4f64:$FRA, v4f64:$FRB, v4f64:$FRC))]>;
43 // QPXA1s_Int - A AForm_1 intrinsic definition (simple instructions).
44 class QPXA1s_Int<bits<6> opcode, bits<5> xo, string opc, Intrinsic IntID>
45 : AForm_1<opcode, xo, (outs qfrc:$FRT), (ins qfrc:$FRA, qfrc:$FRB, qfrc:$FRC),
46 !strconcat(opc, " $FRT, $FRA, $FRC, $FRB"), IIC_VecPerm,
47 [(set v4f64:$FRT, (IntID v4f64:$FRA, v4f64:$FRB, v4f64:$FRC))]>;
48 // QPXA2_Int - A AForm_2 intrinsic definition.
49 class QPXA2_Int<bits<6> opcode, bits<5> xo, string opc, Intrinsic IntID>
50 : AForm_2<opcode, xo, (outs qfrc:$FRT), (ins qfrc:$FRA, qfrc:$FRB),
51 !strconcat(opc, " $FRT, $FRA, $FRB"), IIC_FPGeneral,
52 [(set v4f64:$FRT, (IntID v4f64:$FRA, v4f64:$FRB))]>;
53 // QPXA3_Int - A AForm_3 intrinsic definition.
54 class QPXA3_Int<bits<6> opcode, bits<5> xo, string opc, Intrinsic IntID>
55 : AForm_3<opcode, xo, (outs qfrc:$FRT), (ins qfrc:$FRA, qfrc:$FRC),
56 !strconcat(opc, " $FRT, $FRA, $FRC"), IIC_FPGeneral,
57 [(set v4f64:$FRT, (IntID v4f64:$FRA, v4f64:$FRC))]>;
58 // QPXA4_Int - A AForm_4a intrinsic definition.
59 class QPXA4_Int<bits<6> opcode, bits<5> xo, string opc, Intrinsic IntID>
60 : AForm_4a<opcode, xo, (outs qfrc:$FRT), (ins qfrc:$FRB),
61 !strconcat(opc, " $FRT, $FRB"), IIC_FPGeneral,
62 [(set v4f64:$FRT, (IntID v4f64:$FRB))]>;
63 // QPXX18_Int - A XForm_18 intrinsic definition.
64 class QPXX18_Int<bits<6> opcode, bits<10> xo, string opc, Intrinsic IntID>
65 : XForm_18<opcode, xo, (outs qfrc:$FRT), (ins qfrc:$FRA, qfrc:$FRB),
66 !strconcat(opc, " $FRT, $FRA, $FRB"), IIC_FPCompare,
67 [(set v4f64:$FRT, (IntID v4f64:$FRA, v4f64:$FRB))]>;
68 // QPXX19_Int - A XForm_19 intrinsic definition.
69 class QPXX19_Int<bits<6> opcode, bits<10> xo, string opc, Intrinsic IntID>
70 : XForm_19<opcode, xo, (outs qfrc:$FRT), (ins qfrc:$FRB),
71 !strconcat(opc, " $FRT, $FRB"), IIC_FPGeneral,
72 [(set v4f64:$FRT, (IntID v4f64:$FRB))]>;
74 //===----------------------------------------------------------------------===//
77 def extloadv4f32 : PatFrag<(ops node:$ptr), (extload node:$ptr), [{
78 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::v4f32;
81 def truncstorev4f32 : PatFrag<(ops node:$val, node:$ptr),
82 (truncstore node:$val, node:$ptr), [{
83 return cast<StoreSDNode>(N)->getMemoryVT() == MVT::v4f32;
85 def pre_truncstv4f32 : PatFrag<(ops node:$val, node:$base, node:$offset),
86 (pre_truncst node:$val,
87 node:$base, node:$offset), [{
88 return cast<StoreSDNode>(N)->getMemoryVT() == MVT::v4f32;
91 def fround_inexact : PatFrag<(ops node:$val), (fround node:$val), [{
92 return cast<ConstantSDNode>(N->getOperand(1))->getZExtValue() == 0;
95 def fround_exact : PatFrag<(ops node:$val), (fround node:$val), [{
96 return cast<ConstantSDNode>(N->getOperand(1))->getZExtValue() == 1;
99 let FastIselShouldIgnore = 1 in // FastIsel should ignore all u12 instrs.
100 def u12 : ImmLeaf<i32, [{ return (Imm & 0xFFF) == Imm; }]>;
102 //===----------------------------------------------------------------------===//
103 // Instruction Definitions.
105 def HasQPX : Predicate<"PPCSubTarget->hasQPX()">;
106 let Predicates = [HasQPX] in {
107 let DecoderNamespace = "QPX" in {
108 let hasSideEffects = 0 in { // QPX instructions don't have side effects.
111 let isCommutable = 1 in {
112 def QVFADD : AForm_2<4, 21,
113 (outs qfrc:$FRT), (ins qfrc:$FRA, qfrc:$FRB),
114 "qvfadd $FRT, $FRA, $FRB", IIC_FPGeneral,
115 [(set v4f64:$FRT, (fadd v4f64:$FRA, v4f64:$FRB))]>;
116 let isCodeGenOnly = 1 in
117 def QVFADDS : QPXA2_Int<0, 21, "qvfadds", int_ppc_qpx_qvfadds>;
118 def QVFADDSs : AForm_2<0, 21,
119 (outs qsrc:$FRT), (ins qsrc:$FRA, qsrc:$FRB),
120 "qvfadds $FRT, $FRA, $FRB", IIC_FPGeneral,
121 [(set v4f32:$FRT, (fadd v4f32:$FRA, v4f32:$FRB))]>;
123 def QVFSUB : AForm_2<4, 20,
124 (outs qfrc:$FRT), (ins qfrc:$FRA, qfrc:$FRB),
125 "qvfsub $FRT, $FRA, $FRB", IIC_FPGeneral,
126 [(set v4f64:$FRT, (fsub v4f64:$FRA, v4f64:$FRB))]>;
127 let isCodeGenOnly = 1 in
128 def QVFSUBS : QPXA2_Int<0, 20, "qvfsubs", int_ppc_qpx_qvfsubs>;
129 def QVFSUBSs : AForm_2<0, 20,
130 (outs qsrc:$FRT), (ins qsrc:$FRA, qsrc:$FRB),
131 "qvfsubs $FRT, $FRA, $FRB", IIC_FPGeneral,
132 [(set v4f32:$FRT, (fsub v4f32:$FRA, v4f32:$FRB))]>;
134 // Estimate Instructions
135 def QVFRE : AForm_4a<4, 24, (outs qfrc:$FRT), (ins qfrc:$FRB),
136 "qvfre $FRT, $FRB", IIC_FPGeneral,
137 [(set v4f64:$FRT, (PPCfre v4f64:$FRB))]>;
138 def QVFRES : QPXA4_Int<0, 24, "qvfres", int_ppc_qpx_qvfres>;
139 let isCodeGenOnly = 1 in
140 def QVFRESs : AForm_4a<0, 24, (outs qsrc:$FRT), (ins qsrc:$FRB),
141 "qvfres $FRT, $FRB", IIC_FPGeneral,
142 [(set v4f32:$FRT, (PPCfre v4f32:$FRB))]>;
144 def QVFRSQRTE : AForm_4a<4, 26, (outs qfrc:$FRT), (ins qfrc:$FRB),
145 "qvfrsqrte $FRT, $FRB", IIC_FPGeneral,
146 [(set v4f64:$FRT, (PPCfrsqrte v4f64:$FRB))]>;
147 def QVFRSQRTES : QPXA4_Int<0, 26, "qvfrsqrtes", int_ppc_qpx_qvfrsqrtes>;
148 let isCodeGenOnly = 1 in
149 def QVFRSQRTESs : AForm_4a<0, 26, (outs qsrc:$FRT), (ins qsrc:$FRB),
150 "qvfrsqrtes $FRT, $FRB", IIC_FPGeneral,
151 [(set v4f32:$FRT, (PPCfrsqrte v4f32:$FRB))]>;
153 // Multiply Instructions
154 let isCommutable = 1 in {
155 def QVFMUL : AForm_3<4, 25,
156 (outs qfrc:$FRT), (ins qfrc:$FRA, qfrc:$FRC),
157 "qvfmul $FRT, $FRA, $FRC", IIC_FPGeneral,
158 [(set v4f64:$FRT, (fmul v4f64:$FRA, v4f64:$FRC))]>;
159 let isCodeGenOnly = 1 in
160 def QVFMULS : QPXA3_Int<0, 25, "qvfmuls", int_ppc_qpx_qvfmuls>;
161 def QVFMULSs : AForm_3<0, 25,
162 (outs qsrc:$FRT), (ins qsrc:$FRA, qsrc:$FRC),
163 "qvfmuls $FRT, $FRA, $FRC", IIC_FPGeneral,
164 [(set v4f32:$FRT, (fmul v4f32:$FRA, v4f32:$FRC))]>;
166 def QVFXMUL : QPXA3_Int<4, 17, "qvfxmul", int_ppc_qpx_qvfxmul>;
167 def QVFXMULS : QPXA3_Int<0, 17, "qvfxmuls", int_ppc_qpx_qvfxmuls>;
169 // Multiply-add instructions
170 def QVFMADD : AForm_1<4, 29,
171 (outs qfrc:$FRT), (ins qfrc:$FRA, qfrc:$FRB, qfrc:$FRC),
172 "qvfmadd $FRT, $FRA, $FRC, $FRB", IIC_FPFused,
173 [(set v4f64:$FRT, (fma v4f64:$FRA, v4f64:$FRC, v4f64:$FRB))]>;
174 let isCodeGenOnly = 1 in
175 def QVFMADDS : QPXA1_Int<0, 29, "qvfmadds", int_ppc_qpx_qvfmadds>;
176 def QVFMADDSs : AForm_1<0, 29,
177 (outs qsrc:$FRT), (ins qsrc:$FRA, qsrc:$FRB, qsrc:$FRC),
178 "qvfmadds $FRT, $FRA, $FRC, $FRB", IIC_FPFused,
179 [(set v4f32:$FRT, (fma v4f32:$FRA, v4f32:$FRC, v4f32:$FRB))]>;
180 def QVFNMADD : AForm_1<4, 31,
181 (outs qfrc:$FRT), (ins qfrc:$FRA, qfrc:$FRB, qfrc:$FRC),
182 "qvfnmadd $FRT, $FRA, $FRC, $FRB", IIC_FPFused,
183 [(set v4f64:$FRT, (fneg (fma v4f64:$FRA, v4f64:$FRC,
185 let isCodeGenOnly = 1 in
186 def QVFNMADDS : QPXA1_Int<0, 31, "qvfnmadds", int_ppc_qpx_qvfnmadds>;
187 def QVFNMADDSs : AForm_1<0, 31,
188 (outs qsrc:$FRT), (ins qsrc:$FRA, qsrc:$FRB, qsrc:$FRC),
189 "qvfnmadds $FRT, $FRA, $FRC, $FRB", IIC_FPFused,
190 [(set v4f32:$FRT, (fneg (fma v4f32:$FRA, v4f32:$FRC,
192 def QVFMSUB : AForm_1<4, 28,
193 (outs qfrc:$FRT), (ins qfrc:$FRA, qfrc:$FRB, qfrc:$FRC),
194 "qvfmsub $FRT, $FRA, $FRC, $FRB", IIC_FPFused,
195 [(set v4f64:$FRT, (fma v4f64:$FRA, v4f64:$FRC,
196 (fneg v4f64:$FRB)))]>;
197 let isCodeGenOnly = 1 in
198 def QVFMSUBS : QPXA1_Int<0, 28, "qvfmsubs", int_ppc_qpx_qvfmsubs>;
199 def QVFMSUBSs : AForm_1<0, 28,
200 (outs qsrc:$FRT), (ins qsrc:$FRA, qsrc:$FRB, qsrc:$FRC),
201 "qvfmsubs $FRT, $FRA, $FRC, $FRB", IIC_FPFused,
202 [(set v4f32:$FRT, (fma v4f32:$FRA, v4f32:$FRC,
203 (fneg v4f32:$FRB)))]>;
204 def QVFNMSUB : AForm_1<4, 30,
205 (outs qfrc:$FRT), (ins qfrc:$FRA, qfrc:$FRB, qfrc:$FRC),
206 "qvfnmsub $FRT, $FRA, $FRC, $FRB", IIC_FPFused,
207 [(set v4f64:$FRT, (fneg (fma v4f64:$FRA, v4f64:$FRC,
208 (fneg v4f64:$FRB))))]>;
209 let isCodeGenOnly = 1 in
210 def QVFNMSUBS : QPXA1_Int<0, 30, "qvfnmsubs", int_ppc_qpx_qvfnmsubs>;
211 def QVFNMSUBSs : AForm_1<0, 30,
212 (outs qsrc:$FRT), (ins qsrc:$FRA, qsrc:$FRB, qsrc:$FRC),
213 "qvfnmsubs $FRT, $FRA, $FRC, $FRB", IIC_FPFused,
214 [(set v4f32:$FRT, (fneg (fma v4f32:$FRA, v4f32:$FRC,
215 (fneg v4f32:$FRB))))]>;
216 def QVFXMADD : QPXA1_Int<4, 9, "qvfxmadd", int_ppc_qpx_qvfxmadd>;
217 def QVFXMADDS : QPXA1_Int<0, 9, "qvfxmadds", int_ppc_qpx_qvfxmadds>;
218 def QVFXXNPMADD : QPXA1_Int<4, 11, "qvfxxnpmadd", int_ppc_qpx_qvfxxnpmadd>;
219 def QVFXXNPMADDS : QPXA1_Int<0, 11, "qvfxxnpmadds", int_ppc_qpx_qvfxxnpmadds>;
220 def QVFXXCPNMADD : QPXA1_Int<4, 3, "qvfxxcpnmadd", int_ppc_qpx_qvfxxcpnmadd>;
221 def QVFXXCPNMADDS : QPXA1_Int<0, 3, "qvfxxcpnmadds", int_ppc_qpx_qvfxxcpnmadds>;
222 def QVFXXMADD : QPXA1_Int<4, 1, "qvfxxmadd", int_ppc_qpx_qvfxxmadd>;
223 def QVFXXMADDS : QPXA1_Int<0, 1, "qvfxxmadds", int_ppc_qpx_qvfxxmadds>;
225 // Select Instruction
226 let isCodeGenOnly = 1 in
227 def QVFSEL : QPXA1s_Int<4, 23, "qvfsel", int_ppc_qpx_qvfsel>;
228 def QVFSELb : AForm_1<4, 23, (outs qfrc:$FRT),
229 (ins qbrc:$FRA, qfrc:$FRB, qfrc:$FRC),
230 "qvfsel $FRT, $FRA, $FRC, $FRB", IIC_VecPerm,
231 [(set v4f64:$FRT, (vselect v4i1:$FRA,
232 v4f64:$FRC, v4f64:$FRB))]>;
233 let isCodeGenOnly = 1 in
234 def QVFSELbs : AForm_1<4, 23, (outs qsrc:$FRT),
235 (ins qbrc:$FRA, qsrc:$FRB, qsrc:$FRC),
236 "qvfsel $FRT, $FRA, $FRC, $FRB", IIC_VecPerm,
237 [(set v4f32:$FRT, (vselect v4i1:$FRA,
238 v4f32:$FRC, v4f32:$FRB))]>;
239 let isCodeGenOnly = 1 in
240 def QVFSELbb: AForm_1<4, 23, (outs qbrc:$FRT),
241 (ins qbrc:$FRA, qbrc:$FRB, qbrc:$FRC),
242 "qvfsel $FRT, $FRA, $FRC, $FRB", IIC_VecPerm,
243 [(set v4i1:$FRT, (vselect v4i1:$FRA,
244 v4i1:$FRC, v4i1:$FRB))]>;
246 // SELECT_CC_* - Used to implement the SELECT_CC DAG operation. Expanded after
247 // instruction selection into a branch sequence.
248 let usesCustomInserter = 1 in {
249 def SELECT_CC_QFRC: Pseudo<(outs qfrc:$dst), (ins crrc:$cond, qfrc:$T, qfrc:$F,
250 i32imm:$BROPC), "#SELECT_CC_QFRC",
252 def SELECT_CC_QSRC: Pseudo<(outs qsrc:$dst), (ins crrc:$cond, qsrc:$T, qsrc:$F,
253 i32imm:$BROPC), "#SELECT_CC_QSRC",
255 def SELECT_CC_QBRC: Pseudo<(outs qbrc:$dst), (ins crrc:$cond, qbrc:$T, qbrc:$F,
256 i32imm:$BROPC), "#SELECT_CC_QBRC",
259 // SELECT_* pseudo instructions, like SELECT_CC_* but taking condition
260 // register bit directly.
261 def SELECT_QFRC: Pseudo<(outs qfrc:$dst), (ins crbitrc:$cond,
262 qfrc:$T, qfrc:$F), "#SELECT_QFRC",
264 (select i1:$cond, v4f64:$T, v4f64:$F))]>;
265 def SELECT_QSRC: Pseudo<(outs qsrc:$dst), (ins crbitrc:$cond,
266 qsrc:$T, qsrc:$F), "#SELECT_QSRC",
268 (select i1:$cond, v4f32:$T, v4f32:$F))]>;
269 def SELECT_QBRC: Pseudo<(outs qbrc:$dst), (ins crbitrc:$cond,
270 qbrc:$T, qbrc:$F), "#SELECT_QBRC",
272 (select i1:$cond, v4i1:$T, v4i1:$F))]>;
275 // Convert and Round Instructions
276 def QVFCTID : QPXX19_Int<4, 814, "qvfctid", int_ppc_qpx_qvfctid>;
277 let isCodeGenOnly = 1 in
278 def QVFCTIDb : XForm_19<4, 814, (outs qbrc:$FRT), (ins qbrc:$FRB),
279 "qvfctid $FRT, $FRB", IIC_FPGeneral, []>;
281 def QVFCTIDU : QPXX19_Int<4, 942, "qvfctidu", int_ppc_qpx_qvfctidu>;
282 def QVFCTIDZ : QPXX19_Int<4, 815, "qvfctidz", int_ppc_qpx_qvfctidz>;
283 def QVFCTIDUZ : QPXX19_Int<4, 943, "qvfctiduz", int_ppc_qpx_qvfctiduz>;
284 def QVFCTIW : QPXX19_Int<4, 14, "qvfctiw", int_ppc_qpx_qvfctiw>;
285 def QVFCTIWU : QPXX19_Int<4, 142, "qvfctiwu", int_ppc_qpx_qvfctiwu>;
286 def QVFCTIWZ : QPXX19_Int<4, 15, "qvfctiwz", int_ppc_qpx_qvfctiwz>;
287 def QVFCTIWUZ : QPXX19_Int<4, 143, "qvfctiwuz", int_ppc_qpx_qvfctiwuz>;
288 def QVFCFID : QPXX19_Int<4, 846, "qvfcfid", int_ppc_qpx_qvfcfid>;
289 let isCodeGenOnly = 1 in
290 def QVFCFIDb : XForm_19<4, 846, (outs qbrc:$FRT), (ins qbrc:$FRB),
291 "qvfcfid $FRT, $FRB", IIC_FPGeneral, []>;
293 def QVFCFIDU : QPXX19_Int<4, 974, "qvfcfidu", int_ppc_qpx_qvfcfidu>;
294 def QVFCFIDS : QPXX19_Int<0, 846, "qvfcfids", int_ppc_qpx_qvfcfids>;
295 def QVFCFIDUS : QPXX19_Int<0, 974, "qvfcfidus", int_ppc_qpx_qvfcfidus>;
297 let isCodeGenOnly = 1 in
298 def QVFRSP : QPXX19_Int<4, 12, "qvfrsp", int_ppc_qpx_qvfrsp>;
299 def QVFRSPs : XForm_19<4, 12,
300 (outs qsrc:$FRT), (ins qfrc:$FRB),
301 "qvfrsp $FRT, $FRB", IIC_FPGeneral,
302 [(set v4f32:$FRT, (fround_inexact v4f64:$FRB))]>;
304 def QVFRIZ : XForm_19<4, 424, (outs qfrc:$FRT), (ins qfrc:$FRB),
305 "qvfriz $FRT, $FRB", IIC_FPGeneral,
306 [(set v4f64:$FRT, (ftrunc v4f64:$FRB))]>;
307 let isCodeGenOnly = 1 in
308 def QVFRIZs : XForm_19<4, 424, (outs qsrc:$FRT), (ins qsrc:$FRB),
309 "qvfriz $FRT, $FRB", IIC_FPGeneral,
310 [(set v4f32:$FRT, (ftrunc v4f32:$FRB))]>;
312 def QVFRIN : XForm_19<4, 392, (outs qfrc:$FRT), (ins qfrc:$FRB),
313 "qvfrin $FRT, $FRB", IIC_FPGeneral,
314 [(set v4f64:$FRT, (frnd v4f64:$FRB))]>;
315 let isCodeGenOnly = 1 in
316 def QVFRINs : XForm_19<4, 392, (outs qsrc:$FRT), (ins qsrc:$FRB),
317 "qvfrin $FRT, $FRB", IIC_FPGeneral,
318 [(set v4f32:$FRT, (frnd v4f32:$FRB))]>;
320 def QVFRIP : XForm_19<4, 456, (outs qfrc:$FRT), (ins qfrc:$FRB),
321 "qvfrip $FRT, $FRB", IIC_FPGeneral,
322 [(set v4f64:$FRT, (fceil v4f64:$FRB))]>;
323 let isCodeGenOnly = 1 in
324 def QVFRIPs : XForm_19<4, 456, (outs qsrc:$FRT), (ins qsrc:$FRB),
325 "qvfrip $FRT, $FRB", IIC_FPGeneral,
326 [(set v4f32:$FRT, (fceil v4f32:$FRB))]>;
328 def QVFRIM : XForm_19<4, 488, (outs qfrc:$FRT), (ins qfrc:$FRB),
329 "qvfrim $FRT, $FRB", IIC_FPGeneral,
330 [(set v4f64:$FRT, (ffloor v4f64:$FRB))]>;
331 let isCodeGenOnly = 1 in
332 def QVFRIMs : XForm_19<4, 488, (outs qsrc:$FRT), (ins qsrc:$FRB),
333 "qvfrim $FRT, $FRB", IIC_FPGeneral,
334 [(set v4f32:$FRT, (ffloor v4f32:$FRB))]>;
337 def QVFMR : XForm_19<4, 72,
338 (outs qfrc:$FRT), (ins qfrc:$FRB),
339 "qvfmr $FRT, $FRB", IIC_VecPerm,
340 [/* (set v4f64:$FRT, v4f64:$FRB) */]>;
341 let isCodeGenOnly = 1 in {
342 def QVFMRs : XForm_19<4, 72,
343 (outs qsrc:$FRT), (ins qsrc:$FRB),
344 "qvfmr $FRT, $FRB", IIC_VecPerm,
345 [/* (set v4f32:$FRT, v4f32:$FRB) */]>;
346 def QVFMRb : XForm_19<4, 72,
347 (outs qbrc:$FRT), (ins qbrc:$FRB),
348 "qvfmr $FRT, $FRB", IIC_VecPerm,
349 [/* (set v4i1:$FRT, v4i1:$FRB) */]>;
351 def QVFNEG : XForm_19<4, 40,
352 (outs qfrc:$FRT), (ins qfrc:$FRB),
353 "qvfneg $FRT, $FRB", IIC_VecPerm,
354 [(set v4f64:$FRT, (fneg v4f64:$FRB))]>;
355 let isCodeGenOnly = 1 in
356 def QVFNEGs : XForm_19<4, 40,
357 (outs qsrc:$FRT), (ins qsrc:$FRB),
358 "qvfneg $FRT, $FRB", IIC_VecPerm,
359 [(set v4f32:$FRT, (fneg v4f32:$FRB))]>;
360 def QVFABS : XForm_19<4, 264,
361 (outs qfrc:$FRT), (ins qfrc:$FRB),
362 "qvfabs $FRT, $FRB", IIC_VecPerm,
363 [(set v4f64:$FRT, (fabs v4f64:$FRB))]>;
364 let isCodeGenOnly = 1 in
365 def QVFABSs : XForm_19<4, 264,
366 (outs qsrc:$FRT), (ins qsrc:$FRB),
367 "qvfabs $FRT, $FRB", IIC_VecPerm,
368 [(set v4f32:$FRT, (fabs v4f32:$FRB))]>;
369 def QVFNABS : XForm_19<4, 136,
370 (outs qfrc:$FRT), (ins qfrc:$FRB),
371 "qvfnabs $FRT, $FRB", IIC_VecPerm,
372 [(set v4f64:$FRT, (fneg (fabs v4f64:$FRB)))]>;
373 let isCodeGenOnly = 1 in
374 def QVFNABSs : XForm_19<4, 136,
375 (outs qsrc:$FRT), (ins qsrc:$FRB),
376 "qvfnabs $FRT, $FRB", IIC_VecPerm,
377 [(set v4f32:$FRT, (fneg (fabs v4f32:$FRB)))]>;
378 def QVFCPSGN : XForm_18<4, 8,
379 (outs qfrc:$FRT), (ins qfrc:$FRA, qfrc:$FRB),
380 "qvfcpsgn $FRT, $FRA, $FRB", IIC_VecPerm,
381 [(set v4f64:$FRT, (fcopysign v4f64:$FRB, v4f64:$FRA))]>;
382 let isCodeGenOnly = 1 in
383 def QVFCPSGNs : XForm_18<4, 8,
384 (outs qsrc:$FRT), (ins qsrc:$FRA, qsrc:$FRB),
385 "qvfcpsgn $FRT, $FRA, $FRB", IIC_VecPerm,
386 [(set v4f32:$FRT, (fcopysign v4f32:$FRB, v4f32:$FRA))]>;
388 def QVALIGNI : Z23Form_1<4, 5,
389 (outs qfrc:$FRT), (ins qfrc:$FRA, qfrc:$FRB, u2imm:$idx),
390 "qvaligni $FRT, $FRA, $FRB, $idx", IIC_VecPerm,
392 (PPCqvaligni v4f64:$FRA, v4f64:$FRB,
394 let isCodeGenOnly = 1 in
395 def QVALIGNIs : Z23Form_1<4, 5,
396 (outs qsrc:$FRT), (ins qsrc:$FRA, qsrc:$FRB, u2imm:$idx),
397 "qvaligni $FRT, $FRA, $FRB, $idx", IIC_VecPerm,
399 (PPCqvaligni v4f32:$FRA, v4f32:$FRB,
401 let isCodeGenOnly = 1 in
402 def QVALIGNIb : Z23Form_1<4, 5,
403 (outs qbrc:$FRT), (ins qbrc:$FRA, qbrc:$FRB, u2imm:$idx),
404 "qvaligni $FRT, $FRA, $FRB, $idx", IIC_VecPerm,
406 (PPCqvaligni v4i1:$FRA, v4i1:$FRB,
409 def QVESPLATI : Z23Form_2<4, 37,
410 (outs qfrc:$FRT), (ins qfrc:$FRA, u2imm:$idx),
411 "qvesplati $FRT, $FRA, $idx", IIC_VecPerm,
413 (PPCqvesplati v4f64:$FRA, (i32 imm:$idx)))]>;
414 let isCodeGenOnly = 1 in
415 def QVESPLATIs : Z23Form_2<4, 37,
416 (outs qsrc:$FRT), (ins qsrc:$FRA, u2imm:$idx),
417 "qvesplati $FRT, $FRA, $idx", IIC_VecPerm,
419 (PPCqvesplati v4f32:$FRA, (i32 imm:$idx)))]>;
420 let isCodeGenOnly = 1 in
421 def QVESPLATIb : Z23Form_2<4, 37,
422 (outs qbrc:$FRT), (ins qbrc:$FRA, u2imm:$idx),
423 "qvesplati $FRT, $FRA, $idx", IIC_VecPerm,
425 (PPCqvesplati v4i1:$FRA, (i32 imm:$idx)))]>;
427 def QVFPERM : AForm_1<4, 6,
428 (outs qfrc:$FRT), (ins qfrc:$FRA, qfrc:$FRB, qfrc:$FRC),
429 "qvfperm $FRT, $FRA, $FRB, $FRC", IIC_VecPerm,
431 (PPCqvfperm v4f64:$FRA, v4f64:$FRB, v4f64:$FRC))]>;
432 let isCodeGenOnly = 1 in
433 def QVFPERMs : AForm_1<4, 6,
434 (outs qsrc:$FRT), (ins qsrc:$FRA, qsrc:$FRB, qfrc:$FRC),
435 "qvfperm $FRT, $FRA, $FRB, $FRC", IIC_VecPerm,
437 (PPCqvfperm v4f32:$FRA, v4f32:$FRB, v4f64:$FRC))]>;
439 let isReMaterializable = 1, isAsCheapAsAMove = 1 in
440 def QVGPCI : Z23Form_3<4, 133,
441 (outs qfrc:$FRT), (ins u12imm:$idx),
442 "qvgpci $FRT, $idx", IIC_VecPerm,
443 [(set v4f64:$FRT, (PPCqvgpci (u12:$idx)))]>;
445 // Compare Instruction
446 let isCodeGenOnly = 1 in
447 def QVFTSTNAN : QPXX18_Int<4, 64, "qvftstnan", int_ppc_qpx_qvftstnan>;
448 def QVFTSTNANb : XForm_18<4, 64, (outs qbrc:$FRT), (ins qfrc:$FRA, qfrc:$FRB),
449 "qvftstnan $FRT, $FRA, $FRB", IIC_FPCompare,
451 (setcc v4f64:$FRA, v4f64:$FRB, SETUO))]>;
452 let isCodeGenOnly = 1 in
453 def QVFTSTNANbs : XForm_18<4, 64, (outs qbrc:$FRT), (ins qsrc:$FRA, qsrc:$FRB),
454 "qvftstnan $FRT, $FRA, $FRB", IIC_FPCompare,
456 (setcc v4f32:$FRA, v4f32:$FRB, SETUO))]>;
457 let isCodeGenOnly = 1 in
458 def QVFCMPLT : QPXX18_Int<4, 96, "qvfcmplt", int_ppc_qpx_qvfcmplt>;
459 def QVFCMPLTb : XForm_18<4, 96, (outs qbrc:$FRT), (ins qfrc:$FRA, qfrc:$FRB),
460 "qvfcmplt $FRT, $FRA, $FRB", IIC_FPCompare,
462 (setcc v4f64:$FRA, v4f64:$FRB, SETOLT))]>;
463 let isCodeGenOnly = 1 in
464 def QVFCMPLTbs : XForm_18<4, 96, (outs qbrc:$FRT), (ins qsrc:$FRA, qsrc:$FRB),
465 "qvfcmplt $FRT, $FRA, $FRB", IIC_FPCompare,
467 (setcc v4f32:$FRA, v4f32:$FRB, SETOLT))]>;
468 let isCodeGenOnly = 1 in
469 def QVFCMPGT : QPXX18_Int<4, 32, "qvfcmpgt", int_ppc_qpx_qvfcmpgt>;
470 def QVFCMPGTb : XForm_18<4, 32, (outs qbrc:$FRT), (ins qfrc:$FRA, qfrc:$FRB),
471 "qvfcmpgt $FRT, $FRA, $FRB", IIC_FPCompare,
473 (setcc v4f64:$FRA, v4f64:$FRB, SETOGT))]>;
474 let isCodeGenOnly = 1 in
475 def QVFCMPGTbs : XForm_18<4, 32, (outs qbrc:$FRT), (ins qsrc:$FRA, qsrc:$FRB),
476 "qvfcmpgt $FRT, $FRA, $FRB", IIC_FPCompare,
478 (setcc v4f32:$FRA, v4f32:$FRB, SETOGT))]>;
479 let isCodeGenOnly = 1 in
480 def QVFCMPEQ : QPXX18_Int<4, 0, "qvfcmpeq", int_ppc_qpx_qvfcmpeq>;
481 def QVFCMPEQb : XForm_18<4, 0, (outs qbrc:$FRT), (ins qfrc:$FRA, qfrc:$FRB),
482 "qvfcmpeq $FRT, $FRA, $FRB", IIC_FPCompare,
484 (setcc v4f64:$FRA, v4f64:$FRB, SETOEQ))]>;
485 let isCodeGenOnly = 1 in
486 def QVFCMPEQbs : XForm_18<4, 0, (outs qbrc:$FRT), (ins qsrc:$FRA, qsrc:$FRB),
487 "qvfcmpeq $FRT, $FRA, $FRB", IIC_FPCompare,
489 (setcc v4f32:$FRA, v4f32:$FRB, SETOEQ))]>;
491 let isCodeGenOnly = 1 in
492 def QVFLOGICAL : XForm_20<4, 4,
493 (outs qfrc:$FRT), (ins qfrc:$FRA, qfrc:$FRB, u12imm:$tttt),
494 "qvflogical $FRT, $FRA, $FRB, $tttt", IIC_VecPerm, []>;
495 def QVFLOGICALb : XForm_20<4, 4,
496 (outs qbrc:$FRT), (ins qbrc:$FRA, qbrc:$FRB, u12imm:$tttt),
497 "qvflogical $FRT, $FRA, $FRB, $tttt", IIC_VecPerm, []>;
498 let isCodeGenOnly = 1 in
499 def QVFLOGICALs : XForm_20<4, 4,
500 (outs qbrc:$FRT), (ins qbrc:$FRA, qbrc:$FRB, u12imm:$tttt),
501 "qvflogical $FRT, $FRA, $FRB, $tttt", IIC_VecPerm, []>;
503 // Load indexed instructions
505 def QVLFDX : XForm_1<31, 583,
506 (outs qfrc:$FRT), (ins memrr:$src),
507 "qvlfdx $FRT, $src", IIC_LdStLFD,
508 [(set v4f64:$FRT, (load xoaddr:$src))]>;
509 let isCodeGenOnly = 1 in
510 def QVLFDXb : XForm_1<31, 583,
511 (outs qbrc:$FRT), (ins memrr:$src),
512 "qvlfdx $FRT, $src", IIC_LdStLFD, []>;
515 def QVLFDXA : XForm_1<31, 583,
516 (outs qfrc:$FRT), (ins memrr:$src),
517 "qvlfdxa $FRT, $src", IIC_LdStLFD, []>;
519 def QVLFDUX : XForm_1<31, 615,
520 (outs qfrc:$FRT, ptr_rc_nor0:$ea_result),
522 "qvlfdux $FRT, $src", IIC_LdStLFDU, []>,
523 RegConstraint<"$src.ptrreg = $ea_result">,
524 NoEncode<"$ea_result">;
526 def QVLFDUXA : XForm_1<31, 615,
527 (outs qfrc:$FRT), (ins memrr:$src),
528 "qvlfduxa $FRT, $src", IIC_LdStLFD, []>;
530 def QVLFSX : XForm_1<31, 519,
531 (outs qfrc:$FRT), (ins memrr:$src),
532 "qvlfsx $FRT, $src", IIC_LdStLFD,
533 [(set v4f64:$FRT, (extloadv4f32 xoaddr:$src))]>;
535 let isCodeGenOnly = 1 in
536 def QVLFSXb : XForm_1<31, 519,
537 (outs qbrc:$FRT), (ins memrr:$src),
538 "qvlfsx $FRT, $src", IIC_LdStLFD,
539 [(set v4i1:$FRT, (PPCqvlfsb xoaddr:$src))]>;
540 let isCodeGenOnly = 1 in
541 def QVLFSXs : XForm_1<31, 519,
542 (outs qsrc:$FRT), (ins memrr:$src),
543 "qvlfsx $FRT, $src", IIC_LdStLFD,
544 [(set v4f32:$FRT, (load xoaddr:$src))]>;
547 def QVLFSXA : XForm_1<31, 519,
548 (outs qfrc:$FRT), (ins memrr:$src),
549 "qvlfsxa $FRT, $src", IIC_LdStLFD, []>;
551 def QVLFSUX : XForm_1<31, 551,
552 (outs qsrc:$FRT, ptr_rc_nor0:$ea_result),
554 "qvlfsux $FRT, $src", IIC_LdStLFDU, []>,
555 RegConstraint<"$src.ptrreg = $ea_result">,
556 NoEncode<"$ea_result">;
559 def QVLFSUXA : XForm_1<31, 551,
560 (outs qfrc:$FRT), (ins memrr:$src),
561 "qvlfsuxa $FRT, $src", IIC_LdStLFD, []>;
563 def QVLFCDX : XForm_1<31, 71,
564 (outs qfrc:$FRT), (ins memrr:$src),
565 "qvlfcdx $FRT, $src", IIC_LdStLFD, []>;
567 def QVLFCDXA : XForm_1<31, 71,
568 (outs qfrc:$FRT), (ins memrr:$src),
569 "qvlfcdxa $FRT, $src", IIC_LdStLFD, []>;
571 def QVLFCDUX : XForm_1<31, 103,
572 (outs qfrc:$FRT), (ins memrr:$src),
573 "qvlfcdux $FRT, $src", IIC_LdStLFD, []>;
575 def QVLFCDUXA : XForm_1<31, 103,
576 (outs qfrc:$FRT), (ins memrr:$src),
577 "qvlfcduxa $FRT, $src", IIC_LdStLFD, []>;
579 def QVLFCSX : XForm_1<31, 7,
580 (outs qfrc:$FRT), (ins memrr:$src),
581 "qvlfcsx $FRT, $src", IIC_LdStLFD, []>;
582 let isCodeGenOnly = 1 in
583 def QVLFCSXs : XForm_1<31, 7,
584 (outs qsrc:$FRT), (ins memrr:$src),
585 "qvlfcsx $FRT, $src", IIC_LdStLFD, []>;
588 def QVLFCSXA : XForm_1<31, 7,
589 (outs qfrc:$FRT), (ins memrr:$src),
590 "qvlfcsxa $FRT, $src", IIC_LdStLFD, []>;
592 def QVLFCSUX : XForm_1<31, 39,
593 (outs qfrc:$FRT), (ins memrr:$src),
594 "qvlfcsux $FRT, $src", IIC_LdStLFD, []>;
596 def QVLFCSUXA : XForm_1<31, 39,
597 (outs qfrc:$FRT), (ins memrr:$src),
598 "qvlfcsuxa $FRT, $src", IIC_LdStLFD, []>;
600 def QVLFIWAX : XForm_1<31, 871,
601 (outs qfrc:$FRT), (ins memrr:$src),
602 "qvlfiwax $FRT, $src", IIC_LdStLFD, []>;
604 def QVLFIWAXA : XForm_1<31, 871,
605 (outs qfrc:$FRT), (ins memrr:$src),
606 "qvlfiwaxa $FRT, $src", IIC_LdStLFD, []>;
608 def QVLFIWZX : XForm_1<31, 839,
609 (outs qfrc:$FRT), (ins memrr:$src),
610 "qvlfiwzx $FRT, $src", IIC_LdStLFD, []>;
612 def QVLFIWZXA : XForm_1<31, 839,
613 (outs qfrc:$FRT), (ins memrr:$src),
614 "qvlfiwzxa $FRT, $src", IIC_LdStLFD, []>;
618 def QVLPCLDX : XForm_1<31, 582,
619 (outs qfrc:$FRT), (ins memrr:$src),
620 "qvlpcldx $FRT, $src", IIC_LdStLFD, []>;
621 def QVLPCLSX : XForm_1<31, 518,
622 (outs qfrc:$FRT), (ins memrr:$src),
623 "qvlpclsx $FRT, $src", IIC_LdStLFD, []>;
624 let isCodeGenOnly = 1 in
625 def QVLPCLSXint : XForm_11<31, 518,
626 (outs qfrc:$FRT), (ins G8RC:$src),
627 "qvlpclsx $FRT, 0, $src", IIC_LdStLFD, []>;
628 def QVLPCRDX : XForm_1<31, 70,
629 (outs qfrc:$FRT), (ins memrr:$src),
630 "qvlpcrdx $FRT, $src", IIC_LdStLFD, []>;
631 def QVLPCRSX : XForm_1<31, 6,
632 (outs qfrc:$FRT), (ins memrr:$src),
633 "qvlpcrsx $FRT, $src", IIC_LdStLFD, []>;
635 // Store indexed instructions
636 let mayStore = 1 in {
637 def QVSTFDX : XForm_8<31, 711,
638 (outs), (ins qfrc:$FRT, memrr:$dst),
639 "qvstfdx $FRT, $dst", IIC_LdStSTFD,
640 [(store qfrc:$FRT, xoaddr:$dst)]>;
641 let isCodeGenOnly = 1 in
642 def QVSTFDXb : XForm_8<31, 711,
643 (outs), (ins qbrc:$FRT, memrr:$dst),
644 "qvstfdx $FRT, $dst", IIC_LdStSTFD, []>;
647 def QVSTFDXA : XForm_8<31, 711,
648 (outs), (ins qfrc:$FRT, memrr:$dst),
649 "qvstfdxa $FRT, $dst", IIC_LdStSTFD, []>;
651 def QVSTFDUX : XForm_8<31, 743, (outs ptr_rc_nor0:$ea_res),
652 (ins qfrc:$FRT, memrr:$dst),
653 "qvstfdux $FRT, $dst", IIC_LdStSTFDU, []>,
654 RegConstraint<"$dst.ptrreg = $ea_res">,
658 def QVSTFDUXA : XForm_8<31, 743,
659 (outs), (ins qfrc:$FRT, memrr:$dst),
660 "qvstfduxa $FRT, $dst", IIC_LdStSTFD, []>;
662 def QVSTFDXI : XForm_8<31, 709,
663 (outs), (ins qfrc:$FRT, memrr:$dst),
664 "qvstfdxi $FRT, $dst", IIC_LdStSTFD, []>;
666 def QVSTFDXIA : XForm_8<31, 709,
667 (outs), (ins qfrc:$FRT, memrr:$dst),
668 "qvstfdxia $FRT, $dst", IIC_LdStSTFD, []>;
670 def QVSTFDUXI : XForm_8<31, 741,
671 (outs), (ins qfrc:$FRT, memrr:$dst),
672 "qvstfduxi $FRT, $dst", IIC_LdStSTFD, []>;
674 def QVSTFDUXIA : XForm_8<31, 741,
675 (outs), (ins qfrc:$FRT, memrr:$dst),
676 "qvstfduxia $FRT, $dst", IIC_LdStSTFD, []>;
678 def QVSTFSX : XForm_8<31, 647,
679 (outs), (ins qfrc:$FRT, memrr:$dst),
680 "qvstfsx $FRT, $dst", IIC_LdStSTFD,
681 [(truncstorev4f32 qfrc:$FRT, xoaddr:$dst)]>;
682 let isCodeGenOnly = 1 in
683 def QVSTFSXs : XForm_8<31, 647,
684 (outs), (ins qsrc:$FRT, memrr:$dst),
685 "qvstfsx $FRT, $dst", IIC_LdStSTFD,
686 [(store qsrc:$FRT, xoaddr:$dst)]>;
689 def QVSTFSXA : XForm_8<31, 647,
690 (outs), (ins qfrc:$FRT, memrr:$dst),
691 "qvstfsxa $FRT, $dst", IIC_LdStSTFD, []>;
693 def QVSTFSUX : XForm_8<31, 679, (outs ptr_rc_nor0:$ea_res),
694 (ins qsrc:$FRT, memrr:$dst),
695 "qvstfsux $FRT, $dst", IIC_LdStSTFDU, []>,
696 RegConstraint<"$dst.ptrreg = $ea_res">,
698 let isCodeGenOnly = 1 in
699 def QVSTFSUXs: XForm_8<31, 679, (outs ptr_rc_nor0:$ea_res),
700 (ins qfrc:$FRT, memrr:$dst),
701 "qvstfsux $FRT, $dst", IIC_LdStSTFDU, []>,
702 RegConstraint<"$dst.ptrreg = $ea_res">,
706 def QVSTFSUXA : XForm_8<31, 679,
707 (outs), (ins qfrc:$FRT, memrr:$dst),
708 "qvstfsuxa $FRT, $dst", IIC_LdStSTFD, []>;
710 def QVSTFSXI : XForm_8<31, 645,
711 (outs), (ins qfrc:$FRT, memrr:$dst),
712 "qvstfsxi $FRT, $dst", IIC_LdStSTFD, []>;
714 def QVSTFSXIA : XForm_8<31, 645,
715 (outs), (ins qfrc:$FRT, memrr:$dst),
716 "qvstfsxia $FRT, $dst", IIC_LdStSTFD, []>;
718 def QVSTFSUXI : XForm_8<31, 677,
719 (outs), (ins qfrc:$FRT, memrr:$dst),
720 "qvstfsuxi $FRT, $dst", IIC_LdStSTFD, []>;
722 def QVSTFSUXIA : XForm_8<31, 677,
723 (outs), (ins qfrc:$FRT, memrr:$dst),
724 "qvstfsuxia $FRT, $dst", IIC_LdStSTFD, []>;
726 def QVSTFCDX : XForm_8<31, 199,
727 (outs), (ins qfrc:$FRT, memrr:$dst),
728 "qvstfcdx $FRT, $dst", IIC_LdStSTFD, []>;
730 def QVSTFCDXA : XForm_8<31, 199,
731 (outs), (ins qfrc:$FRT, memrr:$dst),
732 "qvstfcdxa $FRT, $dst", IIC_LdStSTFD, []>;
734 def QVSTFCSX : XForm_8<31, 135,
735 (outs), (ins qfrc:$FRT, memrr:$dst),
736 "qvstfcsx $FRT, $dst", IIC_LdStSTFD, []>;
737 let isCodeGenOnly = 1 in
738 def QVSTFCSXs : XForm_8<31, 135,
739 (outs), (ins qsrc:$FRT, memrr:$dst),
740 "qvstfcsx $FRT, $dst", IIC_LdStSTFD, []>;
743 def QVSTFCSXA : XForm_8<31, 135,
744 (outs), (ins qfrc:$FRT, memrr:$dst),
745 "qvstfcsxa $FRT, $dst", IIC_LdStSTFD, []>;
747 def QVSTFCDUX : XForm_8<31, 231,
748 (outs), (ins qfrc:$FRT, memrr:$dst),
749 "qvstfcdux $FRT, $dst", IIC_LdStSTFD, []>;
751 def QVSTFCDUXA : XForm_8<31, 231,
752 (outs), (ins qfrc:$FRT, memrr:$dst),
753 "qvstfcduxa $FRT, $dst", IIC_LdStSTFD, []>;
755 def QVSTFCSUX : XForm_8<31, 167,
756 (outs), (ins qfrc:$FRT, memrr:$dst),
757 "qvstfcsux $FRT, $dst", IIC_LdStSTFD, []>;
759 def QVSTFCSUXA : XForm_8<31, 167,
760 (outs), (ins qfrc:$FRT, memrr:$dst),
761 "qvstfcsuxa $FRT, $dst", IIC_LdStSTFD, []>;
763 def QVSTFCDXI : XForm_8<31, 197,
764 (outs), (ins qfrc:$FRT, memrr:$dst),
765 "qvstfcdxi $FRT, $dst", IIC_LdStSTFD, []>;
767 def QVSTFCDXIA : XForm_8<31, 197,
768 (outs), (ins qfrc:$FRT, memrr:$dst),
769 "qvstfcdxia $FRT, $dst", IIC_LdStSTFD, []>;
771 def QVSTFCSXI : XForm_8<31, 133,
772 (outs), (ins qfrc:$FRT, memrr:$dst),
773 "qvstfcsxi $FRT, $dst", IIC_LdStSTFD, []>;
775 def QVSTFCSXIA : XForm_8<31, 133,
776 (outs), (ins qfrc:$FRT, memrr:$dst),
777 "qvstfcsxia $FRT, $dst", IIC_LdStSTFD, []>;
779 def QVSTFCDUXI : XForm_8<31, 229,
780 (outs), (ins qfrc:$FRT, memrr:$dst),
781 "qvstfcduxi $FRT, $dst", IIC_LdStSTFD, []>;
783 def QVSTFCDUXIA : XForm_8<31, 229,
784 (outs), (ins qfrc:$FRT, memrr:$dst),
785 "qvstfcduxia $FRT, $dst", IIC_LdStSTFD, []>;
787 def QVSTFCSUXI : XForm_8<31, 165,
788 (outs), (ins qfrc:$FRT, memrr:$dst),
789 "qvstfcsuxi $FRT, $dst", IIC_LdStSTFD, []>;
791 def QVSTFCSUXIA : XForm_8<31, 165,
792 (outs), (ins qfrc:$FRT, memrr:$dst),
793 "qvstfcsuxia $FRT, $dst", IIC_LdStSTFD, []>;
795 def QVSTFIWX : XForm_8<31, 967,
796 (outs), (ins qfrc:$FRT, memrr:$dst),
797 "qvstfiwx $FRT, $dst", IIC_LdStSTFD, []>;
799 def QVSTFIWXA : XForm_8<31, 967,
800 (outs), (ins qfrc:$FRT, memrr:$dst),
801 "qvstfiwxa $FRT, $dst", IIC_LdStSTFD, []>;
805 } // neverHasSideEffects
808 def : InstAlias<"qvfclr $FRT",
809 (QVFLOGICALb qbrc:$FRT, qbrc:$FRT, qbrc:$FRT, 0)>;
810 def : InstAlias<"qvfand $FRT, $FRA, $FRB",
811 (QVFLOGICALb qbrc:$FRT, qbrc:$FRA, qbrc:$FRB, 1)>;
812 def : InstAlias<"qvfandc $FRT, $FRA, $FRB",
813 (QVFLOGICALb qbrc:$FRT, qbrc:$FRA, qbrc:$FRB, 4)>;
814 def : InstAlias<"qvfctfb $FRT, $FRA",
815 (QVFLOGICALb qbrc:$FRT, qbrc:$FRA, qbrc:$FRA, 5)>;
816 def : InstAlias<"qvfxor $FRT, $FRA, $FRB",
817 (QVFLOGICALb qbrc:$FRT, qbrc:$FRA, qbrc:$FRB, 6)>;
818 def : InstAlias<"qvfor $FRT, $FRA, $FRB",
819 (QVFLOGICALb qbrc:$FRT, qbrc:$FRA, qbrc:$FRB, 7)>;
820 def : InstAlias<"qvfnor $FRT, $FRA, $FRB",
821 (QVFLOGICALb qbrc:$FRT, qbrc:$FRA, qbrc:$FRB, 8)>;
822 def : InstAlias<"qvfequ $FRT, $FRA, $FRB",
823 (QVFLOGICALb qbrc:$FRT, qbrc:$FRA, qbrc:$FRB, 9)>;
824 def : InstAlias<"qvfnot $FRT, $FRA",
825 (QVFLOGICALb qbrc:$FRT, qbrc:$FRA, qbrc:$FRA, 10)>;
826 def : InstAlias<"qvforc $FRT, $FRA, $FRB",
827 (QVFLOGICALb qbrc:$FRT, qbrc:$FRA, qbrc:$FRB, 13)>;
828 def : InstAlias<"qvfnand $FRT, $FRA, $FRB",
829 (QVFLOGICALb qbrc:$FRT, qbrc:$FRA, qbrc:$FRB, 14)>;
830 def : InstAlias<"qvfset $FRT",
831 (QVFLOGICALb qbrc:$FRT, qbrc:$FRT, qbrc:$FRT, 15)>;
833 //===----------------------------------------------------------------------===//
834 // Additional QPX Patterns
837 def : Pat<(v4f64 (scalar_to_vector f64:$A)),
838 (INSERT_SUBREG (v4f64 (IMPLICIT_DEF)), $A, sub_64)>;
839 def : Pat<(v4f32 (scalar_to_vector f32:$A)),
840 (INSERT_SUBREG (v4f32 (IMPLICIT_DEF)), $A, sub_64)>;
842 def : Pat<(f64 (vector_extract v4f64:$S, 0)),
843 (EXTRACT_SUBREG $S, sub_64)>;
844 def : Pat<(f32 (vector_extract v4f32:$S, 0)),
845 (EXTRACT_SUBREG $S, sub_64)>;
847 def : Pat<(f64 (vector_extract v4f64:$S, 1)),
848 (EXTRACT_SUBREG (QVESPLATI $S, 1), sub_64)>;
849 def : Pat<(f64 (vector_extract v4f64:$S, 2)),
850 (EXTRACT_SUBREG (QVESPLATI $S, 2), sub_64)>;
851 def : Pat<(f64 (vector_extract v4f64:$S, 3)),
852 (EXTRACT_SUBREG (QVESPLATI $S, 3), sub_64)>;
854 def : Pat<(f32 (vector_extract v4f32:$S, 1)),
855 (EXTRACT_SUBREG (QVESPLATIs $S, 1), sub_64)>;
856 def : Pat<(f32 (vector_extract v4f32:$S, 2)),
857 (EXTRACT_SUBREG (QVESPLATIs $S, 2), sub_64)>;
858 def : Pat<(f32 (vector_extract v4f32:$S, 3)),
859 (EXTRACT_SUBREG (QVESPLATIs $S, 3), sub_64)>;
861 def : Pat<(f64 (vector_extract v4f64:$S, i64:$F)),
862 (EXTRACT_SUBREG (QVFPERM $S, $S,
863 (QVLPCLSXint (RLDICR $F, 2,
866 def : Pat<(f32 (vector_extract v4f32:$S, i64:$F)),
867 (EXTRACT_SUBREG (QVFPERMs $S, $S,
868 (QVLPCLSXint (RLDICR $F, 2,
872 def : Pat<(int_ppc_qpx_qvfperm v4f64:$A, v4f64:$B, v4f64:$C),
873 (QVFPERM $A, $B, $C)>;
875 def : Pat<(int_ppc_qpx_qvfcpsgn v4f64:$A, v4f64:$B),
878 // FCOPYSIGN's operand types need not agree.
879 def : Pat<(fcopysign v4f64:$frB, v4f32:$frA),
880 (QVFCPSGN (COPY_TO_REGCLASS $frA, QFRC), $frB)>;
881 def : Pat<(fcopysign QSRC:$frB, QFRC:$frA),
882 (QVFCPSGNs (COPY_TO_REGCLASS $frA, QSRC), $frB)>;
884 def : Pat<(int_ppc_qpx_qvfneg v4f64:$A), (QVFNEG $A)>;
885 def : Pat<(int_ppc_qpx_qvfabs v4f64:$A), (QVFABS $A)>;
886 def : Pat<(int_ppc_qpx_qvfnabs v4f64:$A), (QVFNABS $A)>;
888 def : Pat<(int_ppc_qpx_qvfriz v4f64:$A), (QVFRIZ $A)>;
889 def : Pat<(int_ppc_qpx_qvfrin v4f64:$A), (QVFRIN $A)>;
890 def : Pat<(int_ppc_qpx_qvfrip v4f64:$A), (QVFRIP $A)>;
891 def : Pat<(int_ppc_qpx_qvfrim v4f64:$A), (QVFRIM $A)>;
893 def : Pat<(int_ppc_qpx_qvfre v4f64:$A), (QVFRE $A)>;
894 def : Pat<(int_ppc_qpx_qvfrsqrte v4f64:$A), (QVFRSQRTE $A)>;
896 def : Pat<(int_ppc_qpx_qvfadd v4f64:$A, v4f64:$B),
898 def : Pat<(int_ppc_qpx_qvfsub v4f64:$A, v4f64:$B),
900 def : Pat<(int_ppc_qpx_qvfmul v4f64:$A, v4f64:$B),
903 // Additional QVFNMSUB patterns: -a*c + b == -(a*c - b)
904 def : Pat<(fma (fneg v4f64:$A), v4f64:$C, v4f64:$B),
905 (QVFNMSUB $A, $B, $C)>;
906 def : Pat<(fma v4f64:$A, (fneg v4f64:$C), v4f64:$B),
907 (QVFNMSUB $A, $B, $C)>;
908 def : Pat<(fma (fneg v4f32:$A), v4f32:$C, v4f32:$B),
909 (QVFNMSUBSs $A, $B, $C)>;
910 def : Pat<(fma v4f32:$A, (fneg v4f32:$C), v4f32:$B),
911 (QVFNMSUBSs $A, $B, $C)>;
913 def : Pat<(int_ppc_qpx_qvfmadd v4f64:$A, v4f64:$B, v4f64:$C),
914 (QVFMADD $A, $B, $C)>;
915 def : Pat<(int_ppc_qpx_qvfnmadd v4f64:$A, v4f64:$B, v4f64:$C),
916 (QVFNMADD $A, $B, $C)>;
917 def : Pat<(int_ppc_qpx_qvfmsub v4f64:$A, v4f64:$B, v4f64:$C),
918 (QVFMSUB $A, $B, $C)>;
919 def : Pat<(int_ppc_qpx_qvfnmsub v4f64:$A, v4f64:$B, v4f64:$C),
920 (QVFNMSUB $A, $B, $C)>;
922 def : Pat<(int_ppc_qpx_qvlfd xoaddr:$src),
923 (QVLFDX xoaddr:$src)>;
924 def : Pat<(int_ppc_qpx_qvlfda xoaddr:$src),
925 (QVLFDXA xoaddr:$src)>;
926 def : Pat<(int_ppc_qpx_qvlfs xoaddr:$src),
927 (QVLFSX xoaddr:$src)>;
928 def : Pat<(int_ppc_qpx_qvlfsa xoaddr:$src),
929 (QVLFSXA xoaddr:$src)>;
930 def : Pat<(int_ppc_qpx_qvlfcda xoaddr:$src),
931 (QVLFCDXA xoaddr:$src)>;
932 def : Pat<(int_ppc_qpx_qvlfcd xoaddr:$src),
933 (QVLFCDX xoaddr:$src)>;
934 def : Pat<(int_ppc_qpx_qvlfcsa xoaddr:$src),
935 (QVLFCSXA xoaddr:$src)>;
936 def : Pat<(int_ppc_qpx_qvlfcs xoaddr:$src),
937 (QVLFCSX xoaddr:$src)>;
938 def : Pat<(int_ppc_qpx_qvlfda xoaddr:$src),
939 (QVLFDXA xoaddr:$src)>;
940 def : Pat<(int_ppc_qpx_qvlfiwaa xoaddr:$src),
941 (QVLFIWAXA xoaddr:$src)>;
942 def : Pat<(int_ppc_qpx_qvlfiwa xoaddr:$src),
943 (QVLFIWAX xoaddr:$src)>;
944 def : Pat<(int_ppc_qpx_qvlfiwza xoaddr:$src),
945 (QVLFIWZXA xoaddr:$src)>;
946 def : Pat<(int_ppc_qpx_qvlfiwz xoaddr:$src),
947 (QVLFIWZX xoaddr:$src)>;
948 def : Pat<(int_ppc_qpx_qvlfsa xoaddr:$src),
949 (QVLFSXA xoaddr:$src)>;
950 def : Pat<(int_ppc_qpx_qvlpcld xoaddr:$src),
951 (QVLPCLDX xoaddr:$src)>;
952 def : Pat<(int_ppc_qpx_qvlpcls xoaddr:$src),
953 (QVLPCLSX xoaddr:$src)>;
954 def : Pat<(int_ppc_qpx_qvlpcrd xoaddr:$src),
955 (QVLPCRDX xoaddr:$src)>;
956 def : Pat<(int_ppc_qpx_qvlpcrs xoaddr:$src),
957 (QVLPCRSX xoaddr:$src)>;
959 def : Pat<(int_ppc_qpx_qvstfd v4f64:$T, xoaddr:$dst),
960 (QVSTFDX $T, xoaddr:$dst)>;
961 def : Pat<(int_ppc_qpx_qvstfs v4f64:$T, xoaddr:$dst),
962 (QVSTFSX $T, xoaddr:$dst)>;
963 def : Pat<(int_ppc_qpx_qvstfcda v4f64:$T, xoaddr:$dst),
964 (QVSTFCDXA $T, xoaddr:$dst)>;
965 def : Pat<(int_ppc_qpx_qvstfcd v4f64:$T, xoaddr:$dst),
966 (QVSTFCDX $T, xoaddr:$dst)>;
967 def : Pat<(int_ppc_qpx_qvstfcsa v4f64:$T, xoaddr:$dst),
968 (QVSTFCSXA $T, xoaddr:$dst)>;
969 def : Pat<(int_ppc_qpx_qvstfcs v4f64:$T, xoaddr:$dst),
970 (QVSTFCSX $T, xoaddr:$dst)>;
971 def : Pat<(int_ppc_qpx_qvstfda v4f64:$T, xoaddr:$dst),
972 (QVSTFDXA $T, xoaddr:$dst)>;
973 def : Pat<(int_ppc_qpx_qvstfiwa v4f64:$T, xoaddr:$dst),
974 (QVSTFIWXA $T, xoaddr:$dst)>;
975 def : Pat<(int_ppc_qpx_qvstfiw v4f64:$T, xoaddr:$dst),
976 (QVSTFIWX $T, xoaddr:$dst)>;
977 def : Pat<(int_ppc_qpx_qvstfsa v4f64:$T, xoaddr:$dst),
978 (QVSTFSXA $T, xoaddr:$dst)>;
980 def : Pat<(pre_store v4f64:$rS, iPTR:$ptrreg, iPTR:$ptroff),
981 (QVSTFDUX $rS, $ptrreg, $ptroff)>;
982 def : Pat<(pre_store v4f32:$rS, iPTR:$ptrreg, iPTR:$ptroff),
983 (QVSTFSUX $rS, $ptrreg, $ptroff)>;
984 def : Pat<(pre_truncstv4f32 v4f64:$rS, iPTR:$ptrreg, iPTR:$ptroff),
985 (QVSTFSUXs $rS, $ptrreg, $ptroff)>;
987 def : Pat<(int_ppc_qpx_qvflogical v4f64:$A, v4f64:$B, (i32 imm:$idx)),
988 (QVFLOGICAL $A, $B, imm:$idx)>;
989 def : Pat<(int_ppc_qpx_qvgpci (u12:$idx)),
992 def : Pat<(setcc v4f64:$FRA, v4f64:$FRB, SETOGE),
993 (QVFLOGICALb (QVFCMPLTb $FRA, $FRB),
994 (QVFTSTNANb $FRA, $FRB), (i32 8))>;
995 def : Pat<(setcc v4f64:$FRA, v4f64:$FRB, SETOLE),
996 (QVFLOGICALb (QVFCMPGTb $FRA, $FRB),
997 (QVFTSTNANb $FRA, $FRB), (i32 8))>;
998 def : Pat<(setcc v4f64:$FRA, v4f64:$FRB, SETONE),
999 (QVFLOGICALb (QVFCMPEQb $FRA, $FRB),
1000 (QVFTSTNANb $FRA, $FRB), (i32 8))>;
1001 def : Pat<(setcc v4f64:$FRA, v4f64:$FRB, SETO),
1002 (QVFLOGICALb (QVFTSTNANb $FRA, $FRB),
1003 (QVFTSTNANb $FRA, $FRB), (i32 10))>;
1004 def : Pat<(setcc v4f64:$FRA, v4f64:$FRB, SETUEQ),
1005 (QVFLOGICALb (QVFCMPEQb $FRA, $FRB),
1006 (QVFTSTNANb $FRA, $FRB), (i32 7))>;
1007 def : Pat<(setcc v4f64:$FRA, v4f64:$FRB, SETUGT),
1008 (QVFLOGICALb (QVFCMPGTb $FRA, $FRB),
1009 (QVFTSTNANb $FRA, $FRB), (i32 7))>;
1010 def : Pat<(setcc v4f64:$FRA, v4f64:$FRB, SETUGE),
1011 (QVFLOGICALb (QVFTSTNANb $FRA, $FRB),
1012 (QVFCMPLTb $FRA, $FRB), (i32 13))>;
1013 def : Pat<(setcc v4f64:$FRA, v4f64:$FRB, SETULT),
1014 (QVFLOGICALb (QVFCMPLTb $FRA, $FRB),
1015 (QVFTSTNANb $FRA, $FRB), (i32 7))>;
1016 def : Pat<(setcc v4f64:$FRA, v4f64:$FRB, SETULE),
1017 (QVFLOGICALb (QVFTSTNANb $FRA, $FRB),
1018 (QVFCMPGTb $FRA, $FRB), (i32 13))>;
1019 def : Pat<(setcc v4f64:$FRA, v4f64:$FRB, SETUNE),
1020 (QVFLOGICALb (QVFTSTNANb $FRA, $FRB),
1021 (QVFCMPEQb $FRA, $FRB), (i32 13))>;
1023 def : Pat<(setcc v4f64:$FRA, v4f64:$FRB, SETEQ),
1024 (QVFCMPEQb $FRA, $FRB)>;
1025 def : Pat<(setcc v4f64:$FRA, v4f64:$FRB, SETGT),
1026 (QVFCMPGTb $FRA, $FRB)>;
1027 def : Pat<(setcc v4f64:$FRA, v4f64:$FRB, SETGE),
1028 (QVFLOGICALb (QVFCMPLTb $FRA, $FRB),
1029 (QVFCMPLTb $FRA, $FRB), (i32 10))>;
1030 def : Pat<(setcc v4f64:$FRA, v4f64:$FRB, SETLT),
1031 (QVFCMPLTb $FRA, $FRB)>;
1032 def : Pat<(setcc v4f64:$FRA, v4f64:$FRB, SETLE),
1033 (QVFLOGICALb (QVFCMPGTb $FRA, $FRB),
1034 (QVFCMPGTb $FRA, $FRB), (i32 10))>;
1035 def : Pat<(setcc v4f64:$FRA, v4f64:$FRB, SETNE),
1036 (QVFLOGICALb (QVFCMPEQb $FRA, $FRB),
1037 (QVFCMPEQb $FRA, $FRB), (i32 10))>;
1039 def : Pat<(setcc v4f32:$FRA, v4f32:$FRB, SETOGE),
1040 (QVFLOGICALb (QVFCMPLTbs $FRA, $FRB),
1041 (QVFTSTNANbs $FRA, $FRB), (i32 8))>;
1042 def : Pat<(setcc v4f32:$FRA, v4f32:$FRB, SETOLE),
1043 (QVFLOGICALb (QVFCMPGTbs $FRA, $FRB),
1044 (QVFTSTNANbs $FRA, $FRB), (i32 8))>;
1045 def : Pat<(setcc v4f32:$FRA, v4f32:$FRB, SETONE),
1046 (QVFLOGICALb (QVFCMPEQbs $FRA, $FRB),
1047 (QVFTSTNANbs $FRA, $FRB), (i32 8))>;
1048 def : Pat<(setcc v4f32:$FRA, v4f32:$FRB, SETO),
1049 (QVFLOGICALb (QVFTSTNANbs $FRA, $FRB),
1050 (QVFTSTNANbs $FRA, $FRB), (i32 10))>;
1051 def : Pat<(setcc v4f32:$FRA, v4f32:$FRB, SETUEQ),
1052 (QVFLOGICALb (QVFCMPEQbs $FRA, $FRB),
1053 (QVFTSTNANbs $FRA, $FRB), (i32 7))>;
1054 def : Pat<(setcc v4f32:$FRA, v4f32:$FRB, SETUGT),
1055 (QVFLOGICALb (QVFCMPGTbs $FRA, $FRB),
1056 (QVFTSTNANbs $FRA, $FRB), (i32 7))>;
1057 def : Pat<(setcc v4f32:$FRA, v4f32:$FRB, SETUGE),
1058 (QVFLOGICALb (QVFTSTNANbs $FRA, $FRB),
1059 (QVFCMPLTbs $FRA, $FRB), (i32 13))>;
1060 def : Pat<(setcc v4f32:$FRA, v4f32:$FRB, SETULT),
1061 (QVFLOGICALb (QVFCMPLTbs $FRA, $FRB),
1062 (QVFTSTNANbs $FRA, $FRB), (i32 7))>;
1063 def : Pat<(setcc v4f32:$FRA, v4f32:$FRB, SETULE),
1064 (QVFLOGICALb (QVFTSTNANbs $FRA, $FRB),
1065 (QVFCMPGTbs $FRA, $FRB), (i32 13))>;
1066 def : Pat<(setcc v4f32:$FRA, v4f32:$FRB, SETUNE),
1067 (QVFLOGICALb (QVFTSTNANbs $FRA, $FRB),
1068 (QVFCMPEQbs $FRA, $FRB), (i32 13))>;
1070 def : Pat<(setcc v4f32:$FRA, v4f32:$FRB, SETEQ),
1071 (QVFCMPEQbs $FRA, $FRB)>;
1072 def : Pat<(setcc v4f32:$FRA, v4f32:$FRB, SETGT),
1073 (QVFCMPGTbs $FRA, $FRB)>;
1074 def : Pat<(setcc v4f32:$FRA, v4f32:$FRB, SETGE),
1075 (QVFLOGICALb (QVFCMPLTbs $FRA, $FRB),
1076 (QVFCMPLTbs $FRA, $FRB), (i32 10))>;
1077 def : Pat<(setcc v4f32:$FRA, v4f32:$FRB, SETLT),
1078 (QVFCMPLTbs $FRA, $FRB)>;
1079 def : Pat<(setcc v4f32:$FRA, v4f32:$FRB, SETLE),
1080 (QVFLOGICALb (QVFCMPGTbs $FRA, $FRB),
1081 (QVFCMPGTbs $FRA, $FRB), (i32 10))>;
1082 def : Pat<(setcc v4f32:$FRA, v4f32:$FRB, SETNE),
1083 (QVFLOGICALb (QVFCMPEQbs $FRA, $FRB),
1084 (QVFCMPEQbs $FRA, $FRB), (i32 10))>;
1086 def : Pat<(and v4i1:$FRA, (not v4i1:$FRB)),
1087 (QVFLOGICALb $FRA, $FRB, (i32 4))>;
1088 def : Pat<(not (or v4i1:$FRA, v4i1:$FRB)),
1089 (QVFLOGICALb $FRA, $FRB, (i32 8))>;
1090 def : Pat<(not (xor v4i1:$FRA, v4i1:$FRB)),
1091 (QVFLOGICALb $FRA, $FRB, (i32 9))>;
1092 def : Pat<(or v4i1:$FRA, (not v4i1:$FRB)),
1093 (QVFLOGICALb $FRA, $FRB, (i32 13))>;
1094 def : Pat<(not (and v4i1:$FRA, v4i1:$FRB)),
1095 (QVFLOGICALb $FRA, $FRB, (i32 14))>;
1097 def : Pat<(and v4i1:$FRA, v4i1:$FRB),
1098 (QVFLOGICALb $FRA, $FRB, (i32 1))>;
1099 def : Pat<(or v4i1:$FRA, v4i1:$FRB),
1100 (QVFLOGICALb $FRA, $FRB, (i32 7))>;
1101 def : Pat<(xor v4i1:$FRA, v4i1:$FRB),
1102 (QVFLOGICALb $FRA, $FRB, (i32 6))>;
1103 def : Pat<(not v4i1:$FRA),
1104 (QVFLOGICALb $FRA, $FRA, (i32 10))>;
1106 def : Pat<(v4f64 (fextend v4f32:$src)),
1107 (COPY_TO_REGCLASS $src, QFRC)>;
1109 def : Pat<(v4f32 (fround_exact v4f64:$src)),
1110 (COPY_TO_REGCLASS $src, QSRC)>;
1112 // Extract the underlying floating-point values from the
1113 // QPX (-1.0, 1.0) boolean representation.
1114 def : Pat<(v4f64 (PPCqbflt v4i1:$src)),
1115 (COPY_TO_REGCLASS $src, QFRC)>;
1117 def : Pat<(v4f64 (selectcc i1:$lhs, i1:$rhs, v4f64:$tval, v4f64:$fval, SETLT)),
1118 (SELECT_QFRC (CRANDC $rhs, $lhs), $tval, $fval)>;
1119 def : Pat<(v4f64 (selectcc i1:$lhs, i1:$rhs, v4f64:$tval, v4f64:$fval, SETLE)),
1120 (SELECT_QFRC (CRORC $rhs, $lhs), $tval, $fval)>;
1121 def : Pat<(v4f64 (selectcc i1:$lhs, i1:$rhs, v4f64:$tval, v4f64:$fval, SETEQ)),
1122 (SELECT_QFRC (CREQV $lhs, $rhs), $tval, $fval)>;
1123 def : Pat<(v4f64 (selectcc i1:$lhs, i1:$rhs, v4f64:$tval, v4f64:$fval, SETGE)),
1124 (SELECT_QFRC (CRORC $lhs, $rhs), $tval, $fval)>;
1125 def : Pat<(v4f64 (selectcc i1:$lhs, i1:$rhs, v4f64:$tval, v4f64:$fval, SETGT)),
1126 (SELECT_QFRC (CRANDC $lhs, $rhs), $tval, $fval)>;
1127 def : Pat<(v4f64 (selectcc i1:$lhs, i1:$rhs, v4f64:$tval, v4f64:$fval, SETNE)),
1128 (SELECT_QFRC (CRXOR $lhs, $rhs), $tval, $fval)>;
1130 def : Pat<(v4f32 (selectcc i1:$lhs, i1:$rhs, v4f32:$tval, v4f32:$fval, SETLT)),
1131 (SELECT_QSRC (CRANDC $rhs, $lhs), $tval, $fval)>;
1132 def : Pat<(v4f32 (selectcc i1:$lhs, i1:$rhs, v4f32:$tval, v4f32:$fval, SETLE)),
1133 (SELECT_QSRC (CRORC $rhs, $lhs), $tval, $fval)>;
1134 def : Pat<(v4f32 (selectcc i1:$lhs, i1:$rhs, v4f32:$tval, v4f32:$fval, SETEQ)),
1135 (SELECT_QSRC (CREQV $lhs, $rhs), $tval, $fval)>;
1136 def : Pat<(v4f32 (selectcc i1:$lhs, i1:$rhs, v4f32:$tval, v4f32:$fval, SETGE)),
1137 (SELECT_QSRC (CRORC $lhs, $rhs), $tval, $fval)>;
1138 def : Pat<(v4f32 (selectcc i1:$lhs, i1:$rhs, v4f32:$tval, v4f32:$fval, SETGT)),
1139 (SELECT_QSRC (CRANDC $lhs, $rhs), $tval, $fval)>;
1140 def : Pat<(v4f32 (selectcc i1:$lhs, i1:$rhs, v4f32:$tval, v4f32:$fval, SETNE)),
1141 (SELECT_QSRC (CRXOR $lhs, $rhs), $tval, $fval)>;
1143 def : Pat<(v4i1 (selectcc i1:$lhs, i1:$rhs, v4i1:$tval, v4i1:$fval, SETLT)),
1144 (SELECT_QBRC (CRANDC $rhs, $lhs), $tval, $fval)>;
1145 def : Pat<(v4i1 (selectcc i1:$lhs, i1:$rhs, v4i1:$tval, v4i1:$fval, SETLE)),
1146 (SELECT_QBRC (CRORC $rhs, $lhs), $tval, $fval)>;
1147 def : Pat<(v4i1 (selectcc i1:$lhs, i1:$rhs, v4i1:$tval, v4i1:$fval, SETEQ)),
1148 (SELECT_QBRC (CREQV $lhs, $rhs), $tval, $fval)>;
1149 def : Pat<(v4i1 (selectcc i1:$lhs, i1:$rhs, v4i1:$tval, v4i1:$fval, SETGE)),
1150 (SELECT_QBRC (CRORC $lhs, $rhs), $tval, $fval)>;
1151 def : Pat<(v4i1 (selectcc i1:$lhs, i1:$rhs, v4i1:$tval, v4i1:$fval, SETGT)),
1152 (SELECT_QBRC (CRANDC $lhs, $rhs), $tval, $fval)>;
1153 def : Pat<(v4i1 (selectcc i1:$lhs, i1:$rhs, v4i1:$tval, v4i1:$fval, SETNE)),
1154 (SELECT_QBRC (CRXOR $lhs, $rhs), $tval, $fval)>;
1158 let Predicates = [HasQPX, NoNaNsFPMath] in {
1159 def : Pat<(fminnum v4f64:$FRA, v4f64:$FRB),
1160 (QVFSELb (QVFCMPLTb $FRA, $FRB), $FRB, $FRA)>;
1161 def : Pat<(fmaxnum v4f64:$FRA, v4f64:$FRB),
1162 (QVFSELb (QVFCMPGTb $FRA, $FRB), $FRB, $FRA)>;
1164 def : Pat<(fminnum v4f32:$FRA, v4f32:$FRB),
1165 (QVFSELbs (QVFCMPLTbs $FRA, $FRB), $FRB, $FRA)>;
1166 def : Pat<(fmaxnum v4f32:$FRA, v4f32:$FRB),
1167 (QVFSELbs (QVFCMPGTbs $FRA, $FRB), $FRB, $FRA)>;
1170 let Predicates = [HasQPX, NaNsFPMath] in {
1171 // When either of these operands is NaN, we should return the other operand.
1172 // QVFCMPLT/QVFCMPGT return false is either operand is NaN, which means we need
1173 // to explicitly or with a NaN test on the second operand.
1174 def : Pat<(fminnum v4f64:$FRA, v4f64:$FRB),
1175 (QVFSELb (QVFLOGICALb (QVFCMPLTb $FRA, $FRB),
1176 (QVFTSTNANb $FRB, $FRB), (i32 7)),
1178 def : Pat<(fmaxnum v4f64:$FRA, v4f64:$FRB),
1179 (QVFSELb (QVFLOGICALb (QVFCMPGTb $FRA, $FRB),
1180 (QVFTSTNANb $FRB, $FRB), (i32 7)),
1183 def : Pat<(fminnum v4f32:$FRA, v4f32:$FRB),
1184 (QVFSELbs (QVFLOGICALb (QVFCMPLTbs $FRA, $FRB),
1185 (QVFTSTNANbs $FRB, $FRB), (i32 7)),
1187 def : Pat<(fmaxnum v4f32:$FRA, v4f32:$FRB),
1188 (QVFSELbs (QVFLOGICALb (QVFCMPGTbs $FRA, $FRB),
1189 (QVFTSTNANbs $FRB, $FRB), (i32 7)),