1 //===- PPCInstrVSX.td - The PowerPC VSX Extension --*- tablegen -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file describes the VSX extension to the PowerPC instruction set.
12 //===----------------------------------------------------------------------===//
14 def PPCRegVSRCAsmOperand : AsmOperandClass {
15 let Name = "RegVSRC"; let PredicateMethod = "isVSRegNumber";
17 def vsrc : RegisterOperand<VSRC> {
18 let ParserMatchClass = PPCRegVSRCAsmOperand;
21 def PPCRegVSFRCAsmOperand : AsmOperandClass {
22 let Name = "RegVSFRC"; let PredicateMethod = "isVSRegNumber";
24 def vsfrc : RegisterOperand<VSFRC> {
25 let ParserMatchClass = PPCRegVSFRCAsmOperand;
28 // Little-endian-specific nodes.
29 def SDT_PPClxvd2x : SDTypeProfile<1, 1, [
30 SDTCisVT<0, v2f64>, SDTCisPtrTy<1>
32 def SDT_PPCstxvd2x : SDTypeProfile<0, 2, [
33 SDTCisVT<0, v2f64>, SDTCisPtrTy<1>
35 def SDT_PPCxxswapd : SDTypeProfile<1, 1, [
39 def PPClxvd2x : SDNode<"PPCISD::LXVD2X", SDT_PPClxvd2x,
40 [SDNPHasChain, SDNPMayLoad]>;
41 def PPCstxvd2x : SDNode<"PPCISD::STXVD2X", SDT_PPCstxvd2x,
42 [SDNPHasChain, SDNPMayStore]>;
43 def PPCxxswapd : SDNode<"PPCISD::XXSWAPD", SDT_PPCxxswapd, [SDNPHasChain]>;
45 multiclass XX3Form_Rcr<bits<6> opcode, bits<7> xo, dag OOL, dag IOL,
46 string asmbase, string asmstr, InstrItinClass itin,
48 let BaseName = asmbase in {
49 def NAME : XX3Form_Rc<opcode, xo, OOL, IOL,
50 !strconcat(asmbase, !strconcat(" ", asmstr)), itin,
53 def o : XX3Form_Rc<opcode, xo, OOL, IOL,
54 !strconcat(asmbase, !strconcat(". ", asmstr)), itin,
59 def HasVSX : Predicate<"PPCSubTarget->hasVSX()">;
60 def IsLittleEndian : Predicate<"PPCSubTarget->isLittleEndian()">;
61 def IsBigEndian : Predicate<"!PPCSubTarget->isLittleEndian()">;
63 let Predicates = [HasVSX] in {
64 let AddedComplexity = 400 in { // Prefer VSX patterns over non-VSX patterns.
65 let hasSideEffects = 0 in { // VSX instructions don't have side effects.
68 // Load indexed instructions
69 let mayLoad = 1, canFoldAsLoad = 1 in {
70 def LXSDX : XX1Form<31, 588,
71 (outs vsfrc:$XT), (ins memrr:$src),
72 "lxsdx $XT, $src", IIC_LdStLFD,
73 [(set f64:$XT, (load xoaddr:$src))]>;
75 def LXVD2X : XX1Form<31, 844,
76 (outs vsrc:$XT), (ins memrr:$src),
77 "lxvd2x $XT, $src", IIC_LdStLFD,
78 [(set v2f64:$XT, (int_ppc_vsx_lxvd2x xoaddr:$src))]>;
80 def LXVDSX : XX1Form<31, 332,
81 (outs vsrc:$XT), (ins memrr:$src),
82 "lxvdsx $XT, $src", IIC_LdStLFD, []>;
84 def LXVW4X : XX1Form<31, 780,
85 (outs vsrc:$XT), (ins memrr:$src),
86 "lxvw4x $XT, $src", IIC_LdStLFD,
87 [(set v4i32:$XT, (int_ppc_vsx_lxvw4x xoaddr:$src))]>;
90 // Store indexed instructions
92 def STXSDX : XX1Form<31, 716,
93 (outs), (ins vsfrc:$XT, memrr:$dst),
94 "stxsdx $XT, $dst", IIC_LdStSTFD,
95 [(store f64:$XT, xoaddr:$dst)]>;
97 def STXVD2X : XX1Form<31, 972,
98 (outs), (ins vsrc:$XT, memrr:$dst),
99 "stxvd2x $XT, $dst", IIC_LdStSTFD,
100 [(store v2f64:$XT, xoaddr:$dst)]>;
102 def STXVW4X : XX1Form<31, 908,
103 (outs), (ins vsrc:$XT, memrr:$dst),
104 "stxvw4x $XT, $dst", IIC_LdStSTFD,
105 [(store v4i32:$XT, xoaddr:$dst)]>;
108 // Add/Mul Instructions
109 let isCommutable = 1 in {
110 def XSADDDP : XX3Form<60, 32,
111 (outs vsfrc:$XT), (ins vsfrc:$XA, vsfrc:$XB),
112 "xsadddp $XT, $XA, $XB", IIC_VecFP,
113 [(set f64:$XT, (fadd f64:$XA, f64:$XB))]>;
114 def XSMULDP : XX3Form<60, 48,
115 (outs vsfrc:$XT), (ins vsfrc:$XA, vsfrc:$XB),
116 "xsmuldp $XT, $XA, $XB", IIC_VecFP,
117 [(set f64:$XT, (fmul f64:$XA, f64:$XB))]>;
119 def XVADDDP : XX3Form<60, 96,
120 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB),
121 "xvadddp $XT, $XA, $XB", IIC_VecFP,
122 [(set v2f64:$XT, (fadd v2f64:$XA, v2f64:$XB))]>;
124 def XVADDSP : XX3Form<60, 64,
125 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB),
126 "xvaddsp $XT, $XA, $XB", IIC_VecFP,
127 [(set v4f32:$XT, (fadd v4f32:$XA, v4f32:$XB))]>;
129 def XVMULDP : XX3Form<60, 112,
130 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB),
131 "xvmuldp $XT, $XA, $XB", IIC_VecFP,
132 [(set v2f64:$XT, (fmul v2f64:$XA, v2f64:$XB))]>;
134 def XVMULSP : XX3Form<60, 80,
135 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB),
136 "xvmulsp $XT, $XA, $XB", IIC_VecFP,
137 [(set v4f32:$XT, (fmul v4f32:$XA, v4f32:$XB))]>;
140 // Subtract Instructions
141 def XSSUBDP : XX3Form<60, 40,
142 (outs vsfrc:$XT), (ins vsfrc:$XA, vsfrc:$XB),
143 "xssubdp $XT, $XA, $XB", IIC_VecFP,
144 [(set f64:$XT, (fsub f64:$XA, f64:$XB))]>;
146 def XVSUBDP : XX3Form<60, 104,
147 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB),
148 "xvsubdp $XT, $XA, $XB", IIC_VecFP,
149 [(set v2f64:$XT, (fsub v2f64:$XA, v2f64:$XB))]>;
150 def XVSUBSP : XX3Form<60, 72,
151 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB),
152 "xvsubsp $XT, $XA, $XB", IIC_VecFP,
153 [(set v4f32:$XT, (fsub v4f32:$XA, v4f32:$XB))]>;
156 let BaseName = "XSMADDADP" in {
157 let isCommutable = 1 in
158 def XSMADDADP : XX3Form<60, 33,
159 (outs vsfrc:$XT), (ins vsfrc:$XTi, vsfrc:$XA, vsfrc:$XB),
160 "xsmaddadp $XT, $XA, $XB", IIC_VecFP,
161 [(set f64:$XT, (fma f64:$XA, f64:$XB, f64:$XTi))]>,
162 RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">,
164 let IsVSXFMAAlt = 1 in
165 def XSMADDMDP : XX3Form<60, 41,
166 (outs vsfrc:$XT), (ins vsfrc:$XTi, vsfrc:$XA, vsfrc:$XB),
167 "xsmaddmdp $XT, $XA, $XB", IIC_VecFP, []>,
168 RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">,
172 let BaseName = "XSMSUBADP" in {
173 let isCommutable = 1 in
174 def XSMSUBADP : XX3Form<60, 49,
175 (outs vsfrc:$XT), (ins vsfrc:$XTi, vsfrc:$XA, vsfrc:$XB),
176 "xsmsubadp $XT, $XA, $XB", IIC_VecFP,
177 [(set f64:$XT, (fma f64:$XA, f64:$XB, (fneg f64:$XTi)))]>,
178 RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">,
180 let IsVSXFMAAlt = 1 in
181 def XSMSUBMDP : XX3Form<60, 57,
182 (outs vsfrc:$XT), (ins vsfrc:$XTi, vsfrc:$XA, vsfrc:$XB),
183 "xsmsubmdp $XT, $XA, $XB", IIC_VecFP, []>,
184 RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">,
188 let BaseName = "XSNMADDADP" in {
189 let isCommutable = 1 in
190 def XSNMADDADP : XX3Form<60, 161,
191 (outs vsfrc:$XT), (ins vsfrc:$XTi, vsfrc:$XA, vsfrc:$XB),
192 "xsnmaddadp $XT, $XA, $XB", IIC_VecFP,
193 [(set f64:$XT, (fneg (fma f64:$XA, f64:$XB, f64:$XTi)))]>,
194 RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">,
196 let IsVSXFMAAlt = 1 in
197 def XSNMADDMDP : XX3Form<60, 169,
198 (outs vsfrc:$XT), (ins vsfrc:$XTi, vsfrc:$XA, vsfrc:$XB),
199 "xsnmaddmdp $XT, $XA, $XB", IIC_VecFP, []>,
200 RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">,
204 let BaseName = "XSNMSUBADP" in {
205 let isCommutable = 1 in
206 def XSNMSUBADP : XX3Form<60, 177,
207 (outs vsfrc:$XT), (ins vsfrc:$XTi, vsfrc:$XA, vsfrc:$XB),
208 "xsnmsubadp $XT, $XA, $XB", IIC_VecFP,
209 [(set f64:$XT, (fneg (fma f64:$XA, f64:$XB, (fneg f64:$XTi))))]>,
210 RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">,
212 let IsVSXFMAAlt = 1 in
213 def XSNMSUBMDP : XX3Form<60, 185,
214 (outs vsfrc:$XT), (ins vsfrc:$XTi, vsfrc:$XA, vsfrc:$XB),
215 "xsnmsubmdp $XT, $XA, $XB", IIC_VecFP, []>,
216 RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">,
220 let BaseName = "XVMADDADP" in {
221 let isCommutable = 1 in
222 def XVMADDADP : XX3Form<60, 97,
223 (outs vsrc:$XT), (ins vsrc:$XTi, vsrc:$XA, vsrc:$XB),
224 "xvmaddadp $XT, $XA, $XB", IIC_VecFP,
225 [(set v2f64:$XT, (fma v2f64:$XA, v2f64:$XB, v2f64:$XTi))]>,
226 RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">,
228 let IsVSXFMAAlt = 1 in
229 def XVMADDMDP : XX3Form<60, 105,
230 (outs vsrc:$XT), (ins vsrc:$XTi, vsrc:$XA, vsrc:$XB),
231 "xvmaddmdp $XT, $XA, $XB", IIC_VecFP, []>,
232 RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">,
236 let BaseName = "XVMADDASP" in {
237 let isCommutable = 1 in
238 def XVMADDASP : XX3Form<60, 65,
239 (outs vsrc:$XT), (ins vsrc:$XTi, vsrc:$XA, vsrc:$XB),
240 "xvmaddasp $XT, $XA, $XB", IIC_VecFP,
241 [(set v4f32:$XT, (fma v4f32:$XA, v4f32:$XB, v4f32:$XTi))]>,
242 RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">,
244 let IsVSXFMAAlt = 1 in
245 def XVMADDMSP : XX3Form<60, 73,
246 (outs vsrc:$XT), (ins vsrc:$XTi, vsrc:$XA, vsrc:$XB),
247 "xvmaddmsp $XT, $XA, $XB", IIC_VecFP, []>,
248 RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">,
252 let BaseName = "XVMSUBADP" in {
253 let isCommutable = 1 in
254 def XVMSUBADP : XX3Form<60, 113,
255 (outs vsrc:$XT), (ins vsrc:$XTi, vsrc:$XA, vsrc:$XB),
256 "xvmsubadp $XT, $XA, $XB", IIC_VecFP,
257 [(set v2f64:$XT, (fma v2f64:$XA, v2f64:$XB, (fneg v2f64:$XTi)))]>,
258 RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">,
260 let IsVSXFMAAlt = 1 in
261 def XVMSUBMDP : XX3Form<60, 121,
262 (outs vsrc:$XT), (ins vsrc:$XTi, vsrc:$XA, vsrc:$XB),
263 "xvmsubmdp $XT, $XA, $XB", IIC_VecFP, []>,
264 RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">,
268 let BaseName = "XVMSUBASP" in {
269 let isCommutable = 1 in
270 def XVMSUBASP : XX3Form<60, 81,
271 (outs vsrc:$XT), (ins vsrc:$XTi, vsrc:$XA, vsrc:$XB),
272 "xvmsubasp $XT, $XA, $XB", IIC_VecFP,
273 [(set v4f32:$XT, (fma v4f32:$XA, v4f32:$XB, (fneg v4f32:$XTi)))]>,
274 RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">,
276 let IsVSXFMAAlt = 1 in
277 def XVMSUBMSP : XX3Form<60, 89,
278 (outs vsrc:$XT), (ins vsrc:$XTi, vsrc:$XA, vsrc:$XB),
279 "xvmsubmsp $XT, $XA, $XB", IIC_VecFP, []>,
280 RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">,
284 let BaseName = "XVNMADDADP" in {
285 let isCommutable = 1 in
286 def XVNMADDADP : XX3Form<60, 225,
287 (outs vsrc:$XT), (ins vsrc:$XTi, vsrc:$XA, vsrc:$XB),
288 "xvnmaddadp $XT, $XA, $XB", IIC_VecFP,
289 [(set v2f64:$XT, (fneg (fma v2f64:$XA, v2f64:$XB, v2f64:$XTi)))]>,
290 RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">,
292 let IsVSXFMAAlt = 1 in
293 def XVNMADDMDP : XX3Form<60, 233,
294 (outs vsrc:$XT), (ins vsrc:$XTi, vsrc:$XA, vsrc:$XB),
295 "xvnmaddmdp $XT, $XA, $XB", IIC_VecFP, []>,
296 RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">,
300 let BaseName = "XVNMADDASP" in {
301 let isCommutable = 1 in
302 def XVNMADDASP : XX3Form<60, 193,
303 (outs vsrc:$XT), (ins vsrc:$XTi, vsrc:$XA, vsrc:$XB),
304 "xvnmaddasp $XT, $XA, $XB", IIC_VecFP,
305 [(set v4f32:$XT, (fneg (fma v4f32:$XA, v4f32:$XB, v4f32:$XTi)))]>,
306 RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">,
308 let IsVSXFMAAlt = 1 in
309 def XVNMADDMSP : XX3Form<60, 201,
310 (outs vsrc:$XT), (ins vsrc:$XTi, vsrc:$XA, vsrc:$XB),
311 "xvnmaddmsp $XT, $XA, $XB", IIC_VecFP, []>,
312 RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">,
316 let BaseName = "XVNMSUBADP" in {
317 let isCommutable = 1 in
318 def XVNMSUBADP : XX3Form<60, 241,
319 (outs vsrc:$XT), (ins vsrc:$XTi, vsrc:$XA, vsrc:$XB),
320 "xvnmsubadp $XT, $XA, $XB", IIC_VecFP,
321 [(set v2f64:$XT, (fneg (fma v2f64:$XA, v2f64:$XB, (fneg v2f64:$XTi))))]>,
322 RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">,
324 let IsVSXFMAAlt = 1 in
325 def XVNMSUBMDP : XX3Form<60, 249,
326 (outs vsrc:$XT), (ins vsrc:$XTi, vsrc:$XA, vsrc:$XB),
327 "xvnmsubmdp $XT, $XA, $XB", IIC_VecFP, []>,
328 RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">,
332 let BaseName = "XVNMSUBASP" in {
333 let isCommutable = 1 in
334 def XVNMSUBASP : XX3Form<60, 209,
335 (outs vsrc:$XT), (ins vsrc:$XTi, vsrc:$XA, vsrc:$XB),
336 "xvnmsubasp $XT, $XA, $XB", IIC_VecFP,
337 [(set v4f32:$XT, (fneg (fma v4f32:$XA, v4f32:$XB, (fneg v4f32:$XTi))))]>,
338 RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">,
340 let IsVSXFMAAlt = 1 in
341 def XVNMSUBMSP : XX3Form<60, 217,
342 (outs vsrc:$XT), (ins vsrc:$XTi, vsrc:$XA, vsrc:$XB),
343 "xvnmsubmsp $XT, $XA, $XB", IIC_VecFP, []>,
344 RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">,
348 // Division Instructions
349 def XSDIVDP : XX3Form<60, 56,
350 (outs vsfrc:$XT), (ins vsfrc:$XA, vsfrc:$XB),
351 "xsdivdp $XT, $XA, $XB", IIC_FPDivD,
352 [(set f64:$XT, (fdiv f64:$XA, f64:$XB))]>;
353 def XSSQRTDP : XX2Form<60, 75,
354 (outs vsfrc:$XT), (ins vsfrc:$XB),
355 "xssqrtdp $XT, $XB", IIC_FPSqrtD,
356 [(set f64:$XT, (fsqrt f64:$XB))]>;
358 def XSREDP : XX2Form<60, 90,
359 (outs vsfrc:$XT), (ins vsfrc:$XB),
360 "xsredp $XT, $XB", IIC_VecFP,
361 [(set f64:$XT, (PPCfre f64:$XB))]>;
362 def XSRSQRTEDP : XX2Form<60, 74,
363 (outs vsfrc:$XT), (ins vsfrc:$XB),
364 "xsrsqrtedp $XT, $XB", IIC_VecFP,
365 [(set f64:$XT, (PPCfrsqrte f64:$XB))]>;
367 def XSTDIVDP : XX3Form_1<60, 61,
368 (outs crrc:$crD), (ins vsfrc:$XA, vsfrc:$XB),
369 "xstdivdp $crD, $XA, $XB", IIC_FPCompare, []>;
370 def XSTSQRTDP : XX2Form_1<60, 106,
371 (outs crrc:$crD), (ins vsfrc:$XB),
372 "xstsqrtdp $crD, $XB", IIC_FPCompare, []>;
374 def XVDIVDP : XX3Form<60, 120,
375 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB),
376 "xvdivdp $XT, $XA, $XB", IIC_FPDivD,
377 [(set v2f64:$XT, (fdiv v2f64:$XA, v2f64:$XB))]>;
378 def XVDIVSP : XX3Form<60, 88,
379 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB),
380 "xvdivsp $XT, $XA, $XB", IIC_FPDivS,
381 [(set v4f32:$XT, (fdiv v4f32:$XA, v4f32:$XB))]>;
383 def XVSQRTDP : XX2Form<60, 203,
384 (outs vsrc:$XT), (ins vsrc:$XB),
385 "xvsqrtdp $XT, $XB", IIC_FPSqrtD,
386 [(set v2f64:$XT, (fsqrt v2f64:$XB))]>;
387 def XVSQRTSP : XX2Form<60, 139,
388 (outs vsrc:$XT), (ins vsrc:$XB),
389 "xvsqrtsp $XT, $XB", IIC_FPSqrtS,
390 [(set v4f32:$XT, (fsqrt v4f32:$XB))]>;
392 def XVTDIVDP : XX3Form_1<60, 125,
393 (outs crrc:$crD), (ins vsrc:$XA, vsrc:$XB),
394 "xvtdivdp $crD, $XA, $XB", IIC_FPCompare, []>;
395 def XVTDIVSP : XX3Form_1<60, 93,
396 (outs crrc:$crD), (ins vsrc:$XA, vsrc:$XB),
397 "xvtdivsp $crD, $XA, $XB", IIC_FPCompare, []>;
399 def XVTSQRTDP : XX2Form_1<60, 234,
400 (outs crrc:$crD), (ins vsrc:$XB),
401 "xvtsqrtdp $crD, $XB", IIC_FPCompare, []>;
402 def XVTSQRTSP : XX2Form_1<60, 170,
403 (outs crrc:$crD), (ins vsrc:$XB),
404 "xvtsqrtsp $crD, $XB", IIC_FPCompare, []>;
406 def XVREDP : XX2Form<60, 218,
407 (outs vsrc:$XT), (ins vsrc:$XB),
408 "xvredp $XT, $XB", IIC_VecFP,
409 [(set v2f64:$XT, (PPCfre v2f64:$XB))]>;
410 def XVRESP : XX2Form<60, 154,
411 (outs vsrc:$XT), (ins vsrc:$XB),
412 "xvresp $XT, $XB", IIC_VecFP,
413 [(set v4f32:$XT, (PPCfre v4f32:$XB))]>;
415 def XVRSQRTEDP : XX2Form<60, 202,
416 (outs vsrc:$XT), (ins vsrc:$XB),
417 "xvrsqrtedp $XT, $XB", IIC_VecFP,
418 [(set v2f64:$XT, (PPCfrsqrte v2f64:$XB))]>;
419 def XVRSQRTESP : XX2Form<60, 138,
420 (outs vsrc:$XT), (ins vsrc:$XB),
421 "xvrsqrtesp $XT, $XB", IIC_VecFP,
422 [(set v4f32:$XT, (PPCfrsqrte v4f32:$XB))]>;
424 // Compare Instructions
425 def XSCMPODP : XX3Form_1<60, 43,
426 (outs crrc:$crD), (ins vsfrc:$XA, vsfrc:$XB),
427 "xscmpodp $crD, $XA, $XB", IIC_FPCompare, []>;
428 def XSCMPUDP : XX3Form_1<60, 35,
429 (outs crrc:$crD), (ins vsfrc:$XA, vsfrc:$XB),
430 "xscmpudp $crD, $XA, $XB", IIC_FPCompare, []>;
432 defm XVCMPEQDP : XX3Form_Rcr<60, 99,
433 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB),
434 "xvcmpeqdp", "$XT, $XA, $XB", IIC_VecFPCompare, []>;
435 defm XVCMPEQSP : XX3Form_Rcr<60, 67,
436 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB),
437 "xvcmpeqsp", "$XT, $XA, $XB", IIC_VecFPCompare, []>;
438 defm XVCMPGEDP : XX3Form_Rcr<60, 115,
439 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB),
440 "xvcmpgedp", "$XT, $XA, $XB", IIC_VecFPCompare, []>;
441 defm XVCMPGESP : XX3Form_Rcr<60, 83,
442 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB),
443 "xvcmpgesp", "$XT, $XA, $XB", IIC_VecFPCompare, []>;
444 defm XVCMPGTDP : XX3Form_Rcr<60, 107,
445 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB),
446 "xvcmpgtdp", "$XT, $XA, $XB", IIC_VecFPCompare, []>;
447 defm XVCMPGTSP : XX3Form_Rcr<60, 75,
448 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB),
449 "xvcmpgtsp", "$XT, $XA, $XB", IIC_VecFPCompare, []>;
452 def XSABSDP : XX2Form<60, 345,
453 (outs vsfrc:$XT), (ins vsfrc:$XB),
454 "xsabsdp $XT, $XB", IIC_VecFP,
455 [(set f64:$XT, (fabs f64:$XB))]>;
456 def XSNABSDP : XX2Form<60, 361,
457 (outs vsfrc:$XT), (ins vsfrc:$XB),
458 "xsnabsdp $XT, $XB", IIC_VecFP,
459 [(set f64:$XT, (fneg (fabs f64:$XB)))]>;
460 def XSNEGDP : XX2Form<60, 377,
461 (outs vsfrc:$XT), (ins vsfrc:$XB),
462 "xsnegdp $XT, $XB", IIC_VecFP,
463 [(set f64:$XT, (fneg f64:$XB))]>;
464 def XSCPSGNDP : XX3Form<60, 176,
465 (outs vsfrc:$XT), (ins vsfrc:$XA, vsfrc:$XB),
466 "xscpsgndp $XT, $XA, $XB", IIC_VecFP,
467 [(set f64:$XT, (fcopysign f64:$XB, f64:$XA))]>;
469 def XVABSDP : XX2Form<60, 473,
470 (outs vsrc:$XT), (ins vsrc:$XB),
471 "xvabsdp $XT, $XB", IIC_VecFP,
472 [(set v2f64:$XT, (fabs v2f64:$XB))]>;
474 def XVABSSP : XX2Form<60, 409,
475 (outs vsrc:$XT), (ins vsrc:$XB),
476 "xvabssp $XT, $XB", IIC_VecFP,
477 [(set v4f32:$XT, (fabs v4f32:$XB))]>;
479 def XVCPSGNDP : XX3Form<60, 240,
480 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB),
481 "xvcpsgndp $XT, $XA, $XB", IIC_VecFP,
482 [(set v2f64:$XT, (fcopysign v2f64:$XB, v2f64:$XA))]>;
483 def XVCPSGNSP : XX3Form<60, 208,
484 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB),
485 "xvcpsgnsp $XT, $XA, $XB", IIC_VecFP,
486 [(set v4f32:$XT, (fcopysign v4f32:$XB, v4f32:$XA))]>;
488 def XVNABSDP : XX2Form<60, 489,
489 (outs vsrc:$XT), (ins vsrc:$XB),
490 "xvnabsdp $XT, $XB", IIC_VecFP,
491 [(set v2f64:$XT, (fneg (fabs v2f64:$XB)))]>;
492 def XVNABSSP : XX2Form<60, 425,
493 (outs vsrc:$XT), (ins vsrc:$XB),
494 "xvnabssp $XT, $XB", IIC_VecFP,
495 [(set v4f32:$XT, (fneg (fabs v4f32:$XB)))]>;
497 def XVNEGDP : XX2Form<60, 505,
498 (outs vsrc:$XT), (ins vsrc:$XB),
499 "xvnegdp $XT, $XB", IIC_VecFP,
500 [(set v2f64:$XT, (fneg v2f64:$XB))]>;
501 def XVNEGSP : XX2Form<60, 441,
502 (outs vsrc:$XT), (ins vsrc:$XB),
503 "xvnegsp $XT, $XB", IIC_VecFP,
504 [(set v4f32:$XT, (fneg v4f32:$XB))]>;
506 // Conversion Instructions
507 def XSCVDPSP : XX2Form<60, 265,
508 (outs vsfrc:$XT), (ins vsfrc:$XB),
509 "xscvdpsp $XT, $XB", IIC_VecFP, []>;
510 def XSCVDPSXDS : XX2Form<60, 344,
511 (outs vsfrc:$XT), (ins vsfrc:$XB),
512 "xscvdpsxds $XT, $XB", IIC_VecFP,
513 [(set f64:$XT, (PPCfctidz f64:$XB))]>;
514 def XSCVDPSXWS : XX2Form<60, 88,
515 (outs vsfrc:$XT), (ins vsfrc:$XB),
516 "xscvdpsxws $XT, $XB", IIC_VecFP,
517 [(set f64:$XT, (PPCfctiwz f64:$XB))]>;
518 def XSCVDPUXDS : XX2Form<60, 328,
519 (outs vsfrc:$XT), (ins vsfrc:$XB),
520 "xscvdpuxds $XT, $XB", IIC_VecFP,
521 [(set f64:$XT, (PPCfctiduz f64:$XB))]>;
522 def XSCVDPUXWS : XX2Form<60, 72,
523 (outs vsfrc:$XT), (ins vsfrc:$XB),
524 "xscvdpuxws $XT, $XB", IIC_VecFP,
525 [(set f64:$XT, (PPCfctiwuz f64:$XB))]>;
526 def XSCVSPDP : XX2Form<60, 329,
527 (outs vsfrc:$XT), (ins vsfrc:$XB),
528 "xscvspdp $XT, $XB", IIC_VecFP, []>;
529 def XSCVSXDDP : XX2Form<60, 376,
530 (outs vsfrc:$XT), (ins vsfrc:$XB),
531 "xscvsxddp $XT, $XB", IIC_VecFP,
532 [(set f64:$XT, (PPCfcfid f64:$XB))]>;
533 def XSCVUXDDP : XX2Form<60, 360,
534 (outs vsfrc:$XT), (ins vsfrc:$XB),
535 "xscvuxddp $XT, $XB", IIC_VecFP,
536 [(set f64:$XT, (PPCfcfidu f64:$XB))]>;
538 def XVCVDPSP : XX2Form<60, 393,
539 (outs vsrc:$XT), (ins vsrc:$XB),
540 "xvcvdpsp $XT, $XB", IIC_VecFP, []>;
541 def XVCVDPSXDS : XX2Form<60, 472,
542 (outs vsrc:$XT), (ins vsrc:$XB),
543 "xvcvdpsxds $XT, $XB", IIC_VecFP,
544 [(set v2i64:$XT, (fp_to_sint v2f64:$XB))]>;
545 def XVCVDPSXWS : XX2Form<60, 216,
546 (outs vsrc:$XT), (ins vsrc:$XB),
547 "xvcvdpsxws $XT, $XB", IIC_VecFP, []>;
548 def XVCVDPUXDS : XX2Form<60, 456,
549 (outs vsrc:$XT), (ins vsrc:$XB),
550 "xvcvdpuxds $XT, $XB", IIC_VecFP,
551 [(set v2i64:$XT, (fp_to_uint v2f64:$XB))]>;
552 def XVCVDPUXWS : XX2Form<60, 200,
553 (outs vsrc:$XT), (ins vsrc:$XB),
554 "xvcvdpuxws $XT, $XB", IIC_VecFP, []>;
556 def XVCVSPDP : XX2Form<60, 457,
557 (outs vsrc:$XT), (ins vsrc:$XB),
558 "xvcvspdp $XT, $XB", IIC_VecFP, []>;
559 def XVCVSPSXDS : XX2Form<60, 408,
560 (outs vsrc:$XT), (ins vsrc:$XB),
561 "xvcvspsxds $XT, $XB", IIC_VecFP, []>;
562 def XVCVSPSXWS : XX2Form<60, 152,
563 (outs vsrc:$XT), (ins vsrc:$XB),
564 "xvcvspsxws $XT, $XB", IIC_VecFP, []>;
565 def XVCVSPUXDS : XX2Form<60, 392,
566 (outs vsrc:$XT), (ins vsrc:$XB),
567 "xvcvspuxds $XT, $XB", IIC_VecFP, []>;
568 def XVCVSPUXWS : XX2Form<60, 136,
569 (outs vsrc:$XT), (ins vsrc:$XB),
570 "xvcvspuxws $XT, $XB", IIC_VecFP, []>;
571 def XVCVSXDDP : XX2Form<60, 504,
572 (outs vsrc:$XT), (ins vsrc:$XB),
573 "xvcvsxddp $XT, $XB", IIC_VecFP,
574 [(set v2f64:$XT, (sint_to_fp v2i64:$XB))]>;
575 def XVCVSXDSP : XX2Form<60, 440,
576 (outs vsrc:$XT), (ins vsrc:$XB),
577 "xvcvsxdsp $XT, $XB", IIC_VecFP, []>;
578 def XVCVSXWDP : XX2Form<60, 248,
579 (outs vsrc:$XT), (ins vsrc:$XB),
580 "xvcvsxwdp $XT, $XB", IIC_VecFP, []>;
581 def XVCVSXWSP : XX2Form<60, 184,
582 (outs vsrc:$XT), (ins vsrc:$XB),
583 "xvcvsxwsp $XT, $XB", IIC_VecFP, []>;
584 def XVCVUXDDP : XX2Form<60, 488,
585 (outs vsrc:$XT), (ins vsrc:$XB),
586 "xvcvuxddp $XT, $XB", IIC_VecFP,
587 [(set v2f64:$XT, (uint_to_fp v2i64:$XB))]>;
588 def XVCVUXDSP : XX2Form<60, 424,
589 (outs vsrc:$XT), (ins vsrc:$XB),
590 "xvcvuxdsp $XT, $XB", IIC_VecFP, []>;
591 def XVCVUXWDP : XX2Form<60, 232,
592 (outs vsrc:$XT), (ins vsrc:$XB),
593 "xvcvuxwdp $XT, $XB", IIC_VecFP, []>;
594 def XVCVUXWSP : XX2Form<60, 168,
595 (outs vsrc:$XT), (ins vsrc:$XB),
596 "xvcvuxwsp $XT, $XB", IIC_VecFP, []>;
598 // Rounding Instructions
599 def XSRDPI : XX2Form<60, 73,
600 (outs vsfrc:$XT), (ins vsfrc:$XB),
601 "xsrdpi $XT, $XB", IIC_VecFP,
602 [(set f64:$XT, (frnd f64:$XB))]>;
603 def XSRDPIC : XX2Form<60, 107,
604 (outs vsfrc:$XT), (ins vsfrc:$XB),
605 "xsrdpic $XT, $XB", IIC_VecFP,
606 [(set f64:$XT, (fnearbyint f64:$XB))]>;
607 def XSRDPIM : XX2Form<60, 121,
608 (outs vsfrc:$XT), (ins vsfrc:$XB),
609 "xsrdpim $XT, $XB", IIC_VecFP,
610 [(set f64:$XT, (ffloor f64:$XB))]>;
611 def XSRDPIP : XX2Form<60, 105,
612 (outs vsfrc:$XT), (ins vsfrc:$XB),
613 "xsrdpip $XT, $XB", IIC_VecFP,
614 [(set f64:$XT, (fceil f64:$XB))]>;
615 def XSRDPIZ : XX2Form<60, 89,
616 (outs vsfrc:$XT), (ins vsfrc:$XB),
617 "xsrdpiz $XT, $XB", IIC_VecFP,
618 [(set f64:$XT, (ftrunc f64:$XB))]>;
620 def XVRDPI : XX2Form<60, 201,
621 (outs vsrc:$XT), (ins vsrc:$XB),
622 "xvrdpi $XT, $XB", IIC_VecFP,
623 [(set v2f64:$XT, (frnd v2f64:$XB))]>;
624 def XVRDPIC : XX2Form<60, 235,
625 (outs vsrc:$XT), (ins vsrc:$XB),
626 "xvrdpic $XT, $XB", IIC_VecFP,
627 [(set v2f64:$XT, (fnearbyint v2f64:$XB))]>;
628 def XVRDPIM : XX2Form<60, 249,
629 (outs vsrc:$XT), (ins vsrc:$XB),
630 "xvrdpim $XT, $XB", IIC_VecFP,
631 [(set v2f64:$XT, (ffloor v2f64:$XB))]>;
632 def XVRDPIP : XX2Form<60, 233,
633 (outs vsrc:$XT), (ins vsrc:$XB),
634 "xvrdpip $XT, $XB", IIC_VecFP,
635 [(set v2f64:$XT, (fceil v2f64:$XB))]>;
636 def XVRDPIZ : XX2Form<60, 217,
637 (outs vsrc:$XT), (ins vsrc:$XB),
638 "xvrdpiz $XT, $XB", IIC_VecFP,
639 [(set v2f64:$XT, (ftrunc v2f64:$XB))]>;
641 def XVRSPI : XX2Form<60, 137,
642 (outs vsrc:$XT), (ins vsrc:$XB),
643 "xvrspi $XT, $XB", IIC_VecFP,
644 [(set v4f32:$XT, (frnd v4f32:$XB))]>;
645 def XVRSPIC : XX2Form<60, 171,
646 (outs vsrc:$XT), (ins vsrc:$XB),
647 "xvrspic $XT, $XB", IIC_VecFP,
648 [(set v4f32:$XT, (fnearbyint v4f32:$XB))]>;
649 def XVRSPIM : XX2Form<60, 185,
650 (outs vsrc:$XT), (ins vsrc:$XB),
651 "xvrspim $XT, $XB", IIC_VecFP,
652 [(set v4f32:$XT, (ffloor v4f32:$XB))]>;
653 def XVRSPIP : XX2Form<60, 169,
654 (outs vsrc:$XT), (ins vsrc:$XB),
655 "xvrspip $XT, $XB", IIC_VecFP,
656 [(set v4f32:$XT, (fceil v4f32:$XB))]>;
657 def XVRSPIZ : XX2Form<60, 153,
658 (outs vsrc:$XT), (ins vsrc:$XB),
659 "xvrspiz $XT, $XB", IIC_VecFP,
660 [(set v4f32:$XT, (ftrunc v4f32:$XB))]>;
662 // Max/Min Instructions
663 let isCommutable = 1 in {
664 def XSMAXDP : XX3Form<60, 160,
665 (outs vsfrc:$XT), (ins vsfrc:$XA, vsfrc:$XB),
666 "xsmaxdp $XT, $XA, $XB", IIC_VecFP,
668 (int_ppc_vsx_xsmaxdp vsfrc:$XA, vsfrc:$XB))]>;
669 def XSMINDP : XX3Form<60, 168,
670 (outs vsfrc:$XT), (ins vsfrc:$XA, vsfrc:$XB),
671 "xsmindp $XT, $XA, $XB", IIC_VecFP,
673 (int_ppc_vsx_xsmindp vsfrc:$XA, vsfrc:$XB))]>;
675 def XVMAXDP : XX3Form<60, 224,
676 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB),
677 "xvmaxdp $XT, $XA, $XB", IIC_VecFP,
679 (int_ppc_vsx_xvmaxdp vsrc:$XA, vsrc:$XB))]>;
680 def XVMINDP : XX3Form<60, 232,
681 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB),
682 "xvmindp $XT, $XA, $XB", IIC_VecFP,
684 (int_ppc_vsx_xvmindp vsrc:$XA, vsrc:$XB))]>;
686 def XVMAXSP : XX3Form<60, 192,
687 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB),
688 "xvmaxsp $XT, $XA, $XB", IIC_VecFP,
690 (int_ppc_vsx_xvmaxsp vsrc:$XA, vsrc:$XB))]>;
691 def XVMINSP : XX3Form<60, 200,
692 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB),
693 "xvminsp $XT, $XA, $XB", IIC_VecFP,
695 (int_ppc_vsx_xvminsp vsrc:$XA, vsrc:$XB))]>;
699 // Logical Instructions
700 let isCommutable = 1 in
701 def XXLAND : XX3Form<60, 130,
702 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB),
703 "xxland $XT, $XA, $XB", IIC_VecGeneral,
704 [(set v4i32:$XT, (and v4i32:$XA, v4i32:$XB))]>;
705 def XXLANDC : XX3Form<60, 138,
706 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB),
707 "xxlandc $XT, $XA, $XB", IIC_VecGeneral,
708 [(set v4i32:$XT, (and v4i32:$XA,
709 (vnot_ppc v4i32:$XB)))]>;
710 let isCommutable = 1 in {
711 def XXLNOR : XX3Form<60, 162,
712 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB),
713 "xxlnor $XT, $XA, $XB", IIC_VecGeneral,
714 [(set v4i32:$XT, (vnot_ppc (or v4i32:$XA,
716 def XXLOR : XX3Form<60, 146,
717 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB),
718 "xxlor $XT, $XA, $XB", IIC_VecGeneral,
719 [(set v4i32:$XT, (or v4i32:$XA, v4i32:$XB))]>;
720 let isCodeGenOnly = 1 in
721 def XXLORf: XX3Form<60, 146,
722 (outs vsfrc:$XT), (ins vsfrc:$XA, vsfrc:$XB),
723 "xxlor $XT, $XA, $XB", IIC_VecGeneral, []>;
724 def XXLXOR : XX3Form<60, 154,
725 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB),
726 "xxlxor $XT, $XA, $XB", IIC_VecGeneral,
727 [(set v4i32:$XT, (xor v4i32:$XA, v4i32:$XB))]>;
730 // Permutation Instructions
731 def XXMRGHW : XX3Form<60, 18,
732 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB),
733 "xxmrghw $XT, $XA, $XB", IIC_VecPerm, []>;
734 def XXMRGLW : XX3Form<60, 50,
735 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB),
736 "xxmrglw $XT, $XA, $XB", IIC_VecPerm, []>;
738 def XXPERMDI : XX3Form_2<60, 10,
739 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB, u2imm:$DM),
740 "xxpermdi $XT, $XA, $XB, $DM", IIC_VecPerm, []>;
741 def XXSEL : XX4Form<60, 3,
742 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB, vsrc:$XC),
743 "xxsel $XT, $XA, $XB, $XC", IIC_VecPerm, []>;
745 def XXSLDWI : XX3Form_2<60, 2,
746 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB, u2imm:$SHW),
747 "xxsldwi $XT, $XA, $XB, $SHW", IIC_VecPerm, []>;
748 def XXSPLTW : XX2Form_2<60, 164,
749 (outs vsrc:$XT), (ins vsrc:$XB, u2imm:$UIM),
750 "xxspltw $XT, $XB, $UIM", IIC_VecPerm, []>;
753 // SELECT_CC_* - Used to implement the SELECT_CC DAG operation. Expanded after
754 // instruction selection into a branch sequence.
755 let usesCustomInserter = 1, // Expanded after instruction selection.
756 PPC970_Single = 1 in {
758 def SELECT_CC_VSRC: Pseudo<(outs vsrc:$dst),
759 (ins crrc:$cond, vsrc:$T, vsrc:$F, i32imm:$BROPC),
762 def SELECT_VSRC: Pseudo<(outs vsrc:$dst),
763 (ins crbitrc:$cond, vsrc:$T, vsrc:$F),
766 (select i1:$cond, v2f64:$T, v2f64:$F))]>;
767 def SELECT_CC_VSFRC: Pseudo<(outs f8rc:$dst),
768 (ins crrc:$cond, f8rc:$T, f8rc:$F,
769 i32imm:$BROPC), "#SELECT_CC_VSFRC",
771 def SELECT_VSFRC: Pseudo<(outs f8rc:$dst),
772 (ins crbitrc:$cond, f8rc:$T, f8rc:$F),
775 (select i1:$cond, f64:$T, f64:$F))]>;
776 } // usesCustomInserter
779 def : InstAlias<"xvmovdp $XT, $XB",
780 (XVCPSGNDP vsrc:$XT, vsrc:$XB, vsrc:$XB)>;
781 def : InstAlias<"xvmovsp $XT, $XB",
782 (XVCPSGNSP vsrc:$XT, vsrc:$XB, vsrc:$XB)>;
784 def : InstAlias<"xxspltd $XT, $XB, 0",
785 (XXPERMDI vsrc:$XT, vsrc:$XB, vsrc:$XB, 0)>;
786 def : InstAlias<"xxspltd $XT, $XB, 1",
787 (XXPERMDI vsrc:$XT, vsrc:$XB, vsrc:$XB, 3)>;
788 def : InstAlias<"xxmrghd $XT, $XA, $XB",
789 (XXPERMDI vsrc:$XT, vsrc:$XA, vsrc:$XB, 0)>;
790 def : InstAlias<"xxmrgld $XT, $XA, $XB",
791 (XXPERMDI vsrc:$XT, vsrc:$XA, vsrc:$XB, 3)>;
792 def : InstAlias<"xxswapd $XT, $XB",
793 (XXPERMDI vsrc:$XT, vsrc:$XB, vsrc:$XB, 2)>;
795 let AddedComplexity = 400 in { // Prefer VSX patterns over non-VSX patterns.
797 let Predicates = [IsBigEndian] in {
798 def : Pat<(v2f64 (scalar_to_vector f64:$A)),
799 (v2f64 (SUBREG_TO_REG (i64 1), $A, sub_64))>;
801 def : Pat<(f64 (vector_extract v2f64:$S, 0)),
802 (f64 (EXTRACT_SUBREG $S, sub_64))>;
803 def : Pat<(f64 (vector_extract v2f64:$S, 1)),
804 (f64 (EXTRACT_SUBREG (XXPERMDI $S, $S, 2), sub_64))>;
807 let Predicates = [IsLittleEndian] in {
808 def : Pat<(v2f64 (scalar_to_vector f64:$A)),
809 (v2f64 (XXPERMDI (SUBREG_TO_REG (i64 1), $A, sub_64),
810 (SUBREG_TO_REG (i64 1), $A, sub_64), 0))>;
812 def : Pat<(f64 (vector_extract v2f64:$S, 0)),
813 (f64 (EXTRACT_SUBREG (XXPERMDI $S, $S, 2), sub_64))>;
814 def : Pat<(f64 (vector_extract v2f64:$S, 1)),
815 (f64 (EXTRACT_SUBREG $S, sub_64))>;
818 // Additional fnmsub patterns: -a*c + b == -(a*c - b)
819 def : Pat<(fma (fneg f64:$A), f64:$C, f64:$B),
820 (XSNMSUBADP $B, $C, $A)>;
821 def : Pat<(fma f64:$A, (fneg f64:$C), f64:$B),
822 (XSNMSUBADP $B, $C, $A)>;
824 def : Pat<(fma (fneg v2f64:$A), v2f64:$C, v2f64:$B),
825 (XVNMSUBADP $B, $C, $A)>;
826 def : Pat<(fma v2f64:$A, (fneg v2f64:$C), v2f64:$B),
827 (XVNMSUBADP $B, $C, $A)>;
829 def : Pat<(fma (fneg v4f32:$A), v4f32:$C, v4f32:$B),
830 (XVNMSUBASP $B, $C, $A)>;
831 def : Pat<(fma v4f32:$A, (fneg v4f32:$C), v4f32:$B),
832 (XVNMSUBASP $B, $C, $A)>;
834 def : Pat<(v2f64 (bitconvert v4f32:$A)),
835 (COPY_TO_REGCLASS $A, VSRC)>;
836 def : Pat<(v2f64 (bitconvert v4i32:$A)),
837 (COPY_TO_REGCLASS $A, VSRC)>;
838 def : Pat<(v2f64 (bitconvert v8i16:$A)),
839 (COPY_TO_REGCLASS $A, VSRC)>;
840 def : Pat<(v2f64 (bitconvert v16i8:$A)),
841 (COPY_TO_REGCLASS $A, VSRC)>;
843 def : Pat<(v4f32 (bitconvert v2f64:$A)),
844 (COPY_TO_REGCLASS $A, VRRC)>;
845 def : Pat<(v4i32 (bitconvert v2f64:$A)),
846 (COPY_TO_REGCLASS $A, VRRC)>;
847 def : Pat<(v8i16 (bitconvert v2f64:$A)),
848 (COPY_TO_REGCLASS $A, VRRC)>;
849 def : Pat<(v16i8 (bitconvert v2f64:$A)),
850 (COPY_TO_REGCLASS $A, VRRC)>;
852 def : Pat<(v2i64 (bitconvert v4f32:$A)),
853 (COPY_TO_REGCLASS $A, VSRC)>;
854 def : Pat<(v2i64 (bitconvert v4i32:$A)),
855 (COPY_TO_REGCLASS $A, VSRC)>;
856 def : Pat<(v2i64 (bitconvert v8i16:$A)),
857 (COPY_TO_REGCLASS $A, VSRC)>;
858 def : Pat<(v2i64 (bitconvert v16i8:$A)),
859 (COPY_TO_REGCLASS $A, VSRC)>;
861 def : Pat<(v4f32 (bitconvert v2i64:$A)),
862 (COPY_TO_REGCLASS $A, VRRC)>;
863 def : Pat<(v4i32 (bitconvert v2i64:$A)),
864 (COPY_TO_REGCLASS $A, VRRC)>;
865 def : Pat<(v8i16 (bitconvert v2i64:$A)),
866 (COPY_TO_REGCLASS $A, VRRC)>;
867 def : Pat<(v16i8 (bitconvert v2i64:$A)),
868 (COPY_TO_REGCLASS $A, VRRC)>;
870 def : Pat<(v2f64 (bitconvert v2i64:$A)),
871 (COPY_TO_REGCLASS $A, VRRC)>;
872 def : Pat<(v2i64 (bitconvert v2f64:$A)),
873 (COPY_TO_REGCLASS $A, VRRC)>;
875 // sign extension patterns
876 // To extend "in place" from v2i32 to v2i64, we have input data like:
877 // | undef | i32 | undef | i32 |
878 // but xvcvsxwdp expects the input in big-Endian format:
879 // | i32 | undef | i32 | undef |
880 // so we need to shift everything to the left by one i32 (word) before
882 def : Pat<(sext_inreg v2i64:$C, v2i32),
883 (XVCVDPSXDS (XVCVSXWDP (XXSLDWI $C, $C, 1)))>;
884 def : Pat<(v2f64 (sint_to_fp (sext_inreg v2i64:$C, v2i32))),
885 (XVCVSXWDP (XXSLDWI $C, $C, 1))>;
888 def : Pat<(v2f64 (load xoaddr:$src)), (LXVD2X xoaddr:$src)>;
889 def : Pat<(v2i64 (load xoaddr:$src)), (LXVD2X xoaddr:$src)>;
890 def : Pat<(v4i32 (load xoaddr:$src)), (LXVW4X xoaddr:$src)>;
891 def : Pat<(v2f64 (PPClxvd2x xoaddr:$src)), (LXVD2X xoaddr:$src)>;
894 def : Pat<(int_ppc_vsx_stxvd2x v2f64:$rS, xoaddr:$dst),
895 (STXVD2X $rS, xoaddr:$dst)>;
896 def : Pat<(store v2i64:$rS, xoaddr:$dst), (STXVD2X $rS, xoaddr:$dst)>;
897 def : Pat<(int_ppc_vsx_stxvw4x v4i32:$rS, xoaddr:$dst),
898 (STXVW4X $rS, xoaddr:$dst)>;
899 def : Pat<(PPCstxvd2x v2f64:$rS, xoaddr:$dst), (STXVD2X $rS, xoaddr:$dst)>;
902 def : Pat<(v2f64 (PPCxxswapd v2f64:$src)), (XXPERMDI $src, $src, 2)>;
903 def : Pat<(v2i64 (PPCxxswapd v2i64:$src)), (XXPERMDI $src, $src, 2)>;
904 def : Pat<(v4f32 (PPCxxswapd v4f32:$src)), (XXPERMDI $src, $src, 2)>;
905 def : Pat<(v4i32 (PPCxxswapd v4i32:$src)), (XXPERMDI $src, $src, 2)>;
908 def : Pat<(v2f64 (selectcc i1:$lhs, i1:$rhs, v2f64:$tval, v2f64:$fval, SETLT)),
909 (SELECT_VSRC (CRANDC $rhs, $lhs), $tval, $fval)>;
910 def : Pat<(v2f64 (selectcc i1:$lhs, i1:$rhs, v2f64:$tval, v2f64:$fval, SETLE)),
911 (SELECT_VSRC (CRORC $rhs, $lhs), $tval, $fval)>;
912 def : Pat<(v2f64 (selectcc i1:$lhs, i1:$rhs, v2f64:$tval, v2f64:$fval, SETEQ)),
913 (SELECT_VSRC (CREQV $lhs, $rhs), $tval, $fval)>;
914 def : Pat<(v2f64 (selectcc i1:$lhs, i1:$rhs, v2f64:$tval, v2f64:$fval, SETGE)),
915 (SELECT_VSRC (CRORC $lhs, $rhs), $tval, $fval)>;
916 def : Pat<(v2f64 (selectcc i1:$lhs, i1:$rhs, v2f64:$tval, v2f64:$fval, SETGT)),
917 (SELECT_VSRC (CRANDC $lhs, $rhs), $tval, $fval)>;
918 def : Pat<(v2f64 (selectcc i1:$lhs, i1:$rhs, v2f64:$tval, v2f64:$fval, SETNE)),
919 (SELECT_VSRC (CRXOR $lhs, $rhs), $tval, $fval)>;
921 def : Pat<(f64 (selectcc i1:$lhs, i1:$rhs, f64:$tval, f64:$fval, SETLT)),
922 (SELECT_VSFRC (CRANDC $rhs, $lhs), $tval, $fval)>;
923 def : Pat<(f64 (selectcc i1:$lhs, i1:$rhs, f64:$tval, f64:$fval, SETLE)),
924 (SELECT_VSFRC (CRORC $rhs, $lhs), $tval, $fval)>;
925 def : Pat<(f64 (selectcc i1:$lhs, i1:$rhs, f64:$tval, f64:$fval, SETEQ)),
926 (SELECT_VSFRC (CREQV $lhs, $rhs), $tval, $fval)>;
927 def : Pat<(f64 (selectcc i1:$lhs, i1:$rhs, f64:$tval, f64:$fval, SETGE)),
928 (SELECT_VSFRC (CRORC $lhs, $rhs), $tval, $fval)>;
929 def : Pat<(f64 (selectcc i1:$lhs, i1:$rhs, f64:$tval, f64:$fval, SETGT)),
930 (SELECT_VSFRC (CRANDC $lhs, $rhs), $tval, $fval)>;
931 def : Pat<(f64 (selectcc i1:$lhs, i1:$rhs, f64:$tval, f64:$fval, SETNE)),
932 (SELECT_VSFRC (CRXOR $lhs, $rhs), $tval, $fval)>;
935 def : Pat<(int_ppc_vsx_xvdivsp v4f32:$A, v4f32:$B),
937 def : Pat<(int_ppc_vsx_xvdivdp v2f64:$A, v2f64:$B),
943 // The following VSX instructions were introduced in Power ISA 2.07
944 /* FIXME: if the operands are v2i64, these patterns will not match.
945 we should define new patterns or otherwise match the same patterns
946 when the elements are larger than i32.
948 def HasP8Vector : Predicate<"PPCSubTarget->hasP8Vector()">;
949 let Predicates = [HasP8Vector] in {
950 let AddedComplexity = 400 in { // Prefer VSX patterns over non-VSX patterns.
951 let isCommutable = 1 in {
952 def XXLEQV : XX3Form<60, 186,
953 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB),
954 "xxleqv $XT, $XA, $XB", IIC_VecGeneral,
955 [(set v4i32:$XT, (vnot_ppc (xor v4i32:$XA, v4i32:$XB)))]>;
956 def XXLNAND : XX3Form<60, 178,
957 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB),
958 "xxlnand $XT, $XA, $XB", IIC_VecGeneral,
959 [(set v4i32:$XT, (vnot_ppc (and v4i32:$XA,
962 def XXLORC : XX3Form<60, 170,
963 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB),
964 "xxlorc $XT, $XA, $XB", IIC_VecGeneral,
965 [(set v4i32:$XT, (or v4i32:$XA, (vnot_ppc v4i32:$XB)))]>;
966 } // AddedComplexity = 500