1 //===-- PPCJITInfo.cpp - Implement the JIT interfaces for the PowerPC -----===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the JIT interfaces for the 32-bit PowerPC target.
12 //===----------------------------------------------------------------------===//
14 #define DEBUG_TYPE "jit"
15 #include "PPCJITInfo.h"
16 #include "PPCRelocations.h"
17 #include "llvm/CodeGen/MachineCodeEmitter.h"
18 #include "llvm/Config/alloca.h"
19 #include "llvm/Support/Debug.h"
23 static TargetJITInfo::JITCompilerFn JITCompilerFunction;
25 #define BUILD_ADDIS(RD,RS,IMM16) \
26 ((15 << 26) | ((RD) << 21) | ((RS) << 16) | ((IMM16) & 65535))
27 #define BUILD_ORI(RD,RS,UIMM16) \
28 ((24 << 26) | ((RS) << 21) | ((RD) << 16) | ((UIMM16) & 65535))
29 #define BUILD_ORIS(RD,RS,UIMM16) \
30 ((25 << 26) | ((RS) << 21) | ((RD) << 16) | ((UIMM16) & 65535))
31 #define BUILD_RLDICR(RD,RS,SH,ME) \
32 ((30 << 26) | ((RS) << 21) | ((RD) << 16) | (((SH) & 31) << 11) | \
33 (((ME) & 63) << 6) | (1 << 2) | ((((SH) >> 5) & 1) << 1))
34 #define BUILD_MTSPR(RS,SPR) \
35 ((31 << 26) | ((RS) << 21) | ((SPR) << 16) | (467 << 1))
36 #define BUILD_BCCTRx(BO,BI,LINK) \
37 ((19 << 26) | ((BO) << 21) | ((BI) << 16) | (528 << 1) | ((LINK) & 1))
38 #define BUILD_B(TARGET, LINK) \
39 ((18 << 26) | (((TARGET) & 0x00FFFFFF) << 2) | ((LINK) & 1))
42 #define BUILD_LIS(RD,IMM16) BUILD_ADDIS(RD,0,IMM16)
43 #define BUILD_SLDI(RD,RS,IMM6) BUILD_RLDICR(RD,RS,IMM6,63-IMM6)
44 #define BUILD_MTCTR(RS) BUILD_MTSPR(RS,9)
45 #define BUILD_BCTR(LINK) BUILD_BCCTRx(20,0,LINK)
47 static void EmitBranchToAt(uint64_t At, uint64_t To, bool isCall, bool is64Bit){
48 intptr_t Offset = ((intptr_t)To - (intptr_t)At) >> 2;
49 unsigned *AtI = (unsigned*)(intptr_t)At;
51 if (Offset >= -(1 << 23) && Offset < (1 << 23)) { // In range?
52 AtI[0] = BUILD_B(Offset, isCall); // b/bl target
53 } else if (!is64Bit) {
54 AtI[0] = BUILD_LIS(12, To >> 16); // lis r12, hi16(address)
55 AtI[1] = BUILD_ORI(12, 12, To); // ori r12, r12, lo16(address)
56 AtI[2] = BUILD_MTCTR(12); // mtctr r12
57 AtI[3] = BUILD_BCTR(isCall); // bctr/bctrl
59 AtI[0] = BUILD_LIS(12, To >> 48); // lis r12, hi16(address)
60 AtI[1] = BUILD_ORI(12, 12, To >> 32); // ori r12, r12, lo16(address)
61 AtI[2] = BUILD_SLDI(12, 12, 32); // sldi r12, r12, 32
62 AtI[3] = BUILD_ORIS(12, 12, To >> 16); // oris r12, r12, hi16(address)
63 AtI[4] = BUILD_ORI(12, 12, To); // ori r12, r12, lo16(address)
64 AtI[5] = BUILD_MTCTR(12); // mtctr r12
65 AtI[6] = BUILD_BCTR(isCall); // bctr/bctrl
69 extern "C" void PPC32CompilationCallback();
70 extern "C" void PPC64CompilationCallback();
72 #if (defined(__POWERPC__) || defined (__ppc__) || defined(_POWER)) && \
74 // CompilationCallback stub - We can't use a C function with inline assembly in
75 // it, because we the prolog/epilog inserted by GCC won't work for us. Instead,
76 // write our own wrapper, which does things our way, so we have complete control
77 // over register saving and restoring.
81 ".globl _PPC32CompilationCallback\n"
82 "_PPC32CompilationCallback:\n"
83 // Make space for 8 ints r[3-10] and 13 doubles f[1-13] and the
84 // FIXME: need to save v[0-19] for altivec?
85 // FIXME: could shrink frame
86 // Set up a proper stack frame
88 // PowerPC64 ABI linkage - 24 bytes
89 // parameters - 32 bytes
90 // 13 double registers - 104 bytes
91 // 8 int registers - 32 bytes
95 // Save all int arg registers
96 "stw r10, 204(r1)\n" "stw r9, 200(r1)\n"
97 "stw r8, 196(r1)\n" "stw r7, 192(r1)\n"
98 "stw r6, 188(r1)\n" "stw r5, 184(r1)\n"
99 "stw r4, 180(r1)\n" "stw r3, 176(r1)\n"
100 // Save all call-clobbered FP regs.
101 "stfd f13, 168(r1)\n" "stfd f12, 160(r1)\n"
102 "stfd f11, 152(r1)\n" "stfd f10, 144(r1)\n"
103 "stfd f9, 136(r1)\n" "stfd f8, 128(r1)\n"
104 "stfd f7, 120(r1)\n" "stfd f6, 112(r1)\n"
105 "stfd f5, 104(r1)\n" "stfd f4, 96(r1)\n"
106 "stfd f3, 88(r1)\n" "stfd f2, 80(r1)\n"
108 // Arguments to Compilation Callback:
109 // r3 - our lr (address of the call instruction in stub plus 4)
110 // r4 - stub's lr (address of instruction that called the stub plus 4)
111 // r5 - is64Bit - always 0.
113 "lwz r2, 208(r1)\n" // stub's frame
114 "lwz r4, 8(r2)\n" // stub's lr
115 "li r5, 0\n" // 0 == 32 bit
116 "bl _PPCCompilationCallbackC\n"
118 // Restore all int arg registers
119 "lwz r10, 204(r1)\n" "lwz r9, 200(r1)\n"
120 "lwz r8, 196(r1)\n" "lwz r7, 192(r1)\n"
121 "lwz r6, 188(r1)\n" "lwz r5, 184(r1)\n"
122 "lwz r4, 180(r1)\n" "lwz r3, 176(r1)\n"
123 // Restore all FP arg registers
124 "lfd f13, 168(r1)\n" "lfd f12, 160(r1)\n"
125 "lfd f11, 152(r1)\n" "lfd f10, 144(r1)\n"
126 "lfd f9, 136(r1)\n" "lfd f8, 128(r1)\n"
127 "lfd f7, 120(r1)\n" "lfd f6, 112(r1)\n"
128 "lfd f5, 104(r1)\n" "lfd f4, 96(r1)\n"
129 "lfd f3, 88(r1)\n" "lfd f2, 80(r1)\n"
131 // Pop 3 frames off the stack and branch to target
138 void PPC32CompilationCallback() {
139 assert(0 && "This is not a power pc, you can't execute this!");
144 #if (defined(__POWERPC__) || defined (__ppc__) || defined(_POWER)) && \
149 ".globl _PPC64CompilationCallback\n"
150 "_PPC64CompilationCallback:\n"
151 // Make space for 8 ints r[3-10] and 13 doubles f[1-13] and the
152 // FIXME: need to save v[0-19] for altivec?
153 // Set up a proper stack frame
155 // PowerPC64 ABI linkage - 48 bytes
156 // parameters - 64 bytes
157 // 13 double registers - 104 bytes
158 // 8 int registers - 64 bytes
161 "stdu r1, -280(r1)\n"
162 // Save all int arg registers
163 "std r10, 272(r1)\n" "std r9, 264(r1)\n"
164 "std r8, 256(r1)\n" "std r7, 248(r1)\n"
165 "std r6, 240(r1)\n" "std r5, 232(r1)\n"
166 "std r4, 224(r1)\n" "std r3, 216(r1)\n"
167 // Save all call-clobbered FP regs.
168 "stfd f13, 208(r1)\n" "stfd f12, 200(r1)\n"
169 "stfd f11, 192(r1)\n" "stfd f10, 184(r1)\n"
170 "stfd f9, 176(r1)\n" "stfd f8, 168(r1)\n"
171 "stfd f7, 160(r1)\n" "stfd f6, 152(r1)\n"
172 "stfd f5, 144(r1)\n" "stfd f4, 136(r1)\n"
173 "stfd f3, 128(r1)\n" "stfd f2, 120(r1)\n"
175 // Arguments to Compilation Callback:
176 // r3 - our lr (address of the call instruction in stub plus 4)
177 // r4 - stub's lr (address of instruction that called the stub plus 4)
178 // r5 - is64Bit - always 1.
180 "ld r2, 280(r1)\n" // stub's frame
181 "ld r4, 16(r2)\n" // stub's lr
182 "li r5, 1\n" // 1 == 64 bit
183 "bl _PPCCompilationCallbackC\n"
185 // Restore all int arg registers
186 "ld r10, 272(r1)\n" "ld r9, 264(r1)\n"
187 "ld r8, 256(r1)\n" "ld r7, 248(r1)\n"
188 "ld r6, 240(r1)\n" "ld r5, 232(r1)\n"
189 "ld r4, 224(r1)\n" "ld r3, 216(r1)\n"
190 // Restore all FP arg registers
191 "lfd f13, 208(r1)\n" "lfd f12, 200(r1)\n"
192 "lfd f11, 192(r1)\n" "lfd f10, 184(r1)\n"
193 "lfd f9, 176(r1)\n" "lfd f8, 168(r1)\n"
194 "lfd f7, 160(r1)\n" "lfd f6, 152(r1)\n"
195 "lfd f5, 144(r1)\n" "lfd f4, 136(r1)\n"
196 "lfd f3, 128(r1)\n" "lfd f2, 120(r1)\n"
198 // Pop 3 frames off the stack and branch to target
205 void PPC64CompilationCallback() {
206 assert(0 && "This is not a power pc, you can't execute this!");
211 extern "C" void *PPCCompilationCallbackC(unsigned *StubCallAddrPlus4,
212 unsigned *OrigCallAddrPlus4,
214 // Adjust the pointer to the address of the call instruction in the stub
215 // emitted by emitFunctionStub, rather than the instruction after it.
216 unsigned *StubCallAddr = StubCallAddrPlus4 - 1;
217 unsigned *OrigCallAddr = OrigCallAddrPlus4 - 1;
219 void *Target = JITCompilerFunction(StubCallAddr);
221 // Check to see if *OrigCallAddr is a 'bl' instruction, and if we can rewrite
222 // it to branch directly to the destination. If so, rewrite it so it does not
223 // need to go through the stub anymore.
224 unsigned OrigCallInst = *OrigCallAddr;
225 if ((OrigCallInst >> 26) == 18) { // Direct call.
226 intptr_t Offset = ((intptr_t)Target - (intptr_t)OrigCallAddr) >> 2;
228 if (Offset >= -(1 << 23) && Offset < (1 << 23)) { // In range?
229 // Clear the original target out.
230 OrigCallInst &= (63 << 26) | 3;
231 // Fill in the new target.
232 OrigCallInst |= (Offset & ((1 << 24)-1)) << 2;
234 *OrigCallAddr = OrigCallInst;
238 // Assert that we are coming from a stub that was created with our
240 if ((*StubCallAddr >> 26) == 18)
243 assert((*StubCallAddr >> 26) == 19 && "Call in stub is not indirect!");
244 StubCallAddr -= is64Bit ? 9 : 6;
247 // Rewrite the stub with an unconditional branch to the target, for any users
248 // who took the address of the stub.
249 EmitBranchToAt((intptr_t)StubCallAddr, (intptr_t)Target, false, is64Bit);
251 // Put the address of the target function to call and the address to return to
252 // after calling the target function in a place that is easy to get on the
253 // stack after we restore all regs.
259 TargetJITInfo::LazyResolverFn
260 PPCJITInfo::getLazyResolverFunction(JITCompilerFn Fn) {
261 JITCompilerFunction = Fn;
262 return is64Bit ? PPC64CompilationCallback : PPC32CompilationCallback;
265 void *PPCJITInfo::emitFunctionStub(void *Fn, MachineCodeEmitter &MCE) {
266 // If this is just a call to an external function, emit a branch instead of a
267 // call. The code is the same except for one bit of the last instruction.
268 if (Fn != (void*)(intptr_t)PPC32CompilationCallback &&
269 Fn != (void*)(intptr_t)PPC64CompilationCallback) {
270 MCE.startFunctionStub(7*4);
271 intptr_t Addr = (intptr_t)MCE.getCurrentPCValue();
279 EmitBranchToAt(Addr, (intptr_t)Fn, false, is64Bit);
280 return MCE.finishFunctionStub(0);
283 MCE.startFunctionStub(10*4);
285 MCE.emitWordBE(0xf821ffb1); // stdu r1,-80(r1)
286 MCE.emitWordBE(0x7d6802a6); // mflr r11
287 MCE.emitWordBE(0xf9610060); // std r11, 96(r1)
289 MCE.emitWordBE(0x9421ffe0); // stwu r1,-32(r1)
290 MCE.emitWordBE(0x7d6802a6); // mflr r11
291 MCE.emitWordBE(0x91610028); // stw r11, 40(r1)
293 intptr_t Addr = (intptr_t)MCE.getCurrentPCValue();
301 EmitBranchToAt(Addr, (intptr_t)Fn, true, is64Bit);
302 return MCE.finishFunctionStub(0);
306 void PPCJITInfo::relocate(void *Function, MachineRelocation *MR,
307 unsigned NumRelocs, unsigned char* GOTBase) {
308 for (unsigned i = 0; i != NumRelocs; ++i, ++MR) {
309 unsigned *RelocPos = (unsigned*)Function + MR->getMachineCodeOffset()/4;
310 intptr_t ResultPtr = (intptr_t)MR->getResultPointer();
311 switch ((PPC::RelocationType)MR->getRelocationType()) {
312 default: assert(0 && "Unknown relocation type!");
313 case PPC::reloc_pcrel_bx:
314 // PC-relative relocation for b and bl instructions.
315 ResultPtr = (ResultPtr-(intptr_t)RelocPos) >> 2;
316 assert(ResultPtr >= -(1 << 23) && ResultPtr < (1 << 23) &&
317 "Relocation out of range!");
318 *RelocPos |= (ResultPtr & ((1 << 24)-1)) << 2;
320 case PPC::reloc_pcrel_bcx:
321 // PC-relative relocation for BLT,BLE,BEQ,BGE,BGT,BNE, or other
323 ResultPtr = (ResultPtr-(intptr_t)RelocPos) >> 2;
324 assert(ResultPtr >= -(1 << 13) && ResultPtr < (1 << 13) &&
325 "Relocation out of range!");
326 *RelocPos |= (ResultPtr & ((1 << 14)-1)) << 2;
328 case PPC::reloc_absolute_high: // high bits of ref -> low 16 of instr
329 case PPC::reloc_absolute_low: { // low bits of ref -> low 16 of instr
330 ResultPtr += MR->getConstantVal();
332 // If this is a high-part access, get the high-part.
333 if (MR->getRelocationType() == PPC::reloc_absolute_high) {
334 // If the low part will have a carry (really a borrow) from the low
335 // 16-bits into the high 16, add a bit to borrow from.
336 if (((int)ResultPtr << 16) < 0)
337 ResultPtr += 1 << 16;
341 // Do the addition then mask, so the addition does not overflow the 16-bit
342 // immediate section of the instruction.
343 unsigned LowBits = (*RelocPos + ResultPtr) & 65535;
344 unsigned HighBits = *RelocPos & ~65535;
345 *RelocPos = LowBits | HighBits; // Slam into low 16-bits
348 case PPC::reloc_absolute_low_ix: { // low bits of ref -> low 14 of instr
349 ResultPtr += MR->getConstantVal();
350 // Do the addition then mask, so the addition does not overflow the 16-bit
351 // immediate section of the instruction.
352 unsigned LowBits = (*RelocPos + ResultPtr) & 0xFFFC;
353 unsigned HighBits = *RelocPos & 0xFFFF0003;
354 *RelocPos = LowBits | HighBits; // Slam into low 14-bits.
361 void PPCJITInfo::replaceMachineCodeForFunction(void *Old, void *New) {
362 EmitBranchToAt((intptr_t)Old, (intptr_t)New, false, is64Bit);