1 //===-- PPCJITInfo.cpp - Implement the JIT interfaces for the PowerPC -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the JIT interfaces for the 32-bit PowerPC target.
12 //===----------------------------------------------------------------------===//
14 #define DEBUG_TYPE "jit"
15 #include "PPCJITInfo.h"
16 #include "PPCRelocations.h"
17 #include "PPCTargetMachine.h"
18 #include "llvm/CodeGen/MachineCodeEmitter.h"
19 #include "llvm/Config/alloca.h"
20 #include "llvm/Support/Debug.h"
24 static TargetJITInfo::JITCompilerFn JITCompilerFunction;
26 #define BUILD_ADDIS(RD,RS,IMM16) \
27 ((15 << 26) | ((RD) << 21) | ((RS) << 16) | ((IMM16) & 65535))
28 #define BUILD_ORI(RD,RS,UIMM16) \
29 ((24 << 26) | ((RS) << 21) | ((RD) << 16) | ((UIMM16) & 65535))
30 #define BUILD_ORIS(RD,RS,UIMM16) \
31 ((25 << 26) | ((RS) << 21) | ((RD) << 16) | ((UIMM16) & 65535))
32 #define BUILD_RLDICR(RD,RS,SH,ME) \
33 ((30 << 26) | ((RS) << 21) | ((RD) << 16) | (((SH) & 31) << 11) | \
34 (((ME) & 63) << 6) | (1 << 2) | ((((SH) >> 5) & 1) << 1))
35 #define BUILD_MTSPR(RS,SPR) \
36 ((31 << 26) | ((RS) << 21) | ((SPR) << 16) | (467 << 1))
37 #define BUILD_BCCTRx(BO,BI,LINK) \
38 ((19 << 26) | ((BO) << 21) | ((BI) << 16) | (528 << 1) | ((LINK) & 1))
39 #define BUILD_B(TARGET, LINK) \
40 ((18 << 26) | (((TARGET) & 0x00FFFFFF) << 2) | ((LINK) & 1))
43 #define BUILD_LIS(RD,IMM16) BUILD_ADDIS(RD,0,IMM16)
44 #define BUILD_SLDI(RD,RS,IMM6) BUILD_RLDICR(RD,RS,IMM6,63-IMM6)
45 #define BUILD_MTCTR(RS) BUILD_MTSPR(RS,9)
46 #define BUILD_BCTR(LINK) BUILD_BCCTRx(20,0,LINK)
48 static void EmitBranchToAt(uint64_t At, uint64_t To, bool isCall, bool is64Bit){
49 intptr_t Offset = ((intptr_t)To - (intptr_t)At) >> 2;
50 unsigned *AtI = (unsigned*)(intptr_t)At;
52 if (Offset >= -(1 << 23) && Offset < (1 << 23)) { // In range?
53 AtI[0] = BUILD_B(Offset, isCall); // b/bl target
54 } else if (!is64Bit) {
55 AtI[0] = BUILD_LIS(12, To >> 16); // lis r12, hi16(address)
56 AtI[1] = BUILD_ORI(12, 12, To); // ori r12, r12, lo16(address)
57 AtI[2] = BUILD_MTCTR(12); // mtctr r12
58 AtI[3] = BUILD_BCTR(isCall); // bctr/bctrl
60 AtI[0] = BUILD_LIS(12, To >> 48); // lis r12, hi16(address)
61 AtI[1] = BUILD_ORI(12, 12, To >> 32); // ori r12, r12, lo16(address)
62 AtI[2] = BUILD_SLDI(12, 12, 32); // sldi r12, r12, 32
63 AtI[3] = BUILD_ORIS(12, 12, To >> 16); // oris r12, r12, hi16(address)
64 AtI[4] = BUILD_ORI(12, 12, To); // ori r12, r12, lo16(address)
65 AtI[5] = BUILD_MTCTR(12); // mtctr r12
66 AtI[6] = BUILD_BCTR(isCall); // bctr/bctrl
70 extern "C" void PPC32CompilationCallback();
71 extern "C" void PPC64CompilationCallback();
73 #if (defined(__POWERPC__) || defined (__ppc__) || defined(_POWER)) && \
75 // CompilationCallback stub - We can't use a C function with inline assembly in
76 // it, because we the prolog/epilog inserted by GCC won't work for us. Instead,
77 // write our own wrapper, which does things our way, so we have complete control
78 // over register saving and restoring.
82 ".globl _PPC32CompilationCallback\n"
83 "_PPC32CompilationCallback:\n"
84 // Make space for 8 ints r[3-10] and 13 doubles f[1-13] and the
85 // FIXME: need to save v[0-19] for altivec?
86 // FIXME: could shrink frame
87 // Set up a proper stack frame
89 // PowerPC64 ABI linkage - 24 bytes
90 // parameters - 32 bytes
91 // 13 double registers - 104 bytes
92 // 8 int registers - 32 bytes
96 // Save all int arg registers
97 "stw r10, 204(r1)\n" "stw r9, 200(r1)\n"
98 "stw r8, 196(r1)\n" "stw r7, 192(r1)\n"
99 "stw r6, 188(r1)\n" "stw r5, 184(r1)\n"
100 "stw r4, 180(r1)\n" "stw r3, 176(r1)\n"
101 // Save all call-clobbered FP regs.
102 "stfd f13, 168(r1)\n" "stfd f12, 160(r1)\n"
103 "stfd f11, 152(r1)\n" "stfd f10, 144(r1)\n"
104 "stfd f9, 136(r1)\n" "stfd f8, 128(r1)\n"
105 "stfd f7, 120(r1)\n" "stfd f6, 112(r1)\n"
106 "stfd f5, 104(r1)\n" "stfd f4, 96(r1)\n"
107 "stfd f3, 88(r1)\n" "stfd f2, 80(r1)\n"
109 // Arguments to Compilation Callback:
110 // r3 - our lr (address of the call instruction in stub plus 4)
111 // r4 - stub's lr (address of instruction that called the stub plus 4)
112 // r5 - is64Bit - always 0.
114 "lwz r2, 208(r1)\n" // stub's frame
115 "lwz r4, 8(r2)\n" // stub's lr
116 "li r5, 0\n" // 0 == 32 bit
117 "bl _PPCCompilationCallbackC\n"
119 // Restore all int arg registers
120 "lwz r10, 204(r1)\n" "lwz r9, 200(r1)\n"
121 "lwz r8, 196(r1)\n" "lwz r7, 192(r1)\n"
122 "lwz r6, 188(r1)\n" "lwz r5, 184(r1)\n"
123 "lwz r4, 180(r1)\n" "lwz r3, 176(r1)\n"
124 // Restore all FP arg registers
125 "lfd f13, 168(r1)\n" "lfd f12, 160(r1)\n"
126 "lfd f11, 152(r1)\n" "lfd f10, 144(r1)\n"
127 "lfd f9, 136(r1)\n" "lfd f8, 128(r1)\n"
128 "lfd f7, 120(r1)\n" "lfd f6, 112(r1)\n"
129 "lfd f5, 104(r1)\n" "lfd f4, 96(r1)\n"
130 "lfd f3, 88(r1)\n" "lfd f2, 80(r1)\n"
132 // Pop 3 frames off the stack and branch to target
139 #elif defined(__PPC__) && !defined(__ppc64__)
142 // CompilationCallback stub - We can't use a C function with inline assembly in
143 // it, because we the prolog/epilog inserted by GCC won't work for us. Instead,
144 // write our own wrapper, which does things our way, so we have complete control
145 // over register saving and restoring.
149 ".globl PPC32CompilationCallback\n"
150 "PPC32CompilationCallback:\n"
151 // Make space for 8 ints r[3-10] and 8 doubles f[1-8] and the
152 // FIXME: need to save v[0-19] for altivec?
153 // FIXME: could shrink frame
154 // Set up a proper stack frame
156 // 8 double registers - 64 bytes
157 // 8 int registers - 32 bytes
161 // Save all int arg registers
162 "stw 10, 100(1)\n" "stw 9, 96(1)\n"
163 "stw 8, 92(1)\n" "stw 7, 88(1)\n"
164 "stw 6, 84(1)\n" "stw 5, 80(1)\n"
165 "stw 4, 76(1)\n" "stw 3, 72(1)\n"
166 // Save all call-clobbered FP regs.
168 "stfd 7, 56(1)\n" "stfd 6, 48(1)\n"
169 "stfd 5, 40(1)\n" "stfd 4, 32(1)\n"
170 "stfd 3, 24(1)\n" "stfd 2, 16(1)\n"
172 // Arguments to Compilation Callback:
173 // r3 - our lr (address of the call instruction in stub plus 4)
174 // r4 - stub's lr (address of instruction that called the stub plus 4)
175 // r5 - is64Bit - always 0.
177 "lwz 5, 104(1)\n" // stub's frame
178 "lwz 4, 4(5)\n" // stub's lr
179 "li 5, 0\n" // 0 == 32 bit
180 "bl PPCCompilationCallbackC\n"
182 // Restore all int arg registers
183 "lwz 10, 100(1)\n" "lwz 9, 96(1)\n"
184 "lwz 8, 92(1)\n" "lwz 7, 88(1)\n"
185 "lwz 6, 84(1)\n" "lwz 5, 80(1)\n"
186 "lwz 4, 76(1)\n" "lwz 3, 72(1)\n"
187 // Restore all FP arg registers
189 "lfd 7, 56(1)\n" "lfd 6, 48(1)\n"
190 "lfd 5, 40(1)\n" "lfd 4, 32(1)\n"
191 "lfd 3, 24(1)\n" "lfd 2, 16(1)\n"
193 // Pop 3 frames off the stack and branch to target
200 void PPC32CompilationCallback() {
201 assert(0 && "This is not a power pc, you can't execute this!");
206 #if (defined(__POWERPC__) || defined (__ppc__) || defined(_POWER)) && \
211 ".globl _PPC64CompilationCallback\n"
212 "_PPC64CompilationCallback:\n"
213 // Make space for 8 ints r[3-10] and 13 doubles f[1-13] and the
214 // FIXME: need to save v[0-19] for altivec?
215 // Set up a proper stack frame
217 // PowerPC64 ABI linkage - 48 bytes
218 // parameters - 64 bytes
219 // 13 double registers - 104 bytes
220 // 8 int registers - 64 bytes
223 "stdu r1, -280(r1)\n"
224 // Save all int arg registers
225 "std r10, 272(r1)\n" "std r9, 264(r1)\n"
226 "std r8, 256(r1)\n" "std r7, 248(r1)\n"
227 "std r6, 240(r1)\n" "std r5, 232(r1)\n"
228 "std r4, 224(r1)\n" "std r3, 216(r1)\n"
229 // Save all call-clobbered FP regs.
230 "stfd f13, 208(r1)\n" "stfd f12, 200(r1)\n"
231 "stfd f11, 192(r1)\n" "stfd f10, 184(r1)\n"
232 "stfd f9, 176(r1)\n" "stfd f8, 168(r1)\n"
233 "stfd f7, 160(r1)\n" "stfd f6, 152(r1)\n"
234 "stfd f5, 144(r1)\n" "stfd f4, 136(r1)\n"
235 "stfd f3, 128(r1)\n" "stfd f2, 120(r1)\n"
237 // Arguments to Compilation Callback:
238 // r3 - our lr (address of the call instruction in stub plus 4)
239 // r4 - stub's lr (address of instruction that called the stub plus 4)
240 // r5 - is64Bit - always 1.
242 "ld r2, 280(r1)\n" // stub's frame
243 "ld r4, 16(r2)\n" // stub's lr
244 "li r5, 1\n" // 1 == 64 bit
245 "bl _PPCCompilationCallbackC\n"
247 // Restore all int arg registers
248 "ld r10, 272(r1)\n" "ld r9, 264(r1)\n"
249 "ld r8, 256(r1)\n" "ld r7, 248(r1)\n"
250 "ld r6, 240(r1)\n" "ld r5, 232(r1)\n"
251 "ld r4, 224(r1)\n" "ld r3, 216(r1)\n"
252 // Restore all FP arg registers
253 "lfd f13, 208(r1)\n" "lfd f12, 200(r1)\n"
254 "lfd f11, 192(r1)\n" "lfd f10, 184(r1)\n"
255 "lfd f9, 176(r1)\n" "lfd f8, 168(r1)\n"
256 "lfd f7, 160(r1)\n" "lfd f6, 152(r1)\n"
257 "lfd f5, 144(r1)\n" "lfd f4, 136(r1)\n"
258 "lfd f3, 128(r1)\n" "lfd f2, 120(r1)\n"
260 // Pop 3 frames off the stack and branch to target
267 void PPC64CompilationCallback() {
268 assert(0 && "This is not a power pc, you can't execute this!");
273 extern "C" void *PPCCompilationCallbackC(unsigned *StubCallAddrPlus4,
274 unsigned *OrigCallAddrPlus4,
276 // Adjust the pointer to the address of the call instruction in the stub
277 // emitted by emitFunctionStub, rather than the instruction after it.
278 unsigned *StubCallAddr = StubCallAddrPlus4 - 1;
279 unsigned *OrigCallAddr = OrigCallAddrPlus4 - 1;
281 void *Target = JITCompilerFunction(StubCallAddr);
283 // Check to see if *OrigCallAddr is a 'bl' instruction, and if we can rewrite
284 // it to branch directly to the destination. If so, rewrite it so it does not
285 // need to go through the stub anymore.
286 unsigned OrigCallInst = *OrigCallAddr;
287 if ((OrigCallInst >> 26) == 18) { // Direct call.
288 intptr_t Offset = ((intptr_t)Target - (intptr_t)OrigCallAddr) >> 2;
290 if (Offset >= -(1 << 23) && Offset < (1 << 23)) { // In range?
291 // Clear the original target out.
292 OrigCallInst &= (63 << 26) | 3;
293 // Fill in the new target.
294 OrigCallInst |= (Offset & ((1 << 24)-1)) << 2;
296 *OrigCallAddr = OrigCallInst;
300 // Assert that we are coming from a stub that was created with our
302 if ((*StubCallAddr >> 26) == 18)
305 assert((*StubCallAddr >> 26) == 19 && "Call in stub is not indirect!");
306 StubCallAddr -= is64Bit ? 9 : 6;
309 // Rewrite the stub with an unconditional branch to the target, for any users
310 // who took the address of the stub.
311 EmitBranchToAt((intptr_t)StubCallAddr, (intptr_t)Target, false, is64Bit);
313 // Put the address of the target function to call and the address to return to
314 // after calling the target function in a place that is easy to get on the
315 // stack after we restore all regs.
321 TargetJITInfo::LazyResolverFn
322 PPCJITInfo::getLazyResolverFunction(JITCompilerFn Fn) {
323 JITCompilerFunction = Fn;
324 return is64Bit ? PPC64CompilationCallback : PPC32CompilationCallback;
327 void *PPCJITInfo::emitFunctionStub(void *Fn, MachineCodeEmitter &MCE) {
328 // If this is just a call to an external function, emit a branch instead of a
329 // call. The code is the same except for one bit of the last instruction.
330 if (Fn != (void*)(intptr_t)PPC32CompilationCallback &&
331 Fn != (void*)(intptr_t)PPC64CompilationCallback) {
332 MCE.startFunctionStub(7*4);
333 intptr_t Addr = (intptr_t)MCE.getCurrentPCValue();
341 EmitBranchToAt(Addr, (intptr_t)Fn, false, is64Bit);
342 return MCE.finishFunctionStub(0);
345 MCE.startFunctionStub(10*4);
347 MCE.emitWordBE(0xf821ffb1); // stdu r1,-80(r1)
348 MCE.emitWordBE(0x7d6802a6); // mflr r11
349 MCE.emitWordBE(0xf9610060); // std r11, 96(r1)
350 } else if (TM.getSubtargetImpl()->isMachoABI()){
351 MCE.emitWordBE(0x9421ffe0); // stwu r1,-32(r1)
352 MCE.emitWordBE(0x7d6802a6); // mflr r11
353 MCE.emitWordBE(0x91610028); // stw r11, 40(r1)
355 MCE.emitWordBE(0x9421ffe0); // stwu r1,-32(r1)
356 MCE.emitWordBE(0x7d6802a6); // mflr r11
357 MCE.emitWordBE(0x91610024); // stw r11, 36(r1)
359 intptr_t Addr = (intptr_t)MCE.getCurrentPCValue();
367 EmitBranchToAt(Addr, (intptr_t)Fn, true, is64Bit);
368 return MCE.finishFunctionStub(0);
372 void PPCJITInfo::relocate(void *Function, MachineRelocation *MR,
373 unsigned NumRelocs, unsigned char* GOTBase) {
374 for (unsigned i = 0; i != NumRelocs; ++i, ++MR) {
375 unsigned *RelocPos = (unsigned*)Function + MR->getMachineCodeOffset()/4;
376 intptr_t ResultPtr = (intptr_t)MR->getResultPointer();
377 switch ((PPC::RelocationType)MR->getRelocationType()) {
378 default: assert(0 && "Unknown relocation type!");
379 case PPC::reloc_pcrel_bx:
380 // PC-relative relocation for b and bl instructions.
381 ResultPtr = (ResultPtr-(intptr_t)RelocPos) >> 2;
382 assert(ResultPtr >= -(1 << 23) && ResultPtr < (1 << 23) &&
383 "Relocation out of range!");
384 *RelocPos |= (ResultPtr & ((1 << 24)-1)) << 2;
386 case PPC::reloc_pcrel_bcx:
387 // PC-relative relocation for BLT,BLE,BEQ,BGE,BGT,BNE, or other
389 ResultPtr = (ResultPtr-(intptr_t)RelocPos) >> 2;
390 assert(ResultPtr >= -(1 << 13) && ResultPtr < (1 << 13) &&
391 "Relocation out of range!");
392 *RelocPos |= (ResultPtr & ((1 << 14)-1)) << 2;
394 case PPC::reloc_absolute_high: // high bits of ref -> low 16 of instr
395 case PPC::reloc_absolute_low: { // low bits of ref -> low 16 of instr
396 ResultPtr += MR->getConstantVal();
398 // If this is a high-part access, get the high-part.
399 if (MR->getRelocationType() == PPC::reloc_absolute_high) {
400 // If the low part will have a carry (really a borrow) from the low
401 // 16-bits into the high 16, add a bit to borrow from.
402 if (((int)ResultPtr << 16) < 0)
403 ResultPtr += 1 << 16;
407 // Do the addition then mask, so the addition does not overflow the 16-bit
408 // immediate section of the instruction.
409 unsigned LowBits = (*RelocPos + ResultPtr) & 65535;
410 unsigned HighBits = *RelocPos & ~65535;
411 *RelocPos = LowBits | HighBits; // Slam into low 16-bits
414 case PPC::reloc_absolute_low_ix: { // low bits of ref -> low 14 of instr
415 ResultPtr += MR->getConstantVal();
416 // Do the addition then mask, so the addition does not overflow the 16-bit
417 // immediate section of the instruction.
418 unsigned LowBits = (*RelocPos + ResultPtr) & 0xFFFC;
419 unsigned HighBits = *RelocPos & 0xFFFF0003;
420 *RelocPos = LowBits | HighBits; // Slam into low 14-bits.
427 void PPCJITInfo::replaceMachineCodeForFunction(void *Old, void *New) {
428 EmitBranchToAt((intptr_t)Old, (intptr_t)New, false, is64Bit);