1 //===- PPCRegisterInfo.h - PowerPC Register Information Impl -----*- C++ -*-==//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the PowerPC implementation of the TargetRegisterInfo
13 //===----------------------------------------------------------------------===//
15 #ifndef POWERPC32_REGISTERINFO_H
16 #define POWERPC32_REGISTERINFO_H
19 #include "PPCGenRegisterInfo.h.inc"
24 class TargetInstrInfo;
27 class PPCRegisterInfo : public PPCGenRegisterInfo {
28 std::map<unsigned, unsigned> ImmToIdxMap;
29 const PPCSubtarget &Subtarget;
30 const TargetInstrInfo &TII;
32 PPCRegisterInfo(const PPCSubtarget &SubTarget, const TargetInstrInfo &tii);
34 /// getRegisterNumbering - Given the enum value for some register, e.g.
35 /// PPC::F14, return the number that it corresponds to (e.g. 14).
36 static unsigned getRegisterNumbering(unsigned RegEnum);
38 /// getPointerRegClass - Return the register class to use to hold pointers.
39 /// This is used for addressing modes.
40 virtual const TargetRegisterClass *getPointerRegClass(unsigned Kind=0) const;
42 /// Code Generation virtual methods...
43 const unsigned *getCalleeSavedRegs(const MachineFunction* MF = 0) const;
45 BitVector getReservedRegs(const MachineFunction &MF) const;
47 /// requiresRegisterScavenging - We require a register scavenger.
48 /// FIXME (64-bit): Should be inlined.
49 bool requiresRegisterScavenging(const MachineFunction &MF) const;
51 void eliminateCallFramePseudoInstr(MachineFunction &MF,
52 MachineBasicBlock &MBB,
53 MachineBasicBlock::iterator I) const;
55 void lowerDynamicAlloc(MachineBasicBlock::iterator II,
56 int SPAdj, RegScavenger *RS) const;
57 void lowerCRSpilling(MachineBasicBlock::iterator II, unsigned FrameIndex,
58 int SPAdj, RegScavenger *RS) const;
59 void eliminateFrameIndex(MachineBasicBlock::iterator II,
60 int SPAdj, RegScavenger *RS = NULL) const;
62 // Debug information queries.
63 unsigned getRARegister() const;
64 unsigned getFrameRegister(const MachineFunction &MF) const;
66 // Exception handling queries.
67 unsigned getEHExceptionRegister() const;
68 unsigned getEHHandlerRegister() const;
70 int getDwarfRegNum(unsigned RegNum, bool isEH) const;
73 } // end namespace llvm