1 //===-- PowerPCSubtarget.cpp - PPC Subtarget Information ------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the PPC specific subclass of TargetSubtargetInfo.
12 //===----------------------------------------------------------------------===//
14 #include "PPCSubtarget.h"
16 #include "PPCRegisterInfo.h"
17 #include "llvm/CodeGen/MachineFunction.h"
18 #include "llvm/CodeGen/MachineScheduler.h"
19 #include "llvm/IR/Attributes.h"
20 #include "llvm/IR/Function.h"
21 #include "llvm/IR/GlobalValue.h"
22 #include "llvm/Support/Host.h"
23 #include "llvm/Support/TargetRegistry.h"
24 #include "llvm/Target/TargetMachine.h"
27 #define GET_SUBTARGETINFO_TARGET_DESC
28 #define GET_SUBTARGETINFO_CTOR
29 #include "PPCGenSubtargetInfo.inc"
33 PPCSubtarget::PPCSubtarget(const std::string &TT, const std::string &CPU,
34 const std::string &FS, bool is64Bit,
35 CodeGenOpt::Level OptLevel)
36 : PPCGenSubtargetInfo(TT, CPU, FS)
39 initializeEnvironment();
41 std::string FullFS = FS;
43 // At -O2 and above, track CR bits as individual registers.
44 if (OptLevel >= CodeGenOpt::Default) {
46 FullFS = "+crbits," + FullFS;
51 resetSubtargetFeatures(CPU, FullFS);
54 /// SetJITMode - This is called to inform the subtarget info that we are
55 /// producing code for the JIT.
56 void PPCSubtarget::SetJITMode() {
57 // JIT mode doesn't want lazy resolver stubs, it knows exactly where
58 // everything is. This matters for PPC64, which codegens in PIC mode without
60 HasLazyResolverStubs = false;
62 // Calls to external functions need to use indirect calls
63 IsJITCodeModel = true;
66 void PPCSubtarget::resetSubtargetFeatures(const MachineFunction *MF) {
67 AttributeSet FnAttrs = MF->getFunction()->getAttributes();
68 Attribute CPUAttr = FnAttrs.getAttribute(AttributeSet::FunctionIndex,
70 Attribute FSAttr = FnAttrs.getAttribute(AttributeSet::FunctionIndex,
73 !CPUAttr.hasAttribute(Attribute::None) ? CPUAttr.getValueAsString() : "";
75 !FSAttr.hasAttribute(Attribute::None) ? FSAttr.getValueAsString() : "";
77 initializeEnvironment();
78 resetSubtargetFeatures(CPU, FS);
82 void PPCSubtarget::initializeEnvironment() {
84 DarwinDirective = PPC::DIR_NONE;
86 Has64BitSupport = false;
106 DeprecatedMFTB = false;
107 DeprecatedDST = false;
108 HasLazyResolverStubs = false;
109 IsJITCodeModel = false;
112 void PPCSubtarget::resetSubtargetFeatures(StringRef CPU, StringRef FS) {
113 // Determine default and user specified characteristics
114 std::string CPUName = CPU;
117 #if (defined(__APPLE__) || defined(__linux__)) && \
118 (defined(__ppc__) || defined(__powerpc__))
119 if (CPUName == "generic")
120 CPUName = sys::getHostCPUName();
123 // Initialize scheduling itinerary for the specified CPU.
124 InstrItins = getInstrItineraryForCPU(CPUName);
126 // Make sure 64-bit features are available when CPUname is generic
127 std::string FullFS = FS;
129 // If we are generating code for ppc64, verify that options make sense.
131 Has64BitSupport = true;
132 // Silently force 64-bit register use on ppc64.
135 FullFS = "+64bit," + FullFS;
140 // Parse features string.
141 ParseSubtargetFeatures(CPUName, FullFS);
143 // If the user requested use of 64-bit regs, but the cpu selected doesn't
144 // support it, ignore.
145 if (use64BitRegs() && !has64BitSupport())
146 Use64BitRegs = false;
148 // Set up darwin-specific properties.
150 HasLazyResolverStubs = true;
152 // QPX requires a 32-byte aligned stack. Note that we need to do this if
153 // we're compiling for a BG/Q system regardless of whether or not QPX
154 // is enabled because external functions will assume this alignment.
155 if (hasQPX() || isBGQ())
158 // Determine endianness.
159 IsLittleEndian = (TargetTriple.getArch() == Triple::ppc64le);
162 /// hasLazyResolverStub - Return true if accesses to the specified global have
163 /// to go through a dyld lazy resolution stub. This means that an extra load
164 /// is required to get the address of the global.
165 bool PPCSubtarget::hasLazyResolverStub(const GlobalValue *GV,
166 const TargetMachine &TM) const {
167 // We never have stubs if HasLazyResolverStubs=false or if in static mode.
168 if (!HasLazyResolverStubs || TM.getRelocationModel() == Reloc::Static)
170 // If symbol visibility is hidden, the extra load is not needed if
171 // the symbol is definitely defined in the current translation unit.
172 bool isDecl = GV->isDeclaration() && !GV->isMaterializable();
173 if (GV->hasHiddenVisibility() && !isDecl && !GV->hasCommonLinkage())
175 return GV->hasWeakLinkage() || GV->hasLinkOnceLinkage() ||
176 GV->hasCommonLinkage() || isDecl;
179 bool PPCSubtarget::enablePostRAScheduler(
180 CodeGenOpt::Level OptLevel,
181 TargetSubtargetInfo::AntiDepBreakMode& Mode,
182 RegClassVector& CriticalPathRCs) const {
183 Mode = TargetSubtargetInfo::ANTIDEP_ALL;
185 CriticalPathRCs.clear();
188 CriticalPathRCs.push_back(&PPC::G8RCRegClass);
190 CriticalPathRCs.push_back(&PPC::GPRCRegClass);
192 return OptLevel >= CodeGenOpt::Default;
195 // Embedded cores need aggressive scheduling (and some others also benefit).
196 static bool needsAggressiveScheduling(unsigned Directive) {
198 default: return false;
201 case PPC::DIR_E500mc:
208 bool PPCSubtarget::enableMachineScheduler() const {
209 // Enable MI scheduling for the embedded cores.
210 // FIXME: Enable this for all cores (some additional modeling
211 // may be necessary).
212 return needsAggressiveScheduling(DarwinDirective);
215 void PPCSubtarget::overrideSchedPolicy(MachineSchedPolicy &Policy,
218 unsigned NumRegionInstrs) const {
219 if (needsAggressiveScheduling(DarwinDirective)) {
220 Policy.OnlyTopDown = false;
221 Policy.OnlyBottomUp = false;
224 // Spilling is generally expensive on all PPC cores, so always enable
225 // register-pressure tracking.
226 Policy.ShouldTrackPressure = true;
229 bool PPCSubtarget::useAA() const {
230 // Use AA during code generation for the embedded cores.
231 return needsAggressiveScheduling(DarwinDirective);