1 //===-- PowerPCSubtarget.cpp - PPC Subtarget Information ------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the PPC specific subclass of TargetSubtargetInfo.
12 //===----------------------------------------------------------------------===//
14 #include "PPCSubtarget.h"
16 #include "PPCRegisterInfo.h"
17 #include "llvm/CodeGen/MachineFunction.h"
18 #include "llvm/CodeGen/MachineScheduler.h"
19 #include "llvm/IR/Attributes.h"
20 #include "llvm/IR/Function.h"
21 #include "llvm/IR/GlobalValue.h"
22 #include "llvm/Support/Host.h"
23 #include "llvm/Support/TargetRegistry.h"
24 #include "llvm/Target/TargetMachine.h"
27 #define GET_SUBTARGETINFO_TARGET_DESC
28 #define GET_SUBTARGETINFO_CTOR
29 #include "PPCGenSubtargetInfo.inc"
33 PPCSubtarget::PPCSubtarget(const std::string &TT, const std::string &CPU,
34 const std::string &FS, bool is64Bit,
35 CodeGenOpt::Level OptLevel)
36 : PPCGenSubtargetInfo(TT, CPU, FS)
39 initializeEnvironment();
41 std::string FullFS = FS;
43 // At -O2 and above, track CR bits as individual registers.
44 if (OptLevel >= CodeGenOpt::Default) {
46 FullFS = "+crbits," + FullFS;
51 resetSubtargetFeatures(CPU, FullFS);
54 /// SetJITMode - This is called to inform the subtarget info that we are
55 /// producing code for the JIT.
56 void PPCSubtarget::SetJITMode() {
57 // JIT mode doesn't want lazy resolver stubs, it knows exactly where
58 // everything is. This matters for PPC64, which codegens in PIC mode without
60 HasLazyResolverStubs = false;
62 // Calls to external functions need to use indirect calls
63 IsJITCodeModel = true;
66 void PPCSubtarget::resetSubtargetFeatures(const MachineFunction *MF) {
67 AttributeSet FnAttrs = MF->getFunction()->getAttributes();
68 Attribute CPUAttr = FnAttrs.getAttribute(AttributeSet::FunctionIndex,
70 Attribute FSAttr = FnAttrs.getAttribute(AttributeSet::FunctionIndex,
73 !CPUAttr.hasAttribute(Attribute::None) ? CPUAttr.getValueAsString() : "";
75 !FSAttr.hasAttribute(Attribute::None) ? FSAttr.getValueAsString() : "";
77 initializeEnvironment();
78 resetSubtargetFeatures(CPU, FS);
82 void PPCSubtarget::initializeEnvironment() {
84 DarwinDirective = PPC::DIR_NONE;
86 Has64BitSupport = false;
107 DeprecatedMFTB = false;
108 DeprecatedDST = false;
109 HasLazyResolverStubs = false;
110 IsJITCodeModel = false;
113 void PPCSubtarget::resetSubtargetFeatures(StringRef CPU, StringRef FS) {
114 // Determine default and user specified characteristics
115 std::string CPUName = CPU;
118 #if (defined(__APPLE__) || defined(__linux__)) && \
119 (defined(__ppc__) || defined(__powerpc__))
120 if (CPUName == "generic")
121 CPUName = sys::getHostCPUName();
124 // Initialize scheduling itinerary for the specified CPU.
125 InstrItins = getInstrItineraryForCPU(CPUName);
127 // Make sure 64-bit features are available when CPUname is generic
128 std::string FullFS = FS;
130 // If we are generating code for ppc64, verify that options make sense.
132 Has64BitSupport = true;
133 // Silently force 64-bit register use on ppc64.
136 FullFS = "+64bit," + FullFS;
141 // Parse features string.
142 ParseSubtargetFeatures(CPUName, FullFS);
144 // If the user requested use of 64-bit regs, but the cpu selected doesn't
145 // support it, ignore.
146 if (use64BitRegs() && !has64BitSupport())
147 Use64BitRegs = false;
149 // Set up darwin-specific properties.
151 HasLazyResolverStubs = true;
153 // QPX requires a 32-byte aligned stack. Note that we need to do this if
154 // we're compiling for a BG/Q system regardless of whether or not QPX
155 // is enabled because external functions will assume this alignment.
156 if (hasQPX() || isBGQ())
159 // Determine endianness.
160 IsLittleEndian = (TargetTriple.getArch() == Triple::ppc64le);
163 /// hasLazyResolverStub - Return true if accesses to the specified global have
164 /// to go through a dyld lazy resolution stub. This means that an extra load
165 /// is required to get the address of the global.
166 bool PPCSubtarget::hasLazyResolverStub(const GlobalValue *GV,
167 const TargetMachine &TM) const {
168 // We never have stubs if HasLazyResolverStubs=false or if in static mode.
169 if (!HasLazyResolverStubs || TM.getRelocationModel() == Reloc::Static)
171 // If symbol visibility is hidden, the extra load is not needed if
172 // the symbol is definitely defined in the current translation unit.
173 bool isDecl = GV->isDeclaration() && !GV->isMaterializable();
174 if (GV->hasHiddenVisibility() && !isDecl && !GV->hasCommonLinkage())
176 return GV->hasWeakLinkage() || GV->hasLinkOnceLinkage() ||
177 GV->hasCommonLinkage() || isDecl;
180 bool PPCSubtarget::enablePostRAScheduler(
181 CodeGenOpt::Level OptLevel,
182 TargetSubtargetInfo::AntiDepBreakMode& Mode,
183 RegClassVector& CriticalPathRCs) const {
184 Mode = TargetSubtargetInfo::ANTIDEP_ALL;
186 CriticalPathRCs.clear();
189 CriticalPathRCs.push_back(&PPC::G8RCRegClass);
191 CriticalPathRCs.push_back(&PPC::GPRCRegClass);
193 return OptLevel >= CodeGenOpt::Default;
196 // Embedded cores need aggressive scheduling (and some others also benefit).
197 static bool needsAggressiveScheduling(unsigned Directive) {
199 default: return false;
202 case PPC::DIR_E500mc:
209 bool PPCSubtarget::enableMachineScheduler() const {
210 // Enable MI scheduling for the embedded cores.
211 // FIXME: Enable this for all cores (some additional modeling
212 // may be necessary).
213 return needsAggressiveScheduling(DarwinDirective);
216 void PPCSubtarget::overrideSchedPolicy(MachineSchedPolicy &Policy,
219 unsigned NumRegionInstrs) const {
220 if (needsAggressiveScheduling(DarwinDirective)) {
221 Policy.OnlyTopDown = false;
222 Policy.OnlyBottomUp = false;
225 // Spilling is generally expensive on all PPC cores, so always enable
226 // register-pressure tracking.
227 Policy.ShouldTrackPressure = true;
230 bool PPCSubtarget::useAA() const {
231 // Use AA during code generation for the embedded cores.
232 return needsAggressiveScheduling(DarwinDirective);