1 //===-- PPCSubtarget.h - Define Subtarget for the PPC ----------*- C++ -*--===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file declares the PowerPC specific subclass of TargetSubtargetInfo.
12 //===----------------------------------------------------------------------===//
14 #ifndef POWERPCSUBTARGET_H
15 #define POWERPCSUBTARGET_H
17 #include "PPCFrameLowering.h"
18 #include "llvm/ADT/Triple.h"
19 #include "llvm/MC/MCInstrItineraries.h"
20 #include "llvm/Target/TargetSubtargetInfo.h"
23 #define GET_SUBTARGETINFO_HEADER
24 #include "PPCGenSubtargetInfo.inc"
26 // GCC #defines PPC on Linux but we use it as our namespace name
33 // -m directive values.
61 class PPCSubtarget : public PPCGenSubtargetInfo {
63 /// stackAlignment - The minimum alignment known to hold of the stack frame on
64 /// entry to the function and which must be maintained by every function.
65 unsigned StackAlignment;
67 /// Selected instruction itineraries (one entry per itinerary class.)
68 InstrItineraryData InstrItins;
70 /// Which cpu directive was used.
71 unsigned DarwinDirective;
73 /// Used by the ISel to turn in optimizations for POWER4-derived architectures
84 bool HasFRE, HasFRES, HasFRSQRTE, HasFRSQRTES;
96 bool HasLazyResolverStubs;
100 /// TargetTriple - What processor and OS we're targeting.
103 /// OptLevel - What default optimization level we're emitting code for.
104 CodeGenOpt::Level OptLevel;
106 PPCFrameLowering FrameLowering;
108 /// This constructor initializes the data members to match that
109 /// of the specified triple.
111 PPCSubtarget(const std::string &TT, const std::string &CPU,
112 const std::string &FS, bool is64Bit,
113 CodeGenOpt::Level OptLevel);
115 /// ParseSubtargetFeatures - Parses features string setting specified
116 /// subtarget options. Definition of function is auto generated by tblgen.
117 void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
119 /// SetJITMode - This is called to inform the subtarget info that we are
120 /// producing code for the JIT.
123 /// getStackAlignment - Returns the minimum alignment known to hold of the
124 /// stack frame on entry to the function and which must be maintained by every
125 /// function for this subtarget.
126 unsigned getStackAlignment() const { return StackAlignment; }
128 /// getDarwinDirective - Returns the -m directive specified for the cpu.
130 unsigned getDarwinDirective() const { return DarwinDirective; }
132 /// getInstrItins - Return the instruction itineraies based on subtarget
134 const InstrItineraryData &getInstrItineraryData() const { return InstrItins; }
136 const PPCFrameLowering *getFrameLowering() const { return &FrameLowering; }
138 /// initializeSubtargetDependencies - Initializes using a CPU and feature string
139 /// so that we can use initializer lists for subtarget initialization.
140 PPCSubtarget &initializeSubtargetDependencies(StringRef CPU, StringRef FS);
142 /// \brief Reset the features for the PowerPC target.
143 void resetSubtargetFeatures(const MachineFunction *MF) override;
145 void initializeEnvironment();
146 void resetSubtargetFeatures(StringRef CPU, StringRef FS);
149 /// isPPC64 - Return true if we are generating code for 64-bit pointer mode.
151 bool isPPC64() const { return IsPPC64; }
153 /// has64BitSupport - Return true if the selected CPU supports 64-bit
154 /// instructions, regardless of whether we are in 32-bit or 64-bit mode.
155 bool has64BitSupport() const { return Has64BitSupport; }
157 /// use64BitRegs - Return true if in 64-bit mode or if we should use 64-bit
158 /// registers in 32-bit mode when possible. This can only true if
159 /// has64BitSupport() returns true.
160 bool use64BitRegs() const { return Use64BitRegs; }
162 /// useCRBits - Return true if we should store and manipulate i1 values in
163 /// the individual condition register bits.
164 bool useCRBits() const { return UseCRBits; }
166 /// hasLazyResolverStub - Return true if accesses to the specified global have
167 /// to go through a dyld lazy resolution stub. This means that an extra load
168 /// is required to get the address of the global.
169 bool hasLazyResolverStub(const GlobalValue *GV,
170 const TargetMachine &TM) const;
172 // isJITCodeModel - True if we're generating code for the JIT
173 bool isJITCodeModel() const { return IsJITCodeModel; }
175 // isLittleEndian - True if generating little-endian code
176 bool isLittleEndian() const { return IsLittleEndian; }
178 // Specific obvious features.
179 bool hasFCPSGN() const { return HasFCPSGN; }
180 bool hasFSQRT() const { return HasFSQRT; }
181 bool hasFRE() const { return HasFRE; }
182 bool hasFRES() const { return HasFRES; }
183 bool hasFRSQRTE() const { return HasFRSQRTE; }
184 bool hasFRSQRTES() const { return HasFRSQRTES; }
185 bool hasRecipPrec() const { return HasRecipPrec; }
186 bool hasSTFIWX() const { return HasSTFIWX; }
187 bool hasLFIWAX() const { return HasLFIWAX; }
188 bool hasFPRND() const { return HasFPRND; }
189 bool hasFPCVT() const { return HasFPCVT; }
190 bool hasAltivec() const { return HasAltivec; }
191 bool hasQPX() const { return HasQPX; }
192 bool hasVSX() const { return HasVSX; }
193 bool hasMFOCRF() const { return HasMFOCRF; }
194 bool hasISEL() const { return HasISEL; }
195 bool hasPOPCNTD() const { return HasPOPCNTD; }
196 bool hasLDBRX() const { return HasLDBRX; }
197 bool isBookE() const { return IsBookE; }
198 bool isDeprecatedMFTB() const { return DeprecatedMFTB; }
199 bool isDeprecatedDST() const { return DeprecatedDST; }
201 const Triple &getTargetTriple() const { return TargetTriple; }
203 /// isDarwin - True if this is any darwin platform.
204 bool isDarwin() const { return TargetTriple.isMacOSX(); }
205 /// isBGQ - True if this is a BG/Q platform.
206 bool isBGQ() const { return TargetTriple.getVendor() == Triple::BGQ; }
208 bool isDarwinABI() const { return isDarwin(); }
209 bool isSVR4ABI() const { return !isDarwin(); }
211 /// enablePostRAScheduler - True at 'More' optimization.
212 bool enablePostRAScheduler(CodeGenOpt::Level OptLevel,
213 TargetSubtargetInfo::AntiDepBreakMode& Mode,
214 RegClassVector& CriticalPathRCs) const override;
216 bool enableEarlyIfConversion() const override { return hasISEL(); }
218 // Scheduling customization.
219 bool enableMachineScheduler() const override;
220 void overrideSchedPolicy(MachineSchedPolicy &Policy,
223 unsigned NumRegionInstrs) const override;
224 bool useAA() const override;
226 } // End llvm namespace