1 //===-- PPCSubtarget.h - Define Subtarget for the PPC ----------*- C++ -*--===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file declares the PowerPC specific subclass of TargetSubtargetInfo.
12 //===----------------------------------------------------------------------===//
14 #ifndef POWERPCSUBTARGET_H
15 #define POWERPCSUBTARGET_H
17 #include "PPCFrameLowering.h"
18 #include "PPCInstrInfo.h"
19 #include "PPCISelLowering.h"
20 #include "PPCJITInfo.h"
21 #include "llvm/ADT/Triple.h"
22 #include "llvm/IR/DataLayout.h"
23 #include "llvm/MC/MCInstrItineraries.h"
24 #include "llvm/Target/TargetSubtargetInfo.h"
27 #define GET_SUBTARGETINFO_HEADER
28 #include "PPCGenSubtargetInfo.inc"
30 // GCC #defines PPC on Linux but we use it as our namespace name
37 // -m directive values.
65 class PPCSubtarget : public PPCGenSubtargetInfo {
67 /// stackAlignment - The minimum alignment known to hold of the stack frame on
68 /// entry to the function and which must be maintained by every function.
69 unsigned StackAlignment;
71 /// Selected instruction itineraries (one entry per itinerary class.)
72 InstrItineraryData InstrItins;
74 /// Which cpu directive was used.
75 unsigned DarwinDirective;
77 /// Used by the ISel to turn in optimizations for POWER4-derived architectures
88 bool HasFRE, HasFRES, HasFRSQRTE, HasFRSQRTES;
100 bool HasLazyResolverStubs;
104 /// TargetTriple - What processor and OS we're targeting.
107 /// OptLevel - What default optimization level we're emitting code for.
108 CodeGenOpt::Level OptLevel;
110 PPCFrameLowering FrameLowering;
112 PPCInstrInfo InstrInfo;
114 PPCTargetLowering TLInfo;
117 /// This constructor initializes the data members to match that
118 /// of the specified triple.
120 PPCSubtarget(const std::string &TT, const std::string &CPU,
121 const std::string &FS, PPCTargetMachine &TM, bool is64Bit,
122 CodeGenOpt::Level OptLevel);
124 /// ParseSubtargetFeatures - Parses features string setting specified
125 /// subtarget options. Definition of function is auto generated by tblgen.
126 void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
128 /// SetJITMode - This is called to inform the subtarget info that we are
129 /// producing code for the JIT.
132 /// getStackAlignment - Returns the minimum alignment known to hold of the
133 /// stack frame on entry to the function and which must be maintained by every
134 /// function for this subtarget.
135 unsigned getStackAlignment() const { return StackAlignment; }
137 /// getDarwinDirective - Returns the -m directive specified for the cpu.
139 unsigned getDarwinDirective() const { return DarwinDirective; }
141 /// getInstrItins - Return the instruction itineraies based on subtarget
143 const InstrItineraryData &getInstrItineraryData() const { return InstrItins; }
145 const PPCFrameLowering *getFrameLowering() const { return &FrameLowering; }
146 const DataLayout *getDataLayout() const { return &DL; }
147 const PPCInstrInfo *getInstrInfo() const { return &InstrInfo; }
148 PPCJITInfo *getJITInfo() { return &JITInfo; }
149 const PPCTargetLowering *getTargetLowering() const { return &TLInfo; }
151 /// initializeSubtargetDependencies - Initializes using a CPU and feature string
152 /// so that we can use initializer lists for subtarget initialization.
153 PPCSubtarget &initializeSubtargetDependencies(StringRef CPU, StringRef FS);
155 /// \brief Reset the features for the PowerPC target.
156 void resetSubtargetFeatures(const MachineFunction *MF) override;
158 void initializeEnvironment();
159 void resetSubtargetFeatures(StringRef CPU, StringRef FS);
162 /// isPPC64 - Return true if we are generating code for 64-bit pointer mode.
164 bool isPPC64() const { return IsPPC64; }
166 /// has64BitSupport - Return true if the selected CPU supports 64-bit
167 /// instructions, regardless of whether we are in 32-bit or 64-bit mode.
168 bool has64BitSupport() const { return Has64BitSupport; }
170 /// use64BitRegs - Return true if in 64-bit mode or if we should use 64-bit
171 /// registers in 32-bit mode when possible. This can only true if
172 /// has64BitSupport() returns true.
173 bool use64BitRegs() const { return Use64BitRegs; }
175 /// useCRBits - Return true if we should store and manipulate i1 values in
176 /// the individual condition register bits.
177 bool useCRBits() const { return UseCRBits; }
179 /// hasLazyResolverStub - Return true if accesses to the specified global have
180 /// to go through a dyld lazy resolution stub. This means that an extra load
181 /// is required to get the address of the global.
182 bool hasLazyResolverStub(const GlobalValue *GV,
183 const TargetMachine &TM) const;
185 // isJITCodeModel - True if we're generating code for the JIT
186 bool isJITCodeModel() const { return IsJITCodeModel; }
188 // isLittleEndian - True if generating little-endian code
189 bool isLittleEndian() const { return IsLittleEndian; }
191 // Specific obvious features.
192 bool hasFCPSGN() const { return HasFCPSGN; }
193 bool hasFSQRT() const { return HasFSQRT; }
194 bool hasFRE() const { return HasFRE; }
195 bool hasFRES() const { return HasFRES; }
196 bool hasFRSQRTE() const { return HasFRSQRTE; }
197 bool hasFRSQRTES() const { return HasFRSQRTES; }
198 bool hasRecipPrec() const { return HasRecipPrec; }
199 bool hasSTFIWX() const { return HasSTFIWX; }
200 bool hasLFIWAX() const { return HasLFIWAX; }
201 bool hasFPRND() const { return HasFPRND; }
202 bool hasFPCVT() const { return HasFPCVT; }
203 bool hasAltivec() const { return HasAltivec; }
204 bool hasQPX() const { return HasQPX; }
205 bool hasVSX() const { return HasVSX; }
206 bool hasMFOCRF() const { return HasMFOCRF; }
207 bool hasISEL() const { return HasISEL; }
208 bool hasPOPCNTD() const { return HasPOPCNTD; }
209 bool hasLDBRX() const { return HasLDBRX; }
210 bool isBookE() const { return IsBookE; }
211 bool isDeprecatedMFTB() const { return DeprecatedMFTB; }
212 bool isDeprecatedDST() const { return DeprecatedDST; }
214 const Triple &getTargetTriple() const { return TargetTriple; }
216 /// isDarwin - True if this is any darwin platform.
217 bool isDarwin() const { return TargetTriple.isMacOSX(); }
218 /// isBGQ - True if this is a BG/Q platform.
219 bool isBGQ() const { return TargetTriple.getVendor() == Triple::BGQ; }
221 bool isDarwinABI() const { return isDarwin(); }
222 bool isSVR4ABI() const { return !isDarwin(); }
224 /// enablePostRAScheduler - True at 'More' optimization.
225 bool enablePostRAScheduler(CodeGenOpt::Level OptLevel,
226 TargetSubtargetInfo::AntiDepBreakMode& Mode,
227 RegClassVector& CriticalPathRCs) const override;
229 bool enableEarlyIfConversion() const override { return hasISEL(); }
231 // Scheduling customization.
232 bool enableMachineScheduler() const override;
233 void overrideSchedPolicy(MachineSchedPolicy &Policy,
236 unsigned NumRegionInstrs) const override;
237 bool useAA() const override;
239 } // End llvm namespace