1 //===-- PPCSubtarget.h - Define Subtarget for the PPC ----------*- C++ -*--===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file declares the PowerPC specific subclass of TargetSubtargetInfo.
12 //===----------------------------------------------------------------------===//
14 #ifndef POWERPCSUBTARGET_H
15 #define POWERPCSUBTARGET_H
17 #include "PPCFrameLowering.h"
18 #include "PPCInstrInfo.h"
19 #include "llvm/ADT/Triple.h"
20 #include "llvm/IR/DataLayout.h"
21 #include "llvm/MC/MCInstrItineraries.h"
22 #include "llvm/Target/TargetSubtargetInfo.h"
25 #define GET_SUBTARGETINFO_HEADER
26 #include "PPCGenSubtargetInfo.inc"
28 // GCC #defines PPC on Linux but we use it as our namespace name
35 // -m directive values.
63 class PPCSubtarget : public PPCGenSubtargetInfo {
65 /// stackAlignment - The minimum alignment known to hold of the stack frame on
66 /// entry to the function and which must be maintained by every function.
67 unsigned StackAlignment;
69 /// Selected instruction itineraries (one entry per itinerary class.)
70 InstrItineraryData InstrItins;
72 /// Which cpu directive was used.
73 unsigned DarwinDirective;
75 /// Used by the ISel to turn in optimizations for POWER4-derived architectures
86 bool HasFRE, HasFRES, HasFRSQRTE, HasFRSQRTES;
98 bool HasLazyResolverStubs;
102 /// TargetTriple - What processor and OS we're targeting.
105 /// OptLevel - What default optimization level we're emitting code for.
106 CodeGenOpt::Level OptLevel;
108 PPCFrameLowering FrameLowering;
110 PPCInstrInfo InstrInfo;
113 /// This constructor initializes the data members to match that
114 /// of the specified triple.
116 PPCSubtarget(const std::string &TT, const std::string &CPU,
117 const std::string &FS, bool is64Bit,
118 CodeGenOpt::Level OptLevel);
120 /// ParseSubtargetFeatures - Parses features string setting specified
121 /// subtarget options. Definition of function is auto generated by tblgen.
122 void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
124 /// SetJITMode - This is called to inform the subtarget info that we are
125 /// producing code for the JIT.
128 /// getStackAlignment - Returns the minimum alignment known to hold of the
129 /// stack frame on entry to the function and which must be maintained by every
130 /// function for this subtarget.
131 unsigned getStackAlignment() const { return StackAlignment; }
133 /// getDarwinDirective - Returns the -m directive specified for the cpu.
135 unsigned getDarwinDirective() const { return DarwinDirective; }
137 /// getInstrItins - Return the instruction itineraies based on subtarget
139 const InstrItineraryData &getInstrItineraryData() const { return InstrItins; }
141 const PPCFrameLowering *getFrameLowering() const { return &FrameLowering; }
142 const DataLayout *getDataLayout() const { return &DL; }
143 const PPCInstrInfo *getInstrInfo() const { return &InstrInfo; }
145 /// initializeSubtargetDependencies - Initializes using a CPU and feature string
146 /// so that we can use initializer lists for subtarget initialization.
147 PPCSubtarget &initializeSubtargetDependencies(StringRef CPU, StringRef FS);
149 /// \brief Reset the features for the PowerPC target.
150 void resetSubtargetFeatures(const MachineFunction *MF) override;
152 void initializeEnvironment();
153 void resetSubtargetFeatures(StringRef CPU, StringRef FS);
156 /// isPPC64 - Return true if we are generating code for 64-bit pointer mode.
158 bool isPPC64() const { return IsPPC64; }
160 /// has64BitSupport - Return true if the selected CPU supports 64-bit
161 /// instructions, regardless of whether we are in 32-bit or 64-bit mode.
162 bool has64BitSupport() const { return Has64BitSupport; }
164 /// use64BitRegs - Return true if in 64-bit mode or if we should use 64-bit
165 /// registers in 32-bit mode when possible. This can only true if
166 /// has64BitSupport() returns true.
167 bool use64BitRegs() const { return Use64BitRegs; }
169 /// useCRBits - Return true if we should store and manipulate i1 values in
170 /// the individual condition register bits.
171 bool useCRBits() const { return UseCRBits; }
173 /// hasLazyResolverStub - Return true if accesses to the specified global have
174 /// to go through a dyld lazy resolution stub. This means that an extra load
175 /// is required to get the address of the global.
176 bool hasLazyResolverStub(const GlobalValue *GV,
177 const TargetMachine &TM) const;
179 // isJITCodeModel - True if we're generating code for the JIT
180 bool isJITCodeModel() const { return IsJITCodeModel; }
182 // isLittleEndian - True if generating little-endian code
183 bool isLittleEndian() const { return IsLittleEndian; }
185 // Specific obvious features.
186 bool hasFCPSGN() const { return HasFCPSGN; }
187 bool hasFSQRT() const { return HasFSQRT; }
188 bool hasFRE() const { return HasFRE; }
189 bool hasFRES() const { return HasFRES; }
190 bool hasFRSQRTE() const { return HasFRSQRTE; }
191 bool hasFRSQRTES() const { return HasFRSQRTES; }
192 bool hasRecipPrec() const { return HasRecipPrec; }
193 bool hasSTFIWX() const { return HasSTFIWX; }
194 bool hasLFIWAX() const { return HasLFIWAX; }
195 bool hasFPRND() const { return HasFPRND; }
196 bool hasFPCVT() const { return HasFPCVT; }
197 bool hasAltivec() const { return HasAltivec; }
198 bool hasQPX() const { return HasQPX; }
199 bool hasVSX() const { return HasVSX; }
200 bool hasMFOCRF() const { return HasMFOCRF; }
201 bool hasISEL() const { return HasISEL; }
202 bool hasPOPCNTD() const { return HasPOPCNTD; }
203 bool hasLDBRX() const { return HasLDBRX; }
204 bool isBookE() const { return IsBookE; }
205 bool isDeprecatedMFTB() const { return DeprecatedMFTB; }
206 bool isDeprecatedDST() const { return DeprecatedDST; }
208 const Triple &getTargetTriple() const { return TargetTriple; }
210 /// isDarwin - True if this is any darwin platform.
211 bool isDarwin() const { return TargetTriple.isMacOSX(); }
212 /// isBGQ - True if this is a BG/Q platform.
213 bool isBGQ() const { return TargetTriple.getVendor() == Triple::BGQ; }
215 bool isDarwinABI() const { return isDarwin(); }
216 bool isSVR4ABI() const { return !isDarwin(); }
218 /// enablePostRAScheduler - True at 'More' optimization.
219 bool enablePostRAScheduler(CodeGenOpt::Level OptLevel,
220 TargetSubtargetInfo::AntiDepBreakMode& Mode,
221 RegClassVector& CriticalPathRCs) const override;
223 bool enableEarlyIfConversion() const override { return hasISEL(); }
225 // Scheduling customization.
226 bool enableMachineScheduler() const override;
227 void overrideSchedPolicy(MachineSchedPolicy &Policy,
230 unsigned NumRegionInstrs) const override;
231 bool useAA() const override;
233 } // End llvm namespace