1 //===-- PowerPCTargetMachine.cpp - Define TargetMachine for PowerPC -------===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // Top-level implementation for the PowerPC target.
12 //===----------------------------------------------------------------------===//
15 #include "PowerPCTargetMachine.h"
16 #include "PowerPCFrameInfo.h"
17 #include "PPC32TargetMachine.h"
18 #include "PPC32JITInfo.h"
19 #include "llvm/Module.h"
20 #include "llvm/PassManager.h"
21 #include "llvm/Analysis/Verifier.h"
22 #include "llvm/CodeGen/IntrinsicLowering.h"
23 #include "llvm/CodeGen/MachineFunction.h"
24 #include "llvm/CodeGen/Passes.h"
25 #include "llvm/Target/TargetOptions.h"
26 #include "llvm/Target/TargetMachineRegistry.h"
27 #include "llvm/Transforms/Scalar.h"
28 #include "llvm/Support/CommandLine.h"
33 const char *PPC32ID = "PowerPC/32bit";
35 static cl::opt<bool> EnablePPCDAGDAG("enable-ppc-dag-isel", cl::Hidden,
36 cl::desc("Enable DAG-to-DAG isel for PPC (beta)"));
38 // Register the targets
39 RegisterTarget<PPC32TargetMachine>
40 X("ppc32", " PowerPC 32-bit");
43 PowerPCTargetMachine::PowerPCTargetMachine(const std::string &name,
44 IntrinsicLowering *IL,
47 const PowerPCFrameInfo &TFI)
48 : TargetMachine(name, IL, TD), FrameInfo(TFI), Subtarget(M) {
49 if (TargetDefault == PPCTarget) {
50 if (Subtarget.isAIX()) PPCTarget = TargetAIX;
51 if (Subtarget.isDarwin()) PPCTarget = TargetDarwin;
55 unsigned PPC32TargetMachine::getJITMatchQuality() {
56 #if defined(__POWERPC__) || defined (__ppc__) || defined(_POWER)
63 /// addPassesToEmitFile - Add passes to the specified pass manager to implement
64 /// a static compiler for this target.
66 bool PowerPCTargetMachine::addPassesToEmitFile(PassManager &PM,
68 CodeGenFileType FileType) {
69 if (FileType != TargetMachine::AssemblyFile) return true;
71 // Run loop strength reduction before anything else.
72 PM.add(createLoopStrengthReducePass());
73 PM.add(createCFGSimplificationPass());
75 // FIXME: Implement efficient support for garbage collection intrinsics.
76 PM.add(createLowerGCPass());
78 // FIXME: Implement the invoke/unwind instructions!
79 PM.add(createLowerInvokePass());
81 // FIXME: Implement the switch instruction in the instruction selector!
82 PM.add(createLowerSwitchPass());
84 // Make sure that no unreachable blocks are instruction selected.
85 PM.add(createUnreachableBlockEliminationPass());
87 // Install an instruction selector.
88 if (EnablePPCDAGDAG) {
89 PM.add(createPPC32ISelDag(*this));
91 } else if (PatternISelTriState == 0) {
92 PM.add(createLowerConstantExpressionsPass());
93 PM.add(createPPC32ISelSimple(*this));
95 PM.add(createPPC32ISelPattern(*this));
98 PM.add(createMachineFunctionPrinterPass(&std::cerr));
100 PM.add(createRegisterAllocator());
102 if (PrintMachineCode)
103 PM.add(createMachineFunctionPrinterPass(&std::cerr));
105 PM.add(createPrologEpilogCodeInserter());
107 // Must run branch selection immediately preceding the asm printer
108 PM.add(createPPCBranchSelectionPass());
110 // Decide which asm printer to use. If the user has not specified one on
111 // the command line, choose whichever one matches the default (current host).
114 PM.add(createAIXAsmPrinter(Out, *this));
118 PM.add(createDarwinAsmPrinter(Out, *this));
122 PM.add(createMachineCodeDeleter());
126 void PowerPCJITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
127 // The JIT does not support or need PIC.
130 // Run loop strength reduction before anything else.
131 PM.add(createLoopStrengthReducePass());
132 PM.add(createCFGSimplificationPass());
134 // FIXME: Implement efficient support for garbage collection intrinsics.
135 PM.add(createLowerGCPass());
137 // FIXME: Implement the invoke/unwind instructions!
138 PM.add(createLowerInvokePass());
140 // FIXME: Implement the switch instruction in the instruction selector!
141 PM.add(createLowerSwitchPass());
143 // Make sure that no unreachable blocks are instruction selected.
144 PM.add(createUnreachableBlockEliminationPass());
146 // Default to pattern ISel
147 if (PatternISelTriState == 0) {
148 PM.add(createLowerConstantExpressionsPass());
149 PM.add(createPPC32ISelSimple(TM));
151 PM.add(createPPC32ISelPattern(TM));
154 PM.add(createRegisterAllocator());
155 PM.add(createPrologEpilogCodeInserter());
157 // Must run branch selection immediately preceding the asm printer
158 PM.add(createPPCBranchSelectionPass());
160 if (PrintMachineCode)
161 PM.add(createMachineFunctionPrinterPass(&std::cerr));
164 /// PowerPCTargetMachine ctor - Create an ILP32 architecture model
166 PPC32TargetMachine::PPC32TargetMachine(const Module &M, IntrinsicLowering *IL)
167 : PowerPCTargetMachine(PPC32ID, IL, M,
168 TargetData(PPC32ID,false,4,4,4,4,4,4,2,1,1),
169 PowerPCFrameInfo(*this, false)), JITInfo(*this) {}
171 unsigned PPC32TargetMachine::getModuleMatchQuality(const Module &M) {
172 // We strongly match "powerpc-*".
173 std::string TT = M.getTargetTriple();
174 if (TT.size() >= 8 && std::string(TT.begin(), TT.begin()+8) == "powerpc-")
177 if (M.getEndianness() == Module::BigEndian &&
178 M.getPointerSize() == Module::Pointer32)
179 return 10; // Weak match
180 else if (M.getEndianness() != Module::AnyEndianness ||
181 M.getPointerSize() != Module::AnyPointerSize)
182 return 0; // Match for some other target
184 return getJITMatchQuality()/2;