1 //===-- PPCTargetMachine.cpp - Define TargetMachine for PowerPC -----------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // Top-level implementation for the PowerPC target.
12 //===----------------------------------------------------------------------===//
15 #include "PPCTargetAsmInfo.h"
16 #include "PPCTargetMachine.h"
17 #include "llvm/Module.h"
18 #include "llvm/PassManager.h"
19 #include "llvm/Target/TargetMachineRegistry.h"
20 #include "llvm/Target/TargetOptions.h"
21 #include "llvm/Support/raw_ostream.h"
24 // Register the targets
25 static RegisterTarget<PPC32TargetMachine>
26 X("ppc32", " PowerPC 32");
27 static RegisterTarget<PPC64TargetMachine>
28 Y("ppc64", " PowerPC 64");
30 // No assembler printer by default
31 PPCTargetMachine::AsmPrinterCtorFn PPCTargetMachine::AsmPrinterCtor = 0;
33 const TargetAsmInfo *PPCTargetMachine::createTargetAsmInfo() const {
34 if (Subtarget.isDarwin())
35 return new PPCDarwinTargetAsmInfo(*this);
37 return new PPCLinuxTargetAsmInfo(*this);
40 unsigned PPC32TargetMachine::getJITMatchQuality() {
41 #if defined(__POWERPC__) || defined (__ppc__) || defined(_POWER) || defined(__PPC__)
42 if (sizeof(void*) == 4)
47 unsigned PPC64TargetMachine::getJITMatchQuality() {
48 #if defined(__POWERPC__) || defined (__ppc__) || defined(_POWER) || defined(__PPC__)
49 if (sizeof(void*) == 8)
55 unsigned PPC32TargetMachine::getModuleMatchQuality(const Module &M) {
56 // We strongly match "powerpc-*".
57 std::string TT = M.getTargetTriple();
58 if (TT.size() >= 8 && std::string(TT.begin(), TT.begin()+8) == "powerpc-")
61 // If the target triple is something non-powerpc, we don't match.
62 if (!TT.empty()) return 0;
64 if (M.getEndianness() == Module::BigEndian &&
65 M.getPointerSize() == Module::Pointer32)
66 return 10; // Weak match
67 else if (M.getEndianness() != Module::AnyEndianness ||
68 M.getPointerSize() != Module::AnyPointerSize)
69 return 0; // Match for some other target
71 return getJITMatchQuality()/2;
74 unsigned PPC64TargetMachine::getModuleMatchQuality(const Module &M) {
75 // We strongly match "powerpc64-*".
76 std::string TT = M.getTargetTriple();
77 if (TT.size() >= 10 && std::string(TT.begin(), TT.begin()+10) == "powerpc64-")
80 if (M.getEndianness() == Module::BigEndian &&
81 M.getPointerSize() == Module::Pointer64)
82 return 10; // Weak match
83 else if (M.getEndianness() != Module::AnyEndianness ||
84 M.getPointerSize() != Module::AnyPointerSize)
85 return 0; // Match for some other target
87 return getJITMatchQuality()/2;
91 PPCTargetMachine::PPCTargetMachine(const Module &M, const std::string &FS,
93 : Subtarget(*this, M, FS, is64Bit),
94 DataLayout(Subtarget.getTargetDataString()), InstrInfo(*this),
95 FrameInfo(*this, is64Bit), JITInfo(*this, is64Bit), TLInfo(*this),
96 InstrItins(Subtarget.getInstrItineraryData()), MachOWriterInfo(*this) {
98 if (getRelocationModel() == Reloc::Default) {
99 if (Subtarget.isDarwin())
100 setRelocationModel(Reloc::DynamicNoPIC);
102 setRelocationModel(Reloc::Static);
106 /// Override this for PowerPC. Tail merging happily breaks up instruction issue
107 /// groups, which typically degrades performance.
108 bool PPCTargetMachine::getEnableTailMergeDefault() const { return false; }
110 PPC32TargetMachine::PPC32TargetMachine(const Module &M, const std::string &FS)
111 : PPCTargetMachine(M, FS, false) {
115 PPC64TargetMachine::PPC64TargetMachine(const Module &M, const std::string &FS)
116 : PPCTargetMachine(M, FS, true) {
120 //===----------------------------------------------------------------------===//
121 // Pass Pipeline Configuration
122 //===----------------------------------------------------------------------===//
124 bool PPCTargetMachine::addInstSelector(PassManagerBase &PM, bool Fast) {
125 // Install an instruction selector.
126 PM.add(createPPCISelDag(*this));
130 bool PPCTargetMachine::addPreEmitPass(PassManagerBase &PM, bool Fast) {
132 // Must run branch selection immediately preceding the asm printer.
133 PM.add(createPPCBranchSelectionPass());
137 bool PPCTargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast,
139 assert(AsmPrinterCtor && "AsmPrinter was not linked in");
141 PM.add(AsmPrinterCtor(Out, *this));
146 bool PPCTargetMachine::addCodeEmitter(PassManagerBase &PM, bool Fast,
147 bool DumpAsm, MachineCodeEmitter &MCE) {
148 // The JIT should use the static relocation model in ppc32 mode, PIC in ppc64.
149 // FIXME: This should be moved to TargetJITInfo!!
150 if (Subtarget.isPPC64()) {
151 // We use PIC codegen in ppc64 mode, because otherwise we'd have to use many
152 // instructions to materialize arbitrary global variable + function +
153 // constant pool addresses.
154 setRelocationModel(Reloc::PIC_);
155 // Temporary workaround for the inability of PPC64 JIT to handle jump
157 DisableJumpTables = true;
159 setRelocationModel(Reloc::Static);
162 // Inform the subtarget that we are in JIT mode. FIXME: does this break macho
164 Subtarget.SetJITMode();
166 // Machine code emitter pass for PowerPC.
167 PM.add(createPPCCodeEmitterPass(*this, MCE));
169 assert(AsmPrinterCtor && "AsmPrinter was not linked in");
171 PM.add(AsmPrinterCtor(errs(), *this));
177 bool PPCTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM, bool Fast,
178 bool DumpAsm, MachineCodeEmitter &MCE) {
179 // Machine code emitter pass for PowerPC.
180 PM.add(createPPCCodeEmitterPass(*this, MCE));
182 assert(AsmPrinterCtor && "AsmPrinter was not linked in");
184 PM.add(AsmPrinterCtor(errs(), *this));