1 //===-- PPCTargetMachine.cpp - Define TargetMachine for PowerPC -----------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // Top-level implementation for the PowerPC target.
12 //===----------------------------------------------------------------------===//
14 #include "PPCTargetMachine.h"
16 #include "llvm/CodeGen/Passes.h"
17 #include "llvm/MC/MCStreamer.h"
18 #include "llvm/PassManager.h"
19 #include "llvm/Support/CommandLine.h"
20 #include "llvm/Support/FormattedStream.h"
21 #include "llvm/Support/TargetRegistry.h"
22 #include "llvm/Target/TargetOptions.h"
26 opt<bool> DisableCTRLoops("disable-ppc-ctrloops", cl::Hidden,
27 cl::desc("Disable CTR loops for PPC"));
29 extern "C" void LLVMInitializePowerPCTarget() {
30 // Register the targets
31 RegisterTargetMachine<PPC32TargetMachine> A(ThePPC32Target);
32 RegisterTargetMachine<PPC64TargetMachine> B(ThePPC64Target);
33 RegisterTargetMachine<PPC64TargetMachine> C(ThePPC64LETarget);
36 PPCTargetMachine::PPCTargetMachine(const Target &T, StringRef TT,
37 StringRef CPU, StringRef FS,
38 const TargetOptions &Options,
39 Reloc::Model RM, CodeModel::Model CM,
42 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
43 Subtarget(TT, CPU, FS, is64Bit),
44 DL(Subtarget.getDataLayoutString()), InstrInfo(*this),
45 FrameLowering(Subtarget), JITInfo(*this, is64Bit),
46 TLInfo(*this), TSInfo(*this),
47 InstrItins(Subtarget.getInstrItineraryData()) {
49 // The binutils for the BG/P are too old for CFI.
50 if (Subtarget.isBGP())
55 void PPC32TargetMachine::anchor() { }
57 PPC32TargetMachine::PPC32TargetMachine(const Target &T, StringRef TT,
58 StringRef CPU, StringRef FS,
59 const TargetOptions &Options,
60 Reloc::Model RM, CodeModel::Model CM,
62 : PPCTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {
65 void PPC64TargetMachine::anchor() { }
67 PPC64TargetMachine::PPC64TargetMachine(const Target &T, StringRef TT,
68 StringRef CPU, StringRef FS,
69 const TargetOptions &Options,
70 Reloc::Model RM, CodeModel::Model CM,
72 : PPCTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) {
76 //===----------------------------------------------------------------------===//
77 // Pass Pipeline Configuration
78 //===----------------------------------------------------------------------===//
81 /// PPC Code Generator Pass Configuration Options.
82 class PPCPassConfig : public TargetPassConfig {
84 PPCPassConfig(PPCTargetMachine *TM, PassManagerBase &PM)
85 : TargetPassConfig(TM, PM) {}
87 PPCTargetMachine &getPPCTargetMachine() const {
88 return getTM<PPCTargetMachine>();
91 const PPCSubtarget &getPPCSubtarget() const {
92 return *getPPCTargetMachine().getSubtargetImpl();
95 virtual bool addPreISel();
96 virtual bool addILPOpts();
97 virtual bool addInstSelector();
98 virtual bool addPreSched2();
99 virtual bool addPreEmitPass();
103 TargetPassConfig *PPCTargetMachine::createPassConfig(PassManagerBase &PM) {
104 return new PPCPassConfig(this, PM);
107 bool PPCPassConfig::addPreISel() {
108 if (!DisableCTRLoops && getOptLevel() != CodeGenOpt::None)
109 addPass(createPPCCTRLoops(getPPCTargetMachine()));
114 bool PPCPassConfig::addILPOpts() {
115 if (getPPCSubtarget().hasISEL()) {
116 addPass(&EarlyIfConverterID);
123 bool PPCPassConfig::addInstSelector() {
124 // Install an instruction selector.
125 addPass(createPPCISelDag(getPPCTargetMachine()));
128 if (!DisableCTRLoops && getOptLevel() != CodeGenOpt::None)
129 addPass(createPPCCTRLoopsVerify());
135 bool PPCPassConfig::addPreSched2() {
136 if (getOptLevel() != CodeGenOpt::None)
137 addPass(&IfConverterID);
142 bool PPCPassConfig::addPreEmitPass() {
143 if (getOptLevel() != CodeGenOpt::None)
144 addPass(createPPCEarlyReturnPass());
145 // Must run branch selection immediately preceding the asm printer.
146 addPass(createPPCBranchSelectionPass());
150 bool PPCTargetMachine::addCodeEmitter(PassManagerBase &PM,
151 JITCodeEmitter &JCE) {
152 // Inform the subtarget that we are in JIT mode. FIXME: does this break macho
154 Subtarget.SetJITMode();
156 // Machine code emitter pass for PowerPC.
157 PM.add(createPPCJITCodeEmitterPass(*this, JCE));
162 void PPCTargetMachine::addAnalysisPasses(PassManagerBase &PM) {
163 // Add first the target-independent BasicTTI pass, then our PPC pass. This
164 // allows the PPC pass to delegate to the target independent layer when
166 PM.add(createBasicTargetTransformInfoPass(this));
167 PM.add(createPPCTargetTransformInfoPass(this));