1 //===-- PPCTargetMachine.cpp - Define TargetMachine for PowerPC -----------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // Top-level implementation for the PowerPC target.
12 //===----------------------------------------------------------------------===//
15 #include "PPCMCAsmInfo.h"
16 #include "PPCTargetMachine.h"
17 #include "llvm/PassManager.h"
18 #include "llvm/Target/TargetOptions.h"
19 #include "llvm/Target/TargetRegistry.h"
20 #include "llvm/Support/FormattedStream.h"
23 static const MCAsmInfo *createMCAsmInfo(const Target &T, StringRef TT) {
25 bool isPPC64 = TheTriple.getArch() == Triple::ppc64;
26 if (TheTriple.getOS() == Triple::Darwin)
27 return new PPCMCAsmInfoDarwin(isPPC64);
28 return new PPCLinuxMCAsmInfo(isPPC64);
32 extern "C" void LLVMInitializePowerPCTarget() {
33 // Register the targets
34 RegisterTargetMachine<PPC32TargetMachine> A(ThePPC32Target);
35 RegisterTargetMachine<PPC64TargetMachine> B(ThePPC64Target);
37 RegisterAsmInfoFn C(ThePPC32Target, createMCAsmInfo);
38 RegisterAsmInfoFn D(ThePPC64Target, createMCAsmInfo);
42 PPCTargetMachine::PPCTargetMachine(const Target &T, const std::string &TT,
43 const std::string &FS, bool is64Bit)
44 : LLVMTargetMachine(T, TT),
45 Subtarget(TT, FS, is64Bit),
46 DataLayout(Subtarget.getTargetDataString()), InstrInfo(*this),
47 FrameInfo(*this, is64Bit), JITInfo(*this, is64Bit), TLInfo(*this),
48 InstrItins(Subtarget.getInstrItineraryData()) {
50 if (getRelocationModel() == Reloc::Default) {
51 if (Subtarget.isDarwin())
52 setRelocationModel(Reloc::DynamicNoPIC);
54 setRelocationModel(Reloc::Static);
58 /// Override this for PowerPC. Tail merging happily breaks up instruction issue
59 /// groups, which typically degrades performance.
60 bool PPCTargetMachine::getEnableTailMergeDefault() const { return false; }
62 PPC32TargetMachine::PPC32TargetMachine(const Target &T, const std::string &TT,
63 const std::string &FS)
64 : PPCTargetMachine(T, TT, FS, false) {
68 PPC64TargetMachine::PPC64TargetMachine(const Target &T, const std::string &TT,
69 const std::string &FS)
70 : PPCTargetMachine(T, TT, FS, true) {
74 //===----------------------------------------------------------------------===//
75 // Pass Pipeline Configuration
76 //===----------------------------------------------------------------------===//
78 bool PPCTargetMachine::addInstSelector(PassManagerBase &PM,
79 CodeGenOpt::Level OptLevel) {
80 // Install an instruction selector.
81 PM.add(createPPCISelDag(*this));
85 bool PPCTargetMachine::addPreEmitPass(PassManagerBase &PM,
86 CodeGenOpt::Level OptLevel) {
87 // Must run branch selection immediately preceding the asm printer.
88 PM.add(createPPCBranchSelectionPass());
92 bool PPCTargetMachine::addCodeEmitter(PassManagerBase &PM,
93 CodeGenOpt::Level OptLevel,
94 JITCodeEmitter &JCE) {
95 // The JIT should use the static relocation model in ppc32 mode, PIC in ppc64.
96 // FIXME: This should be moved to TargetJITInfo!!
97 if (Subtarget.isPPC64()) {
98 // We use PIC codegen in ppc64 mode, because otherwise we'd have to use many
99 // instructions to materialize arbitrary global variable + function +
100 // constant pool addresses.
101 setRelocationModel(Reloc::PIC_);
102 // Temporary workaround for the inability of PPC64 JIT to handle jump
104 DisableJumpTables = true;
106 setRelocationModel(Reloc::Static);
109 // Inform the subtarget that we are in JIT mode. FIXME: does this break macho
111 Subtarget.SetJITMode();
113 // Machine code emitter pass for PowerPC.
114 PM.add(createPPCJITCodeEmitterPass(*this, JCE));