1 //===-- PPCTargetMachine.cpp - Define TargetMachine for PowerPC -----------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // Top-level implementation for the PowerPC target.
12 //===----------------------------------------------------------------------===//
15 #include "PPCTargetAsmInfo.h"
16 #include "PPCTargetMachine.h"
17 #include "llvm/Module.h"
18 #include "llvm/PassManager.h"
19 #include "llvm/Target/TargetMachineRegistry.h"
22 // Register the targets
23 static RegisterTarget<PPC32TargetMachine>
24 X("ppc32", " PowerPC 32");
25 static RegisterTarget<PPC64TargetMachine>
26 Y("ppc64", " PowerPC 64");
28 const TargetAsmInfo *PPCTargetMachine::createTargetAsmInfo() const {
29 if (Subtarget.isDarwin())
30 return new DarwinTargetAsmInfo(*this);
32 return new LinuxTargetAsmInfo(*this);
35 unsigned PPC32TargetMachine::getJITMatchQuality() {
36 #if defined(__POWERPC__) || defined (__ppc__) || defined(_POWER) || defined(__PPC__)
37 if (sizeof(void*) == 4)
42 unsigned PPC64TargetMachine::getJITMatchQuality() {
43 #if defined(__POWERPC__) || defined (__ppc__) || defined(_POWER) || defined(__PPC__)
44 if (sizeof(void*) == 8)
50 unsigned PPC32TargetMachine::getModuleMatchQuality(const Module &M) {
51 // We strongly match "powerpc-*".
52 std::string TT = M.getTargetTriple();
53 if (TT.size() >= 8 && std::string(TT.begin(), TT.begin()+8) == "powerpc-")
56 // If the target triple is something non-powerpc, we don't match.
57 if (!TT.empty()) return 0;
59 if (M.getEndianness() == Module::BigEndian &&
60 M.getPointerSize() == Module::Pointer32)
61 return 10; // Weak match
62 else if (M.getEndianness() != Module::AnyEndianness ||
63 M.getPointerSize() != Module::AnyPointerSize)
64 return 0; // Match for some other target
66 return getJITMatchQuality()/2;
69 unsigned PPC64TargetMachine::getModuleMatchQuality(const Module &M) {
70 // We strongly match "powerpc64-*".
71 std::string TT = M.getTargetTriple();
72 if (TT.size() >= 10 && std::string(TT.begin(), TT.begin()+10) == "powerpc64-")
75 if (M.getEndianness() == Module::BigEndian &&
76 M.getPointerSize() == Module::Pointer64)
77 return 10; // Weak match
78 else if (M.getEndianness() != Module::AnyEndianness ||
79 M.getPointerSize() != Module::AnyPointerSize)
80 return 0; // Match for some other target
82 return getJITMatchQuality()/2;
86 PPCTargetMachine::PPCTargetMachine(const Module &M, const std::string &FS,
88 : Subtarget(*this, M, FS, is64Bit),
89 DataLayout(Subtarget.getTargetDataString()), InstrInfo(*this),
90 FrameInfo(*this, is64Bit), JITInfo(*this, is64Bit), TLInfo(*this),
91 InstrItins(Subtarget.getInstrItineraryData()), MachOWriterInfo(*this) {
93 if (getRelocationModel() == Reloc::Default) {
94 if (Subtarget.isDarwin())
95 setRelocationModel(Reloc::DynamicNoPIC);
97 setRelocationModel(Reloc::Static);
101 /// Override this for PowerPC. Tail merging happily breaks up instruction issue
102 /// groups, which typically degrades performance.
103 bool PPCTargetMachine::getEnableTailMergeDefault() const { return false; }
105 PPC32TargetMachine::PPC32TargetMachine(const Module &M, const std::string &FS)
106 : PPCTargetMachine(M, FS, false) {
110 PPC64TargetMachine::PPC64TargetMachine(const Module &M, const std::string &FS)
111 : PPCTargetMachine(M, FS, true) {
115 //===----------------------------------------------------------------------===//
116 // Pass Pipeline Configuration
117 //===----------------------------------------------------------------------===//
119 bool PPCTargetMachine::addInstSelector(PassManagerBase &PM, bool Fast) {
120 // Install an instruction selector.
121 PM.add(createPPCISelDag(*this));
125 bool PPCTargetMachine::addPreEmitPass(PassManagerBase &PM, bool Fast) {
127 // Must run branch selection immediately preceding the asm printer.
128 PM.add(createPPCBranchSelectionPass());
132 bool PPCTargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast,
134 PM.add(createPPCAsmPrinterPass(Out, *this));
138 bool PPCTargetMachine::addCodeEmitter(PassManagerBase &PM, bool Fast,
139 bool DumpAsm, MachineCodeEmitter &MCE) {
140 // The JIT should use the static relocation model in ppc32 mode, PIC in ppc64.
141 // FIXME: This should be moved to TargetJITInfo!!
142 if (Subtarget.isPPC64()) {
143 // We use PIC codegen in ppc64 mode, because otherwise we'd have to use many
144 // instructions to materialize arbitrary global variable + function +
145 // constant pool addresses.
146 setRelocationModel(Reloc::PIC_);
148 setRelocationModel(Reloc::Static);
151 // Inform the subtarget that we are in JIT mode. FIXME: does this break macho
153 Subtarget.SetJITMode();
155 // Machine code emitter pass for PowerPC.
156 PM.add(createPPCCodeEmitterPass(*this, MCE));
158 PM.add(createPPCAsmPrinterPass(*cerr.stream(), *this));
162 bool PPCTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM, bool Fast,
163 bool DumpAsm, MachineCodeEmitter &MCE) {
164 // Machine code emitter pass for PowerPC.
165 PM.add(createPPCCodeEmitterPass(*this, MCE));
167 PM.add(createPPCAsmPrinterPass(*cerr.stream(), *this));