1 //===-- PPCTargetMachine.cpp - Define TargetMachine for PowerPC -----------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // Top-level implementation for the PowerPC target.
12 //===----------------------------------------------------------------------===//
14 #include "PPCTargetMachine.h"
15 #include "PPCTargetObjectFile.h"
17 #include "llvm/CodeGen/Passes.h"
18 #include "llvm/IR/Function.h"
19 #include "llvm/MC/MCStreamer.h"
20 #include "llvm/PassManager.h"
21 #include "llvm/Support/CommandLine.h"
22 #include "llvm/Support/FormattedStream.h"
23 #include "llvm/Support/TargetRegistry.h"
24 #include "llvm/Target/TargetOptions.h"
25 #include "llvm/Transforms/Scalar.h"
29 opt<bool> DisableCTRLoops("disable-ppc-ctrloops", cl::Hidden,
30 cl::desc("Disable CTR loops for PPC"));
33 VSXFMAMutateEarly("schedule-ppc-vsx-fma-mutation-early",
34 cl::Hidden, cl::desc("Schedule VSX FMA instruction mutation early"));
37 EnableGEPOpt("ppc-gep-opt", cl::Hidden,
38 cl::desc("Enable optimizations on complex GEPs"),
41 extern "C" void LLVMInitializePowerPCTarget() {
42 // Register the targets
43 RegisterTargetMachine<PPC32TargetMachine> A(ThePPC32Target);
44 RegisterTargetMachine<PPC64TargetMachine> B(ThePPC64Target);
45 RegisterTargetMachine<PPC64TargetMachine> C(ThePPC64LETarget);
48 static std::string computeFSAdditions(StringRef FS, CodeGenOpt::Level OL, StringRef TT) {
49 std::string FullFS = FS;
50 Triple TargetTriple(TT);
52 // Make sure 64-bit features are available when CPUname is generic
53 if (TargetTriple.getArch() == Triple::ppc64 ||
54 TargetTriple.getArch() == Triple::ppc64le) {
56 FullFS = "+64bit," + FullFS;
61 if (OL >= CodeGenOpt::Default) {
63 FullFS = "+crbits," + FullFS;
70 static std::unique_ptr<TargetLoweringObjectFile> createTLOF(const Triple &TT) {
71 // If it isn't a Mach-O file then it's going to be a linux ELF
74 return make_unique<TargetLoweringObjectFileMachO>();
76 return make_unique<PPC64LinuxTargetObjectFile>();
79 // The FeatureString here is a little subtle. We are modifying the feature string
80 // with what are (currently) non-function specific overrides as it goes into the
81 // LLVMTargetMachine constructor and then using the stored value in the
82 // Subtarget constructor below it.
83 PPCTargetMachine::PPCTargetMachine(const Target &T, StringRef TT, StringRef CPU,
84 StringRef FS, const TargetOptions &Options,
85 Reloc::Model RM, CodeModel::Model CM,
87 : LLVMTargetMachine(T, TT, CPU, computeFSAdditions(FS, OL, TT), Options, RM,
89 TLOF(createTLOF(Triple(getTargetTriple()))),
90 Subtarget(TT, CPU, TargetFS, *this) {
94 PPCTargetMachine::~PPCTargetMachine() {}
96 void PPC32TargetMachine::anchor() { }
98 PPC32TargetMachine::PPC32TargetMachine(const Target &T, StringRef TT,
99 StringRef CPU, StringRef FS,
100 const TargetOptions &Options,
101 Reloc::Model RM, CodeModel::Model CM,
102 CodeGenOpt::Level OL)
103 : PPCTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL) {
106 void PPC64TargetMachine::anchor() { }
108 PPC64TargetMachine::PPC64TargetMachine(const Target &T, StringRef TT,
109 StringRef CPU, StringRef FS,
110 const TargetOptions &Options,
111 Reloc::Model RM, CodeModel::Model CM,
112 CodeGenOpt::Level OL)
113 : PPCTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL) {
117 PPCTargetMachine::getSubtargetImpl(const Function &F) const {
118 AttributeSet FnAttrs = F.getAttributes();
120 FnAttrs.getAttribute(AttributeSet::FunctionIndex, "target-cpu");
122 FnAttrs.getAttribute(AttributeSet::FunctionIndex, "target-features");
124 std::string CPU = !CPUAttr.hasAttribute(Attribute::None)
125 ? CPUAttr.getValueAsString().str()
127 std::string FS = !FSAttr.hasAttribute(Attribute::None)
128 ? FSAttr.getValueAsString().str()
131 auto &I = SubtargetMap[CPU + FS];
133 // This needs to be done before we create a new subtarget since any
134 // creation will depend on the TM and the code generation flags on the
135 // function that reside in TargetOptions.
136 resetTargetOptions(F);
137 I = llvm::make_unique<PPCSubtarget>(TargetTriple, CPU, FS, *this);
142 //===----------------------------------------------------------------------===//
143 // Pass Pipeline Configuration
144 //===----------------------------------------------------------------------===//
147 /// PPC Code Generator Pass Configuration Options.
148 class PPCPassConfig : public TargetPassConfig {
150 PPCPassConfig(PPCTargetMachine *TM, PassManagerBase &PM)
151 : TargetPassConfig(TM, PM) {}
153 PPCTargetMachine &getPPCTargetMachine() const {
154 return getTM<PPCTargetMachine>();
157 const PPCSubtarget &getPPCSubtarget() const {
158 return *getPPCTargetMachine().getSubtargetImpl();
161 void addIRPasses() override;
162 bool addPreISel() override;
163 bool addILPOpts() override;
164 bool addInstSelector() override;
165 bool addPreRegAlloc() override;
166 bool addPreSched2() override;
167 bool addPreEmitPass() override;
171 TargetPassConfig *PPCTargetMachine::createPassConfig(PassManagerBase &PM) {
172 return new PPCPassConfig(this, PM);
175 void PPCPassConfig::addIRPasses() {
176 addPass(createAtomicExpandPass(&getPPCTargetMachine()));
178 if (TM->getOptLevel() == CodeGenOpt::Aggressive && EnableGEPOpt) {
179 // Call SeparateConstOffsetFromGEP pass to extract constants within indices
180 // and lower a GEP with multiple indices to either arithmetic operations or
181 // multiple GEPs with single index.
182 addPass(createSeparateConstOffsetFromGEPPass(TM, true));
183 // Call EarlyCSE pass to find and remove subexpressions in the lowered
185 addPass(createEarlyCSEPass());
186 // Do loop invariant code motion in case part of the lowered result is
188 addPass(createLICMPass());
191 TargetPassConfig::addIRPasses();
194 bool PPCPassConfig::addPreISel() {
195 if (!DisableCTRLoops && getOptLevel() != CodeGenOpt::None)
196 addPass(createPPCCTRLoops(getPPCTargetMachine()));
201 bool PPCPassConfig::addILPOpts() {
202 addPass(&EarlyIfConverterID);
206 bool PPCPassConfig::addInstSelector() {
207 // Install an instruction selector.
208 addPass(createPPCISelDag(getPPCTargetMachine()));
211 if (!DisableCTRLoops && getOptLevel() != CodeGenOpt::None)
212 addPass(createPPCCTRLoopsVerify());
215 addPass(createPPCVSXCopyPass());
219 bool PPCPassConfig::addPreRegAlloc() {
220 initializePPCVSXFMAMutatePass(*PassRegistry::getPassRegistry());
221 insertPass(VSXFMAMutateEarly ? &RegisterCoalescerID : &MachineSchedulerID,
226 bool PPCPassConfig::addPreSched2() {
227 addPass(createPPCVSXCopyCleanupPass());
229 if (getOptLevel() != CodeGenOpt::None)
230 addPass(&IfConverterID);
235 bool PPCPassConfig::addPreEmitPass() {
236 if (getOptLevel() != CodeGenOpt::None)
237 addPass(createPPCEarlyReturnPass());
238 // Must run branch selection immediately preceding the asm printer.
239 addPass(createPPCBranchSelectionPass());
243 void PPCTargetMachine::addAnalysisPasses(PassManagerBase &PM) {
244 // Add first the target-independent BasicTTI pass, then our PPC pass. This
245 // allows the PPC pass to delegate to the target independent layer when
247 PM.add(createBasicTargetTransformInfoPass(this));
248 PM.add(createPPCTargetTransformInfoPass(this));