1 //===-- PPCTargetMachine.cpp - Define TargetMachine for PowerPC -----------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // Top-level implementation for the PowerPC target.
12 //===----------------------------------------------------------------------===//
15 #include "PPCTargetAsmInfo.h"
16 #include "PPCTargetMachine.h"
17 #include "llvm/Module.h"
18 #include "llvm/PassManager.h"
19 #include "llvm/Target/TargetMachineRegistry.h"
23 // Register the targets
24 RegisterTarget<PPC32TargetMachine>
25 X("ppc32", " PowerPC 32");
26 RegisterTarget<PPC64TargetMachine>
27 Y("ppc64", " PowerPC 64");
30 const TargetAsmInfo *PPCTargetMachine::createTargetAsmInfo() const {
31 if (Subtarget.isDarwin())
32 return new DarwinTargetAsmInfo(*this);
34 return new LinuxTargetAsmInfo(*this);
37 unsigned PPC32TargetMachine::getJITMatchQuality() {
38 #if defined(__POWERPC__) || defined (__ppc__) || defined(_POWER) || defined(__PPC__)
39 if (sizeof(void*) == 4)
44 unsigned PPC64TargetMachine::getJITMatchQuality() {
45 #if defined(__POWERPC__) || defined (__ppc__) || defined(_POWER) || defined(__PPC__)
46 if (sizeof(void*) == 8)
52 unsigned PPC32TargetMachine::getModuleMatchQuality(const Module &M) {
53 // We strongly match "powerpc-*".
54 std::string TT = M.getTargetTriple();
55 if (TT.size() >= 8 && std::string(TT.begin(), TT.begin()+8) == "powerpc-")
58 // If the target triple is something non-powerpc, we don't match.
59 if (!TT.empty()) return 0;
61 if (M.getEndianness() == Module::BigEndian &&
62 M.getPointerSize() == Module::Pointer32)
63 return 10; // Weak match
64 else if (M.getEndianness() != Module::AnyEndianness ||
65 M.getPointerSize() != Module::AnyPointerSize)
66 return 0; // Match for some other target
68 return getJITMatchQuality()/2;
71 unsigned PPC64TargetMachine::getModuleMatchQuality(const Module &M) {
72 // We strongly match "powerpc64-*".
73 std::string TT = M.getTargetTriple();
74 if (TT.size() >= 10 && std::string(TT.begin(), TT.begin()+10) == "powerpc64-")
77 if (M.getEndianness() == Module::BigEndian &&
78 M.getPointerSize() == Module::Pointer64)
79 return 10; // Weak match
80 else if (M.getEndianness() != Module::AnyEndianness ||
81 M.getPointerSize() != Module::AnyPointerSize)
82 return 0; // Match for some other target
84 return getJITMatchQuality()/2;
88 PPCTargetMachine::PPCTargetMachine(const Module &M, const std::string &FS,
90 : Subtarget(*this, M, FS, is64Bit),
91 DataLayout(Subtarget.getTargetDataString()), InstrInfo(*this),
92 FrameInfo(*this, is64Bit), JITInfo(*this, is64Bit), TLInfo(*this),
93 InstrItins(Subtarget.getInstrItineraryData()), MachOWriterInfo(*this) {
95 if (getRelocationModel() == Reloc::Default) {
96 if (Subtarget.isDarwin())
97 setRelocationModel(Reloc::DynamicNoPIC);
99 setRelocationModel(Reloc::Static);
103 /// Override this for PowerPC. Tail merging happily breaks up instruction issue
104 /// groups, which typically degrades performance.
105 bool PPCTargetMachine::getEnableTailMergeDefault() const { return false; }
107 PPC32TargetMachine::PPC32TargetMachine(const Module &M, const std::string &FS)
108 : PPCTargetMachine(M, FS, false) {
112 PPC64TargetMachine::PPC64TargetMachine(const Module &M, const std::string &FS)
113 : PPCTargetMachine(M, FS, true) {
117 //===----------------------------------------------------------------------===//
118 // Pass Pipeline Configuration
119 //===----------------------------------------------------------------------===//
121 bool PPCTargetMachine::addInstSelector(FunctionPassManager &PM, bool Fast) {
122 // Install an instruction selector.
123 PM.add(createPPCISelDag(*this));
127 bool PPCTargetMachine::addPreEmitPass(FunctionPassManager &PM, bool Fast) {
129 // Must run branch selection immediately preceding the asm printer.
130 PM.add(createPPCBranchSelectionPass());
134 bool PPCTargetMachine::addAssemblyEmitter(FunctionPassManager &PM, bool Fast,
136 PM.add(createPPCAsmPrinterPass(Out, *this));
140 bool PPCTargetMachine::addCodeEmitter(FunctionPassManager &PM, bool Fast,
141 bool DumpAsm, MachineCodeEmitter &MCE) {
142 // The JIT should use the static relocation model in ppc32 mode, PIC in ppc64.
143 // FIXME: This should be moved to TargetJITInfo!!
144 if (Subtarget.isPPC64()) {
145 // We use PIC codegen in ppc64 mode, because otherwise we'd have to use many
146 // instructions to materialize arbitrary global variable + function +
147 // constant pool addresses.
148 setRelocationModel(Reloc::PIC_);
150 setRelocationModel(Reloc::Static);
153 // Inform the subtarget that we are in JIT mode. FIXME: does this break macho
155 Subtarget.SetJITMode();
157 // Machine code emitter pass for PowerPC.
158 PM.add(createPPCCodeEmitterPass(*this, MCE));
160 PM.add(createPPCAsmPrinterPass(*cerr.stream(), *this));
164 bool PPCTargetMachine::addSimpleCodeEmitter(FunctionPassManager &PM, bool Fast,
165 bool DumpAsm, MachineCodeEmitter &MCE) {
166 // Machine code emitter pass for PowerPC.
167 PM.add(createPPCCodeEmitterPass(*this, MCE));
169 PM.add(createPPCAsmPrinterPass(*cerr.stream(), *this));