1 //===-- PowerPCTargetMachine.cpp - Define TargetMachine for PowerPC -------===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
14 #include "PowerPCTargetMachine.h"
15 #include "PowerPCFrameInfo.h"
16 #include "PPC32TargetMachine.h"
17 #include "PPC64TargetMachine.h"
18 #include "PPC32JITInfo.h"
19 #include "PPC64JITInfo.h"
20 #include "llvm/Module.h"
21 #include "llvm/PassManager.h"
22 #include "llvm/CodeGen/IntrinsicLowering.h"
23 #include "llvm/CodeGen/MachineFunction.h"
24 #include "llvm/CodeGen/Passes.h"
25 #include "llvm/Target/TargetOptions.h"
26 #include "llvm/Target/TargetMachineRegistry.h"
27 #include "llvm/Transforms/Scalar.h"
28 #include "llvm/Support/CommandLine.h"
34 cl::opt<bool> AIX("aix",
35 cl::desc("Generate AIX/xcoff instead of Darwin/MachO"),
37 cl::opt<bool> EnablePPCLSR("enable-lsr-for-ppc",
38 cl::desc("Enable LSR for PPC (beta)"),
40 cl::opt<bool, true> EnablePPCCRopts("enable-cc-opts",
41 cl::desc("Enable opts using condition regs (beta)"),
42 cl::location(PPCCRopts),
48 const std::string PPC32ID = "PowerPC/32bit";
49 const std::string PPC64ID = "PowerPC/64bit";
51 // Register the targets
52 RegisterTarget<PPC32TargetMachine>
53 X("ppc32", " PowerPC 32-bit");
56 RegisterTarget<PPC64TargetMachine>
57 Y("ppc64", " PowerPC 64-bit (unimplemented)");
61 PowerPCTargetMachine::PowerPCTargetMachine(const std::string &name,
62 IntrinsicLowering *IL,
64 const PowerPCFrameInfo &TFI)
65 : TargetMachine(name, IL, TD), FrameInfo(TFI)
68 unsigned PPC32TargetMachine::getJITMatchQuality() {
69 #if defined(__POWERPC__) || defined (__ppc__) || defined(_POWER)
76 /// addPassesToEmitFile - Add passes to the specified pass manager to implement
77 /// a static compiler for this target.
79 bool PowerPCTargetMachine::addPassesToEmitFile(PassManager &PM,
81 CodeGenFileType FileType) {
82 if (FileType != TargetMachine::AssemblyFile) return true;
84 bool LP64 = (0 != dynamic_cast<PPC64TargetMachine *>(this));
87 PM.add(createLoopStrengthReducePass());
88 PM.add(createCFGSimplificationPass());
91 // FIXME: Implement efficient support for garbage collection intrinsics.
92 PM.add(createLowerGCPass());
94 // FIXME: Implement the invoke/unwind instructions!
95 PM.add(createLowerInvokePass());
97 // FIXME: Implement the switch instruction in the instruction selector!
98 PM.add(createLowerSwitchPass());
100 PM.add(createLowerConstantExpressionsPass());
102 // Make sure that no unreachable blocks are instruction selected.
103 PM.add(createUnreachableBlockEliminationPass());
105 // Default to pattern ISel
107 PM.add(createPPC64ISelPattern(*this));
108 else if (PatternISelTriState == 0)
109 PM.add(createPPC32ISelSimple(*this));
111 PM.add(createPPC32ISelPattern(*this));
113 if (PrintMachineCode)
114 PM.add(createMachineFunctionPrinterPass(&std::cerr));
116 PM.add(createRegisterAllocator());
118 if (PrintMachineCode)
119 PM.add(createMachineFunctionPrinterPass(&std::cerr));
121 PM.add(createPrologEpilogCodeInserter());
123 // Must run branch selection immediately preceding the asm printer
124 PM.add(createPPCBranchSelectionPass());
127 PM.add(createAIXAsmPrinter(Out, *this));
129 PM.add(createDarwinAsmPrinter(Out, *this));
131 PM.add(createMachineCodeDeleter());
135 void PowerPCJITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
136 bool LP64 = (0 != dynamic_cast<PPC64TargetMachine *>(&TM));
139 PM.add(createLoopStrengthReducePass());
140 PM.add(createCFGSimplificationPass());
143 // FIXME: Implement efficient support for garbage collection intrinsics.
144 PM.add(createLowerGCPass());
146 // FIXME: Implement the invoke/unwind instructions!
147 PM.add(createLowerInvokePass());
149 // FIXME: Implement the switch instruction in the instruction selector!
150 PM.add(createLowerSwitchPass());
152 PM.add(createLowerConstantExpressionsPass());
154 // Make sure that no unreachable blocks are instruction selected.
155 PM.add(createUnreachableBlockEliminationPass());
157 // Default to pattern ISel
159 PM.add(createPPC64ISelPattern(TM));
160 else if (PatternISelTriState == 0)
161 PM.add(createPPC32ISelSimple(TM));
163 PM.add(createPPC32ISelPattern(TM));
165 PM.add(createRegisterAllocator());
166 PM.add(createPrologEpilogCodeInserter());
168 // Must run branch selection immediately preceding the asm printer
169 PM.add(createPPCBranchSelectionPass());
171 if (PrintMachineCode)
172 PM.add(createMachineFunctionPrinterPass(&std::cerr));
175 /// PowerPCTargetMachine ctor - Create an ILP32 architecture model
177 PPC32TargetMachine::PPC32TargetMachine(const Module &M, IntrinsicLowering *IL)
178 : PowerPCTargetMachine(PPC32ID, IL,
179 TargetData(PPC32ID,false,4,4,4,4,4,4,2,1,1),
180 PowerPCFrameInfo(*this, false)), JITInfo(*this) {}
182 /// PPC64TargetMachine ctor - Create a LP64 architecture model
184 PPC64TargetMachine::PPC64TargetMachine(const Module &M, IntrinsicLowering *IL)
185 : PowerPCTargetMachine(PPC64ID, IL,
186 TargetData(PPC64ID,false,8,4,4,4,4,4,2,1,1),
187 PowerPCFrameInfo(*this, true)) {}
189 unsigned PPC32TargetMachine::getModuleMatchQuality(const Module &M) {
190 // We strongly match "powerpc-*".
191 std::string TT = M.getTargetTriple();
192 if (TT.size() >= 8 && std::string(TT.begin(), TT.begin()+8) == "powerpc-")
195 if (M.getEndianness() == Module::BigEndian &&
196 M.getPointerSize() == Module::Pointer32)
197 return 10; // Weak match
198 else if (M.getEndianness() != Module::AnyEndianness ||
199 M.getPointerSize() != Module::AnyPointerSize)
200 return 0; // Match for some other target
202 return getJITMatchQuality()/2;
205 unsigned PPC64TargetMachine::getModuleMatchQuality(const Module &M) {
206 if (M.getEndianness() == Module::BigEndian &&
207 M.getPointerSize() == Module::Pointer64)
208 return 10; // Direct match
209 else if (M.getEndianness() != Module::AnyEndianness ||
210 M.getPointerSize() != Module::AnyPointerSize)
211 return 0; // Match for some other target
213 return getJITMatchQuality()/2;