1 //===-- PPCTargetMachine.cpp - Define TargetMachine for PowerPC -----------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // Top-level implementation for the PowerPC target.
12 //===----------------------------------------------------------------------===//
15 #include "PPCTargetAsmInfo.h"
16 #include "PPCTargetMachine.h"
17 #include "llvm/Module.h"
18 #include "llvm/PassManager.h"
19 #include "llvm/Target/TargetMachineRegistry.h"
20 #include "llvm/Target/TargetOptions.h"
21 #include "llvm/Support/raw_ostream.h"
24 /// PowerPCTargetMachineModule - Note that this is used on hosts that
25 /// cannot link in a library unless there are references into the
26 /// library. In particular, it seems that it is not possible to get
27 /// things to work on Win32 without this. Though it is unused, do not
29 extern "C" int PowerPCTargetMachineModule;
30 int PowerPCTargetMachineModule = 0;
32 // Register the targets
33 static RegisterTarget<PPC32TargetMachine>
34 X("ppc32", "PowerPC 32");
35 static RegisterTarget<PPC64TargetMachine>
36 Y("ppc64", "PowerPC 64");
38 // No assembler printer by default
39 PPCTargetMachine::AsmPrinterCtorFn PPCTargetMachine::AsmPrinterCtor = 0;
41 const TargetAsmInfo *PPCTargetMachine::createTargetAsmInfo() const {
42 if (Subtarget.isDarwin())
43 return new PPCDarwinTargetAsmInfo(*this);
45 return new PPCLinuxTargetAsmInfo(*this);
48 unsigned PPC32TargetMachine::getJITMatchQuality() {
49 #if defined(__POWERPC__) || defined (__ppc__) || defined(_POWER) || defined(__PPC__)
50 if (sizeof(void*) == 4)
55 unsigned PPC64TargetMachine::getJITMatchQuality() {
56 #if defined(__POWERPC__) || defined (__ppc__) || defined(_POWER) || defined(__PPC__)
57 if (sizeof(void*) == 8)
63 unsigned PPC32TargetMachine::getModuleMatchQuality(const Module &M) {
64 // We strongly match "powerpc-*".
65 std::string TT = M.getTargetTriple();
66 if (TT.size() >= 8 && std::string(TT.begin(), TT.begin()+8) == "powerpc-")
69 // If the target triple is something non-powerpc, we don't match.
70 if (!TT.empty()) return 0;
72 if (M.getEndianness() == Module::BigEndian &&
73 M.getPointerSize() == Module::Pointer32)
74 return 10; // Weak match
75 else if (M.getEndianness() != Module::AnyEndianness ||
76 M.getPointerSize() != Module::AnyPointerSize)
77 return 0; // Match for some other target
79 return getJITMatchQuality()/2;
82 unsigned PPC64TargetMachine::getModuleMatchQuality(const Module &M) {
83 // We strongly match "powerpc64-*".
84 std::string TT = M.getTargetTriple();
85 if (TT.size() >= 10 && std::string(TT.begin(), TT.begin()+10) == "powerpc64-")
88 if (M.getEndianness() == Module::BigEndian &&
89 M.getPointerSize() == Module::Pointer64)
90 return 10; // Weak match
91 else if (M.getEndianness() != Module::AnyEndianness ||
92 M.getPointerSize() != Module::AnyPointerSize)
93 return 0; // Match for some other target
95 return getJITMatchQuality()/2;
99 PPCTargetMachine::PPCTargetMachine(const Module &M, const std::string &FS,
101 : Subtarget(*this, M, FS, is64Bit),
102 DataLayout(Subtarget.getTargetDataString()), InstrInfo(*this),
103 FrameInfo(*this, is64Bit), JITInfo(*this, is64Bit), TLInfo(*this),
104 InstrItins(Subtarget.getInstrItineraryData()), MachOWriterInfo(*this) {
106 if (getRelocationModel() == Reloc::Default) {
107 if (Subtarget.isDarwin())
108 setRelocationModel(Reloc::DynamicNoPIC);
110 setRelocationModel(Reloc::Static);
114 /// Override this for PowerPC. Tail merging happily breaks up instruction issue
115 /// groups, which typically degrades performance.
116 bool PPCTargetMachine::getEnableTailMergeDefault() const { return false; }
118 PPC32TargetMachine::PPC32TargetMachine(const Module &M, const std::string &FS)
119 : PPCTargetMachine(M, FS, false) {
123 PPC64TargetMachine::PPC64TargetMachine(const Module &M, const std::string &FS)
124 : PPCTargetMachine(M, FS, true) {
128 //===----------------------------------------------------------------------===//
129 // Pass Pipeline Configuration
130 //===----------------------------------------------------------------------===//
132 bool PPCTargetMachine::addInstSelector(PassManagerBase &PM,
133 CodeGenOpt::Level OptLevel) {
134 // Install an instruction selector.
135 PM.add(createPPCISelDag(*this));
139 bool PPCTargetMachine::addPreEmitPass(PassManagerBase &PM,
140 CodeGenOpt::Level OptLevel) {
141 // Must run branch selection immediately preceding the asm printer.
142 PM.add(createPPCBranchSelectionPass());
146 bool PPCTargetMachine::addAssemblyEmitter(PassManagerBase &PM,
147 CodeGenOpt::Level OptLevel,
150 assert(AsmPrinterCtor && "AsmPrinter was not linked in");
152 PM.add(AsmPrinterCtor(Out, *this, OptLevel, Verbose));
157 bool PPCTargetMachine::addCodeEmitter(PassManagerBase &PM,
158 CodeGenOpt::Level OptLevel,
159 bool DumpAsm, MachineCodeEmitter &MCE) {
160 // The JIT should use the static relocation model in ppc32 mode, PIC in ppc64.
161 // FIXME: This should be moved to TargetJITInfo!!
162 if (Subtarget.isPPC64()) {
163 // We use PIC codegen in ppc64 mode, because otherwise we'd have to use many
164 // instructions to materialize arbitrary global variable + function +
165 // constant pool addresses.
166 setRelocationModel(Reloc::PIC_);
167 // Temporary workaround for the inability of PPC64 JIT to handle jump
169 DisableJumpTables = true;
171 setRelocationModel(Reloc::Static);
174 // Inform the subtarget that we are in JIT mode. FIXME: does this break macho
176 Subtarget.SetJITMode();
178 // Machine code emitter pass for PowerPC.
179 PM.add(createPPCCodeEmitterPass(*this, MCE));
181 assert(AsmPrinterCtor && "AsmPrinter was not linked in");
183 PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true));
189 bool PPCTargetMachine::addCodeEmitter(PassManagerBase &PM,
190 CodeGenOpt::Level OptLevel,
191 bool DumpAsm, JITCodeEmitter &JCE) {
192 // The JIT should use the static relocation model in ppc32 mode, PIC in ppc64.
193 // FIXME: This should be moved to TargetJITInfo!!
194 if (Subtarget.isPPC64()) {
195 // We use PIC codegen in ppc64 mode, because otherwise we'd have to use many
196 // instructions to materialize arbitrary global variable + function +
197 // constant pool addresses.
198 setRelocationModel(Reloc::PIC_);
199 // Temporary workaround for the inability of PPC64 JIT to handle jump
201 DisableJumpTables = true;
203 setRelocationModel(Reloc::Static);
206 // Inform the subtarget that we are in JIT mode. FIXME: does this break macho
208 Subtarget.SetJITMode();
210 // Machine code emitter pass for PowerPC.
211 PM.add(createPPCJITCodeEmitterPass(*this, JCE));
213 assert(AsmPrinterCtor && "AsmPrinter was not linked in");
215 PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true));
221 bool PPCTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
222 CodeGenOpt::Level OptLevel,
224 MachineCodeEmitter &MCE) {
225 // Machine code emitter pass for PowerPC.
226 PM.add(createPPCCodeEmitterPass(*this, MCE));
228 assert(AsmPrinterCtor && "AsmPrinter was not linked in");
230 PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true));
236 bool PPCTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
237 CodeGenOpt::Level OptLevel,
239 JITCodeEmitter &JCE) {
240 // Machine code emitter pass for PowerPC.
241 PM.add(createPPCJITCodeEmitterPass(*this, JCE));
243 assert(AsmPrinterCtor && "AsmPrinter was not linked in");
245 PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true));