1 //===-- PowerPCTargetMachine.cpp - Define TargetMachine for PowerPC -------===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
14 #include "PowerPCTargetMachine.h"
15 #include "PowerPCFrameInfo.h"
16 #include "PPC32TargetMachine.h"
17 #include "PPC64TargetMachine.h"
18 #include "PPC32JITInfo.h"
19 #include "PPC64JITInfo.h"
20 #include "llvm/Module.h"
21 #include "llvm/PassManager.h"
22 #include "llvm/Analysis/Verifier.h"
23 #include "llvm/CodeGen/IntrinsicLowering.h"
24 #include "llvm/CodeGen/MachineFunction.h"
25 #include "llvm/CodeGen/Passes.h"
26 #include "llvm/Target/TargetOptions.h"
27 #include "llvm/Target/TargetMachineRegistry.h"
28 #include "llvm/Transforms/Scalar.h"
29 #include "llvm/Support/CommandLine.h"
33 bool llvm::GPOPT = false;
34 PPCTargetEnum llvm::PPCTarget = TargetDefault;
37 cl::opt<PPCTargetEnum, true>
39 cl::desc("Force generation of code for a specific PPC target:"),
41 clEnumValN(TargetAIX, "aix", " Enable AIX codegen"),
42 clEnumValN(TargetDarwin,"darwin"," Enable Darwin codegen"),
44 cl::location(PPCTarget), cl::init(TargetDefault));
45 cl::opt<bool> EnablePPCLSR("enable-lsr-for-ppc",
46 cl::desc("Enable LSR for PPC (beta)"),
48 cl::opt<bool, true> EnableGPOPT("enable-gpopt", cl::Hidden,
50 cl::desc("Enable optimizations for GP cpus"));
54 const std::string PPC32ID = "PowerPC/32bit";
55 const std::string PPC64ID = "PowerPC/64bit";
57 // Register the targets
58 RegisterTarget<PPC32TargetMachine>
59 X("ppc32", " PowerPC 32-bit");
62 RegisterTarget<PPC64TargetMachine>
63 Y("ppc64", " PowerPC 64-bit (unimplemented)");
67 PowerPCTargetMachine::PowerPCTargetMachine(const std::string &name,
68 IntrinsicLowering *IL,
71 const PowerPCFrameInfo &TFI)
72 : TargetMachine(name, IL, TD), FrameInfo(TFI), Subtarget(M) {
73 if (TargetDefault == PPCTarget) {
74 if (Subtarget.IsAIX()) PPCTarget = TargetAIX;
75 if (Subtarget.IsDarwin()) PPCTarget = TargetDarwin;
79 unsigned PPC32TargetMachine::getJITMatchQuality() {
80 #if defined(__POWERPC__) || defined (__ppc__) || defined(_POWER)
87 /// addPassesToEmitFile - Add passes to the specified pass manager to implement
88 /// a static compiler for this target.
90 bool PowerPCTargetMachine::addPassesToEmitFile(PassManager &PM,
92 CodeGenFileType FileType) {
93 if (FileType != TargetMachine::AssemblyFile) return true;
95 bool LP64 = (0 != dynamic_cast<PPC64TargetMachine *>(this));
98 PM.add(createLoopStrengthReducePass());
99 PM.add(createVerifierPass());
100 PM.add(createCFGSimplificationPass());
103 // FIXME: Implement efficient support for garbage collection intrinsics.
104 PM.add(createLowerGCPass());
106 // FIXME: Implement the invoke/unwind instructions!
107 PM.add(createLowerInvokePass());
109 // FIXME: Implement the switch instruction in the instruction selector!
110 PM.add(createLowerSwitchPass());
112 PM.add(createLowerConstantExpressionsPass());
114 // Make sure that no unreachable blocks are instruction selected.
115 PM.add(createUnreachableBlockEliminationPass());
117 // Default to pattern ISel
119 PM.add(createPPC64ISelPattern(*this));
120 else if (PatternISelTriState == 0)
121 PM.add(createPPC32ISelSimple(*this));
123 PM.add(createPPC32ISelPattern(*this));
125 if (PrintMachineCode)
126 PM.add(createMachineFunctionPrinterPass(&std::cerr));
128 PM.add(createRegisterAllocator());
130 if (PrintMachineCode)
131 PM.add(createMachineFunctionPrinterPass(&std::cerr));
133 PM.add(createPrologEpilogCodeInserter());
135 // Must run branch selection immediately preceding the asm printer
136 PM.add(createPPCBranchSelectionPass());
138 // Decide which asm printer to use. If the user has not specified one on
139 // the command line, choose whichever one matches the default (current host).
142 PM.add(createAIXAsmPrinter(Out, *this));
146 PM.add(createDarwinAsmPrinter(Out, *this));
150 PM.add(createMachineCodeDeleter());
154 void PowerPCJITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
155 // The JIT does not support or need PIC.
158 bool LP64 = (0 != dynamic_cast<PPC64TargetMachine *>(&TM));
161 PM.add(createLoopStrengthReducePass());
162 PM.add(createCFGSimplificationPass());
165 // FIXME: Implement efficient support for garbage collection intrinsics.
166 PM.add(createLowerGCPass());
168 // FIXME: Implement the invoke/unwind instructions!
169 PM.add(createLowerInvokePass());
171 // FIXME: Implement the switch instruction in the instruction selector!
172 PM.add(createLowerSwitchPass());
174 PM.add(createLowerConstantExpressionsPass());
176 // Make sure that no unreachable blocks are instruction selected.
177 PM.add(createUnreachableBlockEliminationPass());
179 // Default to pattern ISel
181 PM.add(createPPC64ISelPattern(TM));
182 else if (PatternISelTriState == 0)
183 PM.add(createPPC32ISelSimple(TM));
185 PM.add(createPPC32ISelPattern(TM));
187 PM.add(createRegisterAllocator());
188 PM.add(createPrologEpilogCodeInserter());
190 // Must run branch selection immediately preceding the asm printer
191 PM.add(createPPCBranchSelectionPass());
193 if (PrintMachineCode)
194 PM.add(createMachineFunctionPrinterPass(&std::cerr));
197 /// PowerPCTargetMachine ctor - Create an ILP32 architecture model
199 PPC32TargetMachine::PPC32TargetMachine(const Module &M, IntrinsicLowering *IL)
200 : PowerPCTargetMachine(PPC32ID, IL, M,
201 TargetData(PPC32ID,false,4,4,4,4,4,4,2,1,1),
202 PowerPCFrameInfo(*this, false)), JITInfo(*this) {}
204 /// PPC64TargetMachine ctor - Create a LP64 architecture model
206 PPC64TargetMachine::PPC64TargetMachine(const Module &M, IntrinsicLowering *IL)
207 : PowerPCTargetMachine(PPC64ID, IL, M,
208 TargetData(PPC64ID,false,8,4,4,4,4,4,2,1,1),
209 PowerPCFrameInfo(*this, true)) {}
211 unsigned PPC32TargetMachine::getModuleMatchQuality(const Module &M) {
212 // We strongly match "powerpc-*".
213 std::string TT = M.getTargetTriple();
214 if (TT.size() >= 8 && std::string(TT.begin(), TT.begin()+8) == "powerpc-")
217 if (M.getEndianness() == Module::BigEndian &&
218 M.getPointerSize() == Module::Pointer32)
219 return 10; // Weak match
220 else if (M.getEndianness() != Module::AnyEndianness ||
221 M.getPointerSize() != Module::AnyPointerSize)
222 return 0; // Match for some other target
224 return getJITMatchQuality()/2;
227 unsigned PPC64TargetMachine::getModuleMatchQuality(const Module &M) {
228 if (M.getEndianness() == Module::BigEndian &&
229 M.getPointerSize() == Module::Pointer64)
230 return 10; // Direct match
231 else if (M.getEndianness() != Module::AnyEndianness ||
232 M.getPointerSize() != Module::AnyPointerSize)
233 return 0; // Match for some other target
235 return getJITMatchQuality()/2;