1 //===-- PowerPCTargetMachine.cpp - Define TargetMachine for PowerPC -------===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
13 #include "PowerPCTargetMachine.h"
15 #include "llvm/Module.h"
16 #include "llvm/PassManager.h"
17 #include "llvm/CodeGen/IntrinsicLowering.h"
18 #include "llvm/CodeGen/MachineFunction.h"
19 #include "llvm/CodeGen/Passes.h"
20 #include "llvm/Target/TargetOptions.h"
21 #include "llvm/Target/TargetMachineRegistry.h"
22 #include "llvm/Transforms/Scalar.h"
27 // Register the target.
28 RegisterTarget<PowerPCTargetMachine> X("powerpc", " PowerPC (experimental)");
31 unsigned PowerPCTargetMachine::getJITMatchQuality() {
32 #if defined(__POWERPC__) || defined (__ppc__) || defined(_POWER)
39 unsigned PowerPCTargetMachine::getModuleMatchQuality(const Module &M) {
40 if (M.getEndianness() == Module::BigEndian &&
41 M.getPointerSize() == Module::Pointer32)
42 return 10; // Direct match
43 else if (M.getEndianness() != Module::AnyEndianness ||
44 M.getPointerSize() != Module::AnyPointerSize)
45 return 0; // Match for some other target
47 return getJITMatchQuality()/2;
51 /// PowerPCTargetMachine ctor - Create an ILP32 architecture model
53 PowerPCTargetMachine::PowerPCTargetMachine(const Module &M,
54 IntrinsicLowering *IL)
55 : TargetMachine("PowerPC", IL, false, 4, 4, 4, 4, 4, 4, 2, 1, 4),
56 FrameInfo(TargetFrameInfo::StackGrowsDown, 16, -4), JITInfo(*this) {
59 /// addPassesToEmitAssembly - Add passes to the specified pass manager
60 /// to implement a static compiler for this target.
62 bool PowerPCTargetMachine::addPassesToEmitAssembly(PassManager &PM,
64 // FIXME: Implement efficient support for garbage collection intrinsics.
65 PM.add(createLowerGCPass());
67 // FIXME: Implement the invoke/unwind instructions!
68 PM.add(createLowerInvokePass());
70 // FIXME: Implement the switch instruction in the instruction selector!
71 PM.add(createLowerSwitchPass());
73 PM.add(createLowerConstantExpressionsPass());
75 // Make sure that no unreachable blocks are instruction selected.
76 PM.add(createUnreachableBlockEliminationPass());
78 PM.add(createPPCSimpleInstructionSelector(*this));
81 PM.add(createMachineFunctionPrinterPass(&std::cerr));
83 PM.add(createRegisterAllocator());
86 PM.add(createMachineFunctionPrinterPass(&std::cerr));
88 // I want a PowerPC specific prolog/epilog code inserter so I can put the
89 // fills/spills in the right spots.
90 PM.add(createPowerPCPEI());
92 // Must run branch selection immediately preceding the printer
93 PM.add(createPPCBranchSelectionPass());
94 PM.add(createPPCAsmPrinterPass(Out, *this));
95 PM.add(createMachineCodeDeleter());
99 /// addPassesToJITCompile - Add passes to the specified pass manager to
100 /// implement a fast dynamic compiler for this target.
102 void PowerPCJITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
103 // FIXME: Implement efficient support for garbage collection intrinsics.
104 PM.add(createLowerGCPass());
106 // FIXME: Implement the invoke/unwind instructions!
107 PM.add(createLowerInvokePass());
109 // FIXME: Implement the switch instruction in the instruction selector!
110 PM.add(createLowerSwitchPass());
112 PM.add(createLowerConstantExpressionsPass());
114 // Make sure that no unreachable blocks are instruction selected.
115 PM.add(createUnreachableBlockEliminationPass());
117 PM.add(createPPCSimpleInstructionSelector(TM));
118 PM.add(createRegisterAllocator());
119 PM.add(createPrologEpilogCodeInserter());