1 //===-- PPCTargetMachine.cpp - Define TargetMachine for PowerPC -----------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // Top-level implementation for the PowerPC target.
12 //===----------------------------------------------------------------------===//
15 #include "PPCTargetAsmInfo.h"
16 #include "PPCTargetMachine.h"
17 #include "llvm/Module.h"
18 #include "llvm/PassManager.h"
19 #include "llvm/Target/TargetMachineRegistry.h"
20 #include "llvm/Target/TargetOptions.h"
23 // Register the targets
24 static RegisterTarget<PPC32TargetMachine>
25 X("ppc32", " PowerPC 32");
26 static RegisterTarget<PPC64TargetMachine>
27 Y("ppc64", " PowerPC 64");
29 const TargetAsmInfo *PPCTargetMachine::createTargetAsmInfo() const {
30 if (Subtarget.isDarwin())
31 return new PPCDarwinTargetAsmInfo(*this);
33 return new PPCLinuxTargetAsmInfo(*this);
36 unsigned PPC32TargetMachine::getJITMatchQuality() {
37 #if defined(__POWERPC__) || defined (__ppc__) || defined(_POWER) || defined(__PPC__)
38 if (sizeof(void*) == 4)
43 unsigned PPC64TargetMachine::getJITMatchQuality() {
44 #if defined(__POWERPC__) || defined (__ppc__) || defined(_POWER) || defined(__PPC__)
45 if (sizeof(void*) == 8)
51 unsigned PPC32TargetMachine::getModuleMatchQuality(const Module &M) {
52 // We strongly match "powerpc-*".
53 std::string TT = M.getTargetTriple();
54 if (TT.size() >= 8 && std::string(TT.begin(), TT.begin()+8) == "powerpc-")
57 // If the target triple is something non-powerpc, we don't match.
58 if (!TT.empty()) return 0;
60 if (M.getEndianness() == Module::BigEndian &&
61 M.getPointerSize() == Module::Pointer32)
62 return 10; // Weak match
63 else if (M.getEndianness() != Module::AnyEndianness ||
64 M.getPointerSize() != Module::AnyPointerSize)
65 return 0; // Match for some other target
67 return getJITMatchQuality()/2;
70 unsigned PPC64TargetMachine::getModuleMatchQuality(const Module &M) {
71 // We strongly match "powerpc64-*".
72 std::string TT = M.getTargetTriple();
73 if (TT.size() >= 10 && std::string(TT.begin(), TT.begin()+10) == "powerpc64-")
76 if (M.getEndianness() == Module::BigEndian &&
77 M.getPointerSize() == Module::Pointer64)
78 return 10; // Weak match
79 else if (M.getEndianness() != Module::AnyEndianness ||
80 M.getPointerSize() != Module::AnyPointerSize)
81 return 0; // Match for some other target
83 return getJITMatchQuality()/2;
87 PPCTargetMachine::PPCTargetMachine(const Module &M, const std::string &FS,
89 : Subtarget(*this, M, FS, is64Bit),
90 DataLayout(Subtarget.getTargetDataString()), InstrInfo(*this),
91 FrameInfo(*this, is64Bit), JITInfo(*this, is64Bit), TLInfo(*this),
92 InstrItins(Subtarget.getInstrItineraryData()), MachOWriterInfo(*this) {
94 if (getRelocationModel() == Reloc::Default) {
95 if (Subtarget.isDarwin())
96 setRelocationModel(Reloc::DynamicNoPIC);
98 setRelocationModel(Reloc::Static);
102 /// Override this for PowerPC. Tail merging happily breaks up instruction issue
103 /// groups, which typically degrades performance.
104 bool PPCTargetMachine::getEnableTailMergeDefault() const { return false; }
106 PPC32TargetMachine::PPC32TargetMachine(const Module &M, const std::string &FS)
107 : PPCTargetMachine(M, FS, false) {
111 PPC64TargetMachine::PPC64TargetMachine(const Module &M, const std::string &FS)
112 : PPCTargetMachine(M, FS, true) {
116 //===----------------------------------------------------------------------===//
117 // Pass Pipeline Configuration
118 //===----------------------------------------------------------------------===//
120 bool PPCTargetMachine::addInstSelector(PassManagerBase &PM, bool Fast) {
121 // Install an instruction selector.
122 PM.add(createPPCISelDag(*this));
126 bool PPCTargetMachine::addPreEmitPass(PassManagerBase &PM, bool Fast) {
128 // Must run branch selection immediately preceding the asm printer.
129 PM.add(createPPCBranchSelectionPass());
133 bool PPCTargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast,
135 PM.add(createPPCAsmPrinterPass(Out, *this));
139 bool PPCTargetMachine::addCodeEmitter(PassManagerBase &PM, bool Fast,
140 bool DumpAsm, MachineCodeEmitter &MCE) {
141 // The JIT should use the static relocation model in ppc32 mode, PIC in ppc64.
142 // FIXME: This should be moved to TargetJITInfo!!
143 if (Subtarget.isPPC64()) {
144 // We use PIC codegen in ppc64 mode, because otherwise we'd have to use many
145 // instructions to materialize arbitrary global variable + function +
146 // constant pool addresses.
147 setRelocationModel(Reloc::PIC_);
148 // Temporary workaround for the inability of PPC64 JIT to handle jump
150 DisableJumpTables = true;
152 setRelocationModel(Reloc::Static);
155 // Inform the subtarget that we are in JIT mode. FIXME: does this break macho
157 Subtarget.SetJITMode();
159 // Machine code emitter pass for PowerPC.
160 PM.add(createPPCCodeEmitterPass(*this, MCE));
162 PM.add(createPPCAsmPrinterPass(*cerr.stream(), *this));
166 bool PPCTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM, bool Fast,
167 bool DumpAsm, MachineCodeEmitter &MCE) {
168 // Machine code emitter pass for PowerPC.
169 PM.add(createPPCCodeEmitterPass(*this, MCE));
171 PM.add(createPPCAsmPrinterPass(*cerr.stream(), *this));