1 //===-- PowerPCTargetMachine.cpp - Define TargetMachine for PowerPC -------===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // Top-level implementation for the PowerPC target.
12 //===----------------------------------------------------------------------===//
15 #include "PowerPCFrameInfo.h"
16 #include "PPC32TargetMachine.h"
17 #include "PPC32JITInfo.h"
18 #include "llvm/Module.h"
19 #include "llvm/PassManager.h"
20 #include "llvm/Analysis/Verifier.h"
21 #include "llvm/CodeGen/IntrinsicLowering.h"
22 #include "llvm/CodeGen/MachineFunction.h"
23 #include "llvm/CodeGen/Passes.h"
24 #include "llvm/Target/TargetOptions.h"
25 #include "llvm/Target/TargetMachineRegistry.h"
26 #include "llvm/Transforms/Scalar.h"
27 #include "llvm/Support/CommandLine.h"
32 const char *PPC32ID = "PowerPC/32bit";
34 static cl::opt<bool> DisablePPCDAGDAG("disable-ppc-dag-isel", cl::Hidden,
35 cl::desc("Disable DAG-to-DAG isel for PPC"));
37 // Register the targets
38 RegisterTarget<PPC32TargetMachine>
39 X("ppc32", " PowerPC 32-bit");
42 PowerPCTargetMachine::PowerPCTargetMachine(const std::string &name,
43 IntrinsicLowering *IL,
45 const std::string &FS,
47 const PowerPCFrameInfo &TFI)
48 : TargetMachine(name, IL, TD), FrameInfo(TFI), Subtarget(M, FS) {
49 if (TargetDefault == PPCTarget) {
50 if (Subtarget.isAIX()) PPCTarget = TargetAIX;
51 if (Subtarget.isDarwin()) PPCTarget = TargetDarwin;
55 unsigned PPC32TargetMachine::getJITMatchQuality() {
56 #if defined(__POWERPC__) || defined (__ppc__) || defined(_POWER)
63 /// addPassesToEmitFile - Add passes to the specified pass manager to implement
64 /// a static compiler for this target.
66 bool PowerPCTargetMachine::addPassesToEmitFile(PassManager &PM,
68 CodeGenFileType FileType) {
69 if (FileType != TargetMachine::AssemblyFile) return true;
71 // Run loop strength reduction before anything else.
72 PM.add(createLoopStrengthReducePass());
74 // FIXME: Implement efficient support for garbage collection intrinsics.
75 PM.add(createLowerGCPass());
77 // FIXME: Implement the invoke/unwind instructions!
78 PM.add(createLowerInvokePass());
80 // Clean up after other passes, e.g. merging critical edges.
81 PM.add(createCFGSimplificationPass());
83 // FIXME: Implement the switch instruction in the instruction selector!
84 PM.add(createLowerSwitchPass());
86 // Make sure that no unreachable blocks are instruction selected.
87 PM.add(createUnreachableBlockEliminationPass());
89 // Install an instruction selector.
90 if (!DisablePPCDAGDAG)
91 PM.add(createPPC32ISelDag(*this));
93 PM.add(createPPC32ISelPattern(*this));
96 PM.add(createMachineFunctionPrinterPass(&std::cerr));
98 PM.add(createRegisterAllocator());
100 if (PrintMachineCode)
101 PM.add(createMachineFunctionPrinterPass(&std::cerr));
103 PM.add(createPrologEpilogCodeInserter());
105 // Must run branch selection immediately preceding the asm printer
106 PM.add(createPPCBranchSelectionPass());
108 // Decide which asm printer to use. If the user has not specified one on
109 // the command line, choose whichever one matches the default (current host).
112 PM.add(createAIXAsmPrinter(Out, *this));
116 PM.add(createDarwinAsmPrinter(Out, *this));
120 PM.add(createMachineCodeDeleter());
124 void PowerPCJITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
125 // The JIT does not support or need PIC.
128 // Run loop strength reduction before anything else.
129 PM.add(createLoopStrengthReducePass());
131 // FIXME: Implement efficient support for garbage collection intrinsics.
132 PM.add(createLowerGCPass());
134 // FIXME: Implement the invoke/unwind instructions!
135 PM.add(createLowerInvokePass());
137 // Clean up after other passes, e.g. merging critical edges.
138 PM.add(createCFGSimplificationPass());
140 // FIXME: Implement the switch instruction in the instruction selector!
141 PM.add(createLowerSwitchPass());
143 // Make sure that no unreachable blocks are instruction selected.
144 PM.add(createUnreachableBlockEliminationPass());
146 // Install an instruction selector.
147 if (!DisablePPCDAGDAG)
148 PM.add(createPPC32ISelDag(TM));
150 PM.add(createPPC32ISelPattern(TM));
152 PM.add(createRegisterAllocator());
153 PM.add(createPrologEpilogCodeInserter());
155 // Must run branch selection immediately preceding the asm printer
156 PM.add(createPPCBranchSelectionPass());
158 if (PrintMachineCode)
159 PM.add(createMachineFunctionPrinterPass(&std::cerr));
162 /// PowerPCTargetMachine ctor - Create an ILP32 architecture model
164 PPC32TargetMachine::PPC32TargetMachine(const Module &M, IntrinsicLowering *IL,
165 const std::string &FS)
166 : PowerPCTargetMachine(PPC32ID, IL, M, FS,
167 TargetData(PPC32ID,false,4,4,4,4,4,4,2,1,1),
168 PowerPCFrameInfo(*this, false)), JITInfo(*this) {}
170 unsigned PPC32TargetMachine::getModuleMatchQuality(const Module &M) {
171 // We strongly match "powerpc-*".
172 std::string TT = M.getTargetTriple();
173 if (TT.size() >= 8 && std::string(TT.begin(), TT.begin()+8) == "powerpc-")
176 if (M.getEndianness() == Module::BigEndian &&
177 M.getPointerSize() == Module::Pointer32)
178 return 10; // Weak match
179 else if (M.getEndianness() != Module::AnyEndianness ||
180 M.getPointerSize() != Module::AnyPointerSize)
181 return 0; // Match for some other target
183 return getJITMatchQuality()/2;