1 //===-- PowerPCTargetMachine.cpp - Define TargetMachine for PowerPC -------===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
14 #include "PowerPCTargetMachine.h"
15 #include "PowerPCFrameInfo.h"
16 #include "PPC32TargetMachine.h"
17 #include "PPC64TargetMachine.h"
18 #include "PPC32JITInfo.h"
19 #include "PPC64JITInfo.h"
20 #include "llvm/Module.h"
21 #include "llvm/PassManager.h"
22 #include "llvm/CodeGen/IntrinsicLowering.h"
23 #include "llvm/CodeGen/MachineFunction.h"
24 #include "llvm/CodeGen/Passes.h"
25 #include "llvm/Target/TargetOptions.h"
26 #include "llvm/Target/TargetMachineRegistry.h"
27 #include "llvm/Transforms/Scalar.h"
28 #include "Support/CommandLine.h"
33 cl::opt<bool> AIX("aix",
34 cl::desc("Generate AIX/xcoff instead of Darwin/MachO"),
39 const std::string PPC32ID = "PowerPC/32bit";
40 const std::string PPC64ID = "PowerPC/64bit";
42 // Register the targets
43 RegisterTarget<PPC32TargetMachine>
44 X("ppc32", " PowerPC 32-bit (experimental)");
47 RegisterTarget<PPC64TargetMachine>
48 Y("ppc64", " PowerPC 64-bit (unimplemented)");
52 PowerPCTargetMachine::PowerPCTargetMachine(const std::string &name,
53 IntrinsicLowering *IL,
55 const PowerPCFrameInfo &TFI,
56 const PowerPCJITInfo &TJI)
57 : TargetMachine(name, IL, TD), FrameInfo(TFI), JITInfo(TJI)
60 unsigned PowerPCTargetMachine::getJITMatchQuality() {
61 #if defined(__POWERPC__) || defined (__ppc__) || defined(_POWER)
68 /// addPassesToEmitAssembly - Add passes to the specified pass manager
69 /// to implement a static compiler for this target.
71 bool PowerPCTargetMachine::addPassesToEmitAssembly(PassManager &PM,
73 bool LP64 = (0 != dynamic_cast<PPC64TargetMachine *>(this));
75 // FIXME: Implement efficient support for garbage collection intrinsics.
76 PM.add(createLowerGCPass());
78 // FIXME: Implement the invoke/unwind instructions!
79 PM.add(createLowerInvokePass());
81 // FIXME: Implement the switch instruction in the instruction selector!
82 PM.add(createLowerSwitchPass());
84 PM.add(createLowerConstantExpressionsPass());
86 // Make sure that no unreachable blocks are instruction selected.
87 PM.add(createUnreachableBlockEliminationPass());
90 PM.add(createPPC64ISelSimple(*this));
92 PM.add(createPPC32ISelSimple(*this));
95 PM.add(createMachineFunctionPrinterPass(&std::cerr));
97 PM.add(createRegisterAllocator());
100 PM.add(createMachineFunctionPrinterPass(&std::cerr));
102 PM.add(createPrologEpilogCodeInserter());
104 // Must run branch selection immediately preceding the asm printer
105 PM.add(createPPCBranchSelectionPass());
108 PM.add(createPPC64AsmPrinter(Out, *this));
110 PM.add(createPPC32AsmPrinter(Out, *this));
112 PM.add(createMachineCodeDeleter());
116 void PowerPCJITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
117 // FIXME: Implement efficient support for garbage collection intrinsics.
118 PM.add(createLowerGCPass());
120 // FIXME: Implement the invoke/unwind instructions!
121 PM.add(createLowerInvokePass());
123 // FIXME: Implement the switch instruction in the instruction selector!
124 PM.add(createLowerSwitchPass());
126 PM.add(createLowerConstantExpressionsPass());
128 // Make sure that no unreachable blocks are instruction selected.
129 PM.add(createUnreachableBlockEliminationPass());
131 PM.add(createPPC32ISelSimple(TM));
132 PM.add(createRegisterAllocator());
133 PM.add(createPrologEpilogCodeInserter());
136 void PowerPCJITInfo::replaceMachineCodeForFunction(void *Old, void *New) {
137 assert(0 && "Cannot execute PowerPCJITInfo::replaceMachineCodeForFunction()");
140 void *PowerPCJITInfo::getJITStubForFunction(Function *F,
141 MachineCodeEmitter &MCE) {
142 assert(0 && "Cannot execute PowerPCJITInfo::getJITStubForFunction()");
146 /// PowerPCTargetMachine ctor - Create an ILP32 architecture model
148 PPC32TargetMachine::PPC32TargetMachine(const Module &M, IntrinsicLowering *IL)
149 : PowerPCTargetMachine(PPC32ID, IL,
150 TargetData(PPC32ID,false,4,4,4,4,4,4,2,1,4),
151 PowerPCFrameInfo(*this, false), PPC32JITInfo(*this)) {}
153 /// PPC64TargetMachine ctor - Create a LP64 architecture model
155 PPC64TargetMachine::PPC64TargetMachine(const Module &M, IntrinsicLowering *IL)
156 : PowerPCTargetMachine(PPC64ID, IL,
157 TargetData(PPC64ID,false,8,4,4,4,4,4,2,1,4),
158 PowerPCFrameInfo(*this, true), PPC64JITInfo(*this)) {}
160 unsigned PPC32TargetMachine::getModuleMatchQuality(const Module &M) {
161 if (M.getEndianness() == Module::BigEndian &&
162 M.getPointerSize() == Module::Pointer32)
163 return 10; // Direct match
164 else if (M.getEndianness() != Module::AnyEndianness ||
165 M.getPointerSize() != Module::AnyPointerSize)
166 return 0; // Match for some other target
168 return getJITMatchQuality()/2;
171 unsigned PPC64TargetMachine::getModuleMatchQuality(const Module &M) {
172 if (M.getEndianness() == Module::BigEndian &&
173 M.getPointerSize() == Module::Pointer64)
174 return 10; // Direct match
175 else if (M.getEndianness() != Module::AnyEndianness ||
176 M.getPointerSize() != Module::AnyPointerSize)
177 return 0; // Match for some other target
179 return getJITMatchQuality()/2;