1 //===-- PPCTargetMachine.h - Define TargetMachine for PowerPC -----*- C++ -*-=//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file declares the PowerPC specific subclass of TargetMachine.
12 //===----------------------------------------------------------------------===//
14 #ifndef PPC_TARGETMACHINE_H
15 #define PPC_TARGETMACHINE_H
17 #include "PPCFrameInfo.h"
18 #include "PPCSubtarget.h"
19 #include "PPCJITInfo.h"
20 #include "PPCInstrInfo.h"
21 #include "PPCISelLowering.h"
22 #include "PPCMachOWriterInfo.h"
23 #include "llvm/Target/TargetMachine.h"
24 #include "llvm/Target/TargetData.h"
30 /// PPCTargetMachine - Common code between 32-bit and 64-bit PowerPC targets.
32 class PPCTargetMachine : public LLVMTargetMachine {
33 PPCSubtarget Subtarget;
34 const TargetData DataLayout; // Calculates type size & alignment
35 PPCInstrInfo InstrInfo;
36 PPCFrameInfo FrameInfo;
38 PPCTargetLowering TLInfo;
39 InstrItineraryData InstrItins;
40 PPCMachOWriterInfo MachOWriterInfo;
43 virtual const TargetAsmInfo *createTargetAsmInfo() const;
46 PPCTargetMachine(const Target &T, const Module &M, const std::string &FS,
49 virtual const PPCInstrInfo *getInstrInfo() const { return &InstrInfo; }
50 virtual const PPCFrameInfo *getFrameInfo() const { return &FrameInfo; }
51 virtual PPCJITInfo *getJITInfo() { return &JITInfo; }
52 virtual PPCTargetLowering *getTargetLowering() const {
53 return const_cast<PPCTargetLowering*>(&TLInfo);
55 virtual const PPCRegisterInfo *getRegisterInfo() const {
56 return &InstrInfo.getRegisterInfo();
59 virtual const TargetData *getTargetData() const { return &DataLayout; }
60 virtual const PPCSubtarget *getSubtargetImpl() const { return &Subtarget; }
61 virtual const InstrItineraryData getInstrItineraryData() const {
64 virtual const PPCMachOWriterInfo *getMachOWriterInfo() const {
65 return &MachOWriterInfo;
68 // Pass Pipeline Configuration
69 virtual bool addInstSelector(PassManagerBase &PM, CodeGenOpt::Level OptLevel);
70 virtual bool addPreEmitPass(PassManagerBase &PM, CodeGenOpt::Level OptLevel);
71 virtual bool addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel,
72 MachineCodeEmitter &MCE);
73 virtual bool addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel,
75 virtual bool addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel,
76 ObjectCodeEmitter &OCE);
77 virtual bool addSimpleCodeEmitter(PassManagerBase &PM,
78 CodeGenOpt::Level OptLevel,
79 MachineCodeEmitter &MCE);
80 virtual bool addSimpleCodeEmitter(PassManagerBase &PM,
81 CodeGenOpt::Level OptLevel,
83 virtual bool addSimpleCodeEmitter(PassManagerBase &PM,
84 CodeGenOpt::Level OptLevel,
85 ObjectCodeEmitter &OCE);
86 virtual bool getEnableTailMergeDefault() const;
89 /// PPC32TargetMachine - PowerPC 32-bit target machine.
91 class PPC32TargetMachine : public PPCTargetMachine {
93 PPC32TargetMachine(const Target &T, const Module &M, const std::string &FS);
96 /// PPC64TargetMachine - PowerPC 64-bit target machine.
98 class PPC64TargetMachine : public PPCTargetMachine {
100 PPC64TargetMachine(const Target &T, const Module &M, const std::string &FS);
103 } // end namespace llvm