1 //===-- PPCTargetMachine.h - Define TargetMachine for PowerPC ---*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file declares the PowerPC specific subclass of TargetMachine.
12 //===----------------------------------------------------------------------===//
14 #ifndef PPC_TARGETMACHINE_H
15 #define PPC_TARGETMACHINE_H
17 #include "PPCFrameLowering.h"
18 #include "PPCISelLowering.h"
19 #include "PPCInstrInfo.h"
20 #include "PPCJITInfo.h"
21 #include "PPCSelectionDAGInfo.h"
22 #include "PPCSubtarget.h"
23 #include "llvm/IR/DataLayout.h"
24 #include "llvm/Target/TargetMachine.h"
28 /// PPCTargetMachine - Common code between 32-bit and 64-bit PowerPC targets.
30 class PPCTargetMachine : public LLVMTargetMachine {
31 PPCSubtarget Subtarget;
32 PPCTargetLowering TLInfo;
33 PPCSelectionDAGInfo TSInfo;
36 PPCTargetMachine(const Target &T, StringRef TT,
37 StringRef CPU, StringRef FS, const TargetOptions &Options,
38 Reloc::Model RM, CodeModel::Model CM,
39 CodeGenOpt::Level OL, bool is64Bit);
41 const PPCInstrInfo *getInstrInfo() const override {
42 return getSubtargetImpl()->getInstrInfo();
44 const PPCFrameLowering *getFrameLowering() const override {
45 return getSubtargetImpl()->getFrameLowering();
47 PPCJITInfo *getJITInfo() override { return Subtarget.getJITInfo(); }
48 const PPCTargetLowering *getTargetLowering() const override {
51 const PPCSelectionDAGInfo* getSelectionDAGInfo() const override {
54 const PPCRegisterInfo *getRegisterInfo() const override {
55 return &getInstrInfo()->getRegisterInfo();
58 const DataLayout *getDataLayout() const override {
59 return getSubtargetImpl()->getDataLayout();
61 const PPCSubtarget *getSubtargetImpl() const override { return &Subtarget; }
62 const InstrItineraryData *getInstrItineraryData() const override {
63 return &getSubtargetImpl()->getInstrItineraryData();
66 // Pass Pipeline Configuration
67 TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
68 bool addCodeEmitter(PassManagerBase &PM,
69 JITCodeEmitter &JCE) override;
71 /// \brief Register PPC analysis passes with a pass manager.
72 void addAnalysisPasses(PassManagerBase &PM) override;
75 /// PPC32TargetMachine - PowerPC 32-bit target machine.
77 class PPC32TargetMachine : public PPCTargetMachine {
78 virtual void anchor();
80 PPC32TargetMachine(const Target &T, StringRef TT,
81 StringRef CPU, StringRef FS, const TargetOptions &Options,
82 Reloc::Model RM, CodeModel::Model CM,
83 CodeGenOpt::Level OL);
86 /// PPC64TargetMachine - PowerPC 64-bit target machine.
88 class PPC64TargetMachine : public PPCTargetMachine {
89 virtual void anchor();
91 PPC64TargetMachine(const Target &T, StringRef TT,
92 StringRef CPU, StringRef FS, const TargetOptions &Options,
93 Reloc::Model RM, CodeModel::Model CM,
94 CodeGenOpt::Level OL);
97 } // end namespace llvm